Marek Olšák
|
be8c61b4f6
|
amd/registers: only define SPI and COMPUTE registers in the 0xB000 range
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
|
2023-02-24 21:27:24 +00:00 |
|
Marek Olšák
|
63b21e3066
|
amd: add missing gfx11 register definitions
Fixes: caa09f66ae - amd: add chip identification for gfx1100-1103
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
|
2023-02-24 21:27:23 +00:00 |
|
Marek Olšák
|
b6f6465264
|
amd: update SX_BLEND_OPT_EPSILON.MRT0_EPSILON enum definitions
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
|
2023-02-03 00:18:01 +00:00 |
|
Marek Olšák
|
a338a2da58
|
amd/registers: regenerate gfx11 headers from amd-staging-drm-next
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19419>
|
2022-11-04 00:42:08 +00:00 |
|
Marek Olšák
|
9e9cc62912
|
radeonsi: follow shader_info.float_controls_execution_mode (mostly)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
|
2022-08-03 00:57:16 +00:00 |
|
Marek Olšák
|
ced3fbbcf9
|
amd/registers: add gfx11.json
Other files are also updated to due regeneration.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
|
2022-05-10 04:29:54 +00:00 |