nir_lower_is_helper_invocation should be after nir_lower_system_values
to handle possible nir_intrinsic_is_helper_invocation which may be
produced by nir_lower_system_values.
Happens with SPIR-V 1.6 for which gl_HelperInvocation is translated into
"BuiltIn HelperInvocation" + "Volatile", which nir_lower_system_values
translates into is_helper_invocation.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19677>
nir_lower_is_helper_invocation should be after nir_lower_system_values
to handle possible nir_intrinsic_is_helper_invocation which may be
produced by nir_lower_system_values.
Happens with SPIR-V 1.6 for which gl_HelperInvocation is translated into
"BuiltIn HelperInvocation" + "Volatile", which nir_lower_system_values
translates into is_helper_invocation.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19677>
nir_lower_is_helper_invocation lowers intrinsic_is_helper_invocation
and uses load_helper_invocation (which is lowered by nir_lower_system_values).
While nir_lower_system_values may lower SYSTEM_VALUE_HELPER_INVOCATION
into intrinsic_is_helper_invocation.
So they depend on each other. Break the dependency by making
nir_lower_is_helper_invocation aware of lower_helper_invocation option
and emitting lowered load_helper_invocation when required.
Happens with SPIR-V 1.6 for which gl_HelperInvocation is translated into
"BuiltIn HelperInvocation" + "Volatile", which nir_lower_system_values
translates into is_helper_invocation.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19677>
Add the PSS stall bit to ANV_PIPE_STALL_BITS so that it get's cleared on
flush.
Fixes: f3c62973 ("anv,iris: PSS Stall Sync around color fast clears")
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20317>
Before, when an application called into d3d12_query_result, and
the results were not ready to be read, a flush-and-wait would
be attempted via synchronized mapping of the query result resource.
This can end up calling close/execute on the command list while it is
already being executed by the driver thread.
With the current fence value attached to the query, we now wait
for completion if necessary and then map the resource unsynchronized, or
return false if the result is not ready and wait == false.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20217>
The latest includes/registry have some pNext structs that need
guarding spearately to their initial structs, so we have to track
the define guards better and use them in the generated code
For example:
VkVideoEncodeRateControlInfoKHR extends VkVideoCodingControlInfoKHR
However the first struct is protected by BETA, but the second isn't
the generator was always generating unguarded code for all structs
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20384>
This lets us batch up the state changes from multiple
vkCmdBindDescriptorSets, which ANGLE and zink will both do in a single
draw.
Improves ANGLE (sysmem) driver_overhead perf by 5.18806% +/- 1.03444% (n=5).
Improves ANGLE aztec_ruins_high perf by ~.3%. (clear result in the graph,
but the screen went to sleep mid way through and so it was high variance)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20084>
Any change in .gitlab-ci/ directory triggers an entire CI run,
which is unnecessary for just changing the developers' scripts.
Added symlink to `.gitlab-ci/bin` to keep original invocation compatibility.
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20371>
We had iris_bo_alloc() call with the wrong flags value, it was
mistaken by aligment, see commit 68652dca0c.
To avoid such mistakes in future here adding BO_ALLOC_PLAIN so
iris_bo_alloc() calls have a more descriptive flag parameter when
there is no special allocation request.
While at it, also standardizing unsigned as the type for this flag.
No behavior changes here.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19857>
Port from ac_nir_to_llvm.c and si_shader_llvm_resource.c.
Due to need waterfall of llvm backend, we can't get bind-texture
descriptor directly in nir. So we keep load_sampler_desc abi only
for bind-texture index to desc.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
RADV use dri option to enabled this for some apps, but it's
done in nir lower currently. I'm afraid it still needs this
option to handle the non-uniform case as desc is loaded in
llvm.
radeonsi always enable this for bind-textures.
radeonsi will lower all bind-textures to bindless-textures,
and only bind-textures use desc index, so add this abi for
bindless desc index path.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Like lower_to_fragment_fetch_amd option in lower tex,
this is for radeonsi to lower MS image ops.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Like nir_texop_fragment_mask_fetch_amd, this is used to load multi
sample image fmask data for AMD GPU.
We will lower multi sample image load and samples_identical intrinsics
to use it latter for radeonsi. RADV does not need this because it
always expand fmask images before dispatch compute shader.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Split _mesa_set_vertex_format into 2 functions and set the derived fields
after we know that the format is different.
This skips _PipeFormat and _ElementSize recomputation every time we get
gl*Pointer with the same format.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>
The motivation is to remove branching from prepare_indexed_draw
and remove the unsafe hack in vbo_save_playback_vertex_list.
There is some duplication that is not identical in all 3 cases.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>
Timur Kristóf
Danylo Piliaiev
Rohan Garg
Yonggang Luo
Giancarlo Devich
Dave Airlie
Emma Anholt
Georg Lehmann
David Heidelberg
José Roberto de Souza
Konstantin Seurer
Qiang Yu
Friedrich Vock
Marek Olšák
Yiwei Zhang