Alyssa Rosenzweig
a463b2c2ed
pan/bi: Pack FMA IADD/ISUB 32
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890 >
2020-05-04 18:45:15 +00:00
Alyssa Rosenzweig
5cbdf29b7e
pan/bi: Pack ADD ICMP 16
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:16 -04:00
Alyssa Rosenzweig
336d5128f9
pan/bi: Structify ADD ICMP 16
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:16 -04:00
Alyssa Rosenzweig
20cb039457
pan/bi: Structify DISCARD
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
47c84ee735
pan/bi: Lower gl_FragCoord
...
We accept a sysval and emit various forms for each component.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:14 -04:00
Alyssa Rosenzweig
5a415259fc
pan/bi: Add clause type for gl_FragCoord.zw load
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:14 -04:00
Tomeu Vizoso
07b31f3437
pan/bi: Print shaders only if BIFROST_MESA_DEBUG=shaders
...
Similar to how it's done in the Midgard compiler.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832 >
2020-05-01 16:52:16 +02:00
Alyssa Rosenzweig
130a3fba1c
pan/bi: Pack round opcodes (FMA, either 16 or 32)
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844 >
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig
ef9582738e
pan/bi: Pack BI_BITWISE
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4790 >
2020-04-29 00:30:05 +00:00
Alyssa Rosenzweig
81156ad55a
pan/bi: Pack fma.fcmp16
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
c94d41ad7c
pan/bi: Pack FMA 32 FCMP
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
12ca99f2c1
pan/bi: Structify ADD ICMP 32
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
ddcefefa7d
pan/bi: Structify FMA ICMP 16
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
3d41468e7d
pan/bi: Structify FMA ICMP 32
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
527d7303ca
pan/bi: Structify ADD FCMP16
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
74795dd328
pan/bi: Structify FMA FCMP16
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
28afe3037a
pan/bi Strucitfy ADD FCMP 32
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
c861292ce2
pan/bi: Structify FMA FCMP
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789 >
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
d31e4879f0
pan/bi: Pack FMA SEL8
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766 >
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
7b31f04bac
pan/bi: Pack FMA SEL16
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766 >
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
bfc06b10de
pan/bi: Structify TEX compact
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671 >
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
7e76c2b806
pan/bi: Structify add and min/max fp16 ADD
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
db5c1ae8fd
pan/bi: Add fexp2_fast packing
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
0cb703984e
pan/bi: Structify FMA_MSCALE
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
d3643cdd81
pan/bi: Add log2_help packing
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
6039d51e32
pan/bi: Pack ADD_FREXPM
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
9904ed170a
pan/bi: Add frexp_log packing
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
640d69d166
pan/bi: ADD packing for CONVERT
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539 >
2020-04-13 22:32:40 +00:00
Alyssa Rosenzweig
8cfe660326
pan/bi: Rewrite conversion packing
...
To support roundmodes and other goodies.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539 >
2020-04-13 22:32:40 +00:00
Alyssa Rosenzweig
36e4c6b267
pan/bi: Structify ADD unit add/min/max
...
..since it's missing for FMA
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470 >
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
f6bd0ec907
pan/bi: Implement min/max on FMA
...
Unfortunately, while this looks fine to the disasm, it's raising
INSTR_INVALID_ENC on my g31 board here. Looks like it might be ADD only
on newer Bifrost.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470 >
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
c37c799284
pan/bi: Add fp16 support for frcp/frsq
...
More ops.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470 >
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
d7bb7b79a8
pan/bi: Add 32-bit _FAST packing
...
For frcp/frsq on newer Bifrost.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470 >
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
0ab3f687c0
pan/bi: Handle BIFROST_FIRST_WRITE_FMA_P2_READ_P3
...
It's a special case for unclear reasons, and if you mess it up you get
INSTR_INVALID_ENC. Isn't hardware fun?
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458 >
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
1b16d6354b
pan/bi: Fix outmod/roundmode flip
...
I misread the disassembler, the fields are in the other order.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396 >
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
0b241c70b6
pan/bi: Use STAGE srcs for scheduler nops
...
..rather than using port 0 for the source, which may or may not actually
exist.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396 >
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
12a16f2247
pan/bi: Structify fadd/min/max16
...
There is some quirky encoding here.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382 >
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
197c6414ea
pan/bi: Add bifrost_fma_2src generic
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382 >
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
902f99a45d
pan/bi: Expand out FMA conversion opcodes
...
There are a *lot* of them, with lots of symmetry we can exploit to
simplify the packing logic (but not entirely). Let's add the
corresponding header structs/defines, although we don't actually poke
the disassembler at this stage.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382 >
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
5eb209a05f
pan/bi: Finish FMA structures
...
There were some missing fields for the 32-bit case, and the 16-bit case
has separate packing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382 >
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
d9d549ff88
pan/bi: Pack csel4 opcodes
...
These are pretty straightforward but there's a lot of details to keep
straight. In the IR, we keep a general logical comparator and types
separately; in the hardware, the type gets fused with a (much more)
limited number of comparators. So there's a fair bit of code here to
account for these differences, fusing in the type information, and
changing up argument order as necessary to make it actually correct.
Anything to save a bit!
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276 >
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
1097c69087
pan/bi: Pack LD_ATTR
...
Also requires the usual R61/62 games.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276 >
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
0be1116b81
pan/bi: Pack st_vary
...
This should let varying writes go through finally.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276 >
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
409e4f8a49
pan/bi: Pack ld_var_addr
...
Choo choo.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276 >
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
7321a17c6a
pan/bi: Pack ld_ubo ops
...
Routes some infrastructure to do so at least slightly generically but
we'll see.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276 >
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
eb590a98d2
pan/bi: Pack a constant quadword
...
The piping isn't there to make use of it yet, but this stubs out
constant support at the clause level.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276 >
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
6b7077efda
pan/bi: Implement FMA/MOV without modifiers
...
We split off MOV from FMOV since the canonical move on Bifrost doesn't
accept modifiers. (We can still do fmov, but with something like add-0.)
This will also make copyprop a little nicer, I think. Anyway, the
non-modifier version we can implement as-is for FMA.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276 >
2020-03-22 03:32:34 +00:00
Alyssa Rosenzweig
73812999d9
pan/bi: Pack BI_BLEND
...
MRT not yet supported to keep things easy.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242 >
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
e06426ea85
pan/bi: Add ATEST packing
...
Only fp32 for now.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242 >
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
d797822d31
pan/bi: Pretty-print clause types in disassembler
...
Also note that type=1 is for load_vary.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242 >
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
32e5a7e6e9
pan/bi: Emit load_vary ops
...
Annoyingly long code to do so, but this should theoretically work for
both direct and indirect load_vary. Still need to handle destination.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242 >
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
6069904bbd
pan/bi: Pack fadd32
...
Choo choo.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242 >
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
8a3bf3f1a1
pan/bi: Add struct bifrost_fma_fma
...
So we can pack regular FMA ops.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242 >
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
cd40e189b6
pan/bi: Model 3-bit Bifrost srcs in IR
...
We'll want to set these manually for schedule-time passthrough, as well
as use the enum for packing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242 >
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
ff39f57a48
pan/bi: Add missing __attribute__((packed))
...
That this code worked before makes me rather nervous...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242 >
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
03a271bf15
pan/bi: Add packing for register control field
...
Filling in some gaps based on intuition from the bit patterns but this
should be vaguely right. More investigation needed down the line.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242 >
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
50bce53cd0
pan/bi: Sketch out instruction word packing
...
Instructions are 78-bits with some seriously suspicious packing
requirements but hey, gotta save 'em bits.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242 >
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
9269c85578
pan/bi: Setup initial clause packing
...
At the moment, we just iterate the clauses in the post-RA, post-sched IR
and generate a dummy clause corresponding, passing the results to the
disassembler to verify.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242 >
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
5f7a3ba872
pan/bi: Move some print routines out of the disasm
...
These are generally useful for debug of the compiler IR even prior to
code emit; let's share these.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061 >
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
73c91f14c9
pan/bi: Extract bifrost_branch structure
...
It's in the disassembler as bitfields, let's extract to a proper
structure so we can see what's there.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061 >
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
6a7987aba1
pan/bi: Pull out bifrost_load_var
...
We're not using this structure yet but we want everything in the ISA
ready for us.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061 >
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
bbf41ffb00
pan/bi: Factor out enum bifrost_minmax_mode
...
We'll want it from the compiler-side.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061 >
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
5d3a4e3113
pan/bi: Gut old compiler
...
We're making some pretty dramatic design pivots so this early on it'll
be easier to start from scratch, I think.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061 >
2020-03-05 14:35:37 +00:00
Alyssa Rosenzweig
d0c66869c1
pan/bi: Move some definitions from disasm to bifrost.h
...
These are generally useful outside the disassmbler.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025 >
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
346262ceb6
pan/bi: Structify FMA_FADD
...
Just to make it easier to work with.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025 >
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
4fe5b59a96
pan/bi: Squash LD_ATTR ops together
...
*whistles*
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025 >
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
ee957bc0f3
pan/bi: Combine LOAD_VARYING_ADDRESS instructions by type
...
It's all a single opcode in fact.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025 >
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
36fe378f1c
pan/bi: Decode ADD_SHIFT properly
...
Just like FMA_SHIFT, but with some bits shuffled around.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025 >
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
b51468ed9c
pan/bi: Add v4i8 mode to FMA_SHIFT
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025 >
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
2db454bbab
pan/bi: Decode FMA_SHIFT properly
...
The shift-bitwise ops are fairly configurable, let's decode this the
right way. Choo choo.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025 >
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
7c96bd2dc5
pan/bi: Introduce CSEL4 class
...
All of these "ops" are just variants on the same.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025 >
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
ec2a59cd7a
panfrost: Move non-Gallium files outside of Gallium
...
In preparation for a Panfrost-based non-Gallium driver (maybe
Vulkan...?), hoist everything except for the Gallium driver into a
shared src/panfrost. Practically, that means the compilers, the headers,
and pandecode.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-10 10:43:23 -07:00