Commit Graph

104262 Commits

Author SHA1 Message Date
Samuel Pitoiset d27e1584ce radv/winsys: fix creating the BO list for virtual buffers
When the number of unique BO is 0, we optimize the list creation
by copying all buffers of the current CS directly into it. But
this is only valid if the CS doesn't have virtual buffers,
otherwise they are not added and hw might report VM faults.

This fixes VM faults with:
dEQP-VK.sparse_resources.image_sparse_binding.2d.rgba8ui.1024_128_1

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-08-17 15:00:21 +02:00
Kristian H. Kristensen de3b34df97 freedreno: Add a6xx backend
This adds a freedreno backend for the a6xx generation GPUs, which at
the time of this commit is about 98% GLES2 conformant. Much remains to
be done - both performance work and feature work towards more recent
GLES versions, but this is a good start.

Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-16 19:13:36 -04:00
Rob Clark 6ee58e8257 freedreno: update generated headers
pull in a6xx registers

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-16 19:11:08 -04:00
Kristian H. Kristensen e89683d5a2 freedreno: Fix warnings
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-16 19:11:08 -04:00
Dylan Baker c782168751 scons: Check for mako 0.8.0
v2: - Use distutils to do the version checking

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107565
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2018-08-16 13:53:10 -07:00
Dylan Baker 64e4638130 scons: Require python 2.7
less than 2.7 is not supported.

v2: - Remove check for python >= 2.0, since we've already enforced 2.7

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2018-08-16 13:52:56 -07:00
Dylan Baker 5a8f824d8c meson: use python3 module to find python3
This handy helper is nice for OSes that are not linux or BSD like (mac
and windows) as it knows how to find python3 in odd places.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2018-08-16 13:51:44 -07:00
Dylan Baker 52194ae4df meson: Ensure that mako is >= 0.8.0
It's what autotools has required for a long time.

v3: - Use distutils.version.StrictVersion instead of comparing strings

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2018-08-16 13:50:51 -07:00
Eric Engestrom 03ec672213 svga: simplify Mesa version string
Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-08-16 17:38:31 +01:00
Eric Engestrom bc8abc1adf bin: always define MESA_GIT_SHA1 to make it directly usable in code
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-08-16 17:38:31 +01:00
Eric Engestrom 471f708ed6 git_sha1: simplify logic
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-08-16 17:38:31 +01:00
Eric Engestrom 9a6a631762 i965: drop unused assignment
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-08-16 17:38:31 +01:00
Eric Engestrom 7a1f4340b6 anv: drop cast-to-void of used variable
`device` is used 2 lines below, even visible in the diff context printed.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-08-16 17:38:31 +01:00
Eric Engestrom 6cf0d4f91f anv: use safer snprintf() to ensure NULL string-terminator
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-08-16 17:38:31 +01:00
Eric Engestrom d6aea40326 intel/batch-decoder: replace local ARRAY_LENGTH() macro with global ARRAY_SIZE()
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-08-16 17:38:31 +01:00
Eric Engestrom 81c1989e4f intel: various python cleanups
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-08-16 17:38:25 +01:00
Eric Engestrom aa78b29eba egl: check for buffer overflow *before* corrupting our memory
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-08-16 17:38:22 +01:00
Eric Engestrom eb6b41749b egl/wayland: remove sign from bitfield `formats`
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-08-16 17:38:18 +01:00
Eric Engestrom c5d9b48a71 mailmap: add various typos of Emil's address from the log
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-08-16 17:38:04 +01:00
Eric Engestrom 882ed53946 egl: some spelling fixes
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2018-08-16 14:15:18 +01:00
Samuel Pitoiset f9e8456c39 radv: initialize the DCC predicate correctly when it's compressed
We have to do a fast-clear eliminate when clearing DCC
metadata with 0x20202020. I don't know if that fixes anything
but that seems correct to me.

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-08-16 14:11:51 +02:00
Samuel Pitoiset f3a78a9da0 radv: fix missing initialization of the conditional rendering state
This was missing when VK_EXT_conditional_rendering has been
implemented. The predication type should be -1 to avoid
restoring previous state when performing a decompression pass
with DCC enabled.

Note that we don't have to handle secondary command buffers
because we don't support this feature currently.

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-08-16 14:11:48 +02:00
Eric Engestrom c5dd02287f bin: split `write_if_different()` out
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-08-16 12:33:35 +01:00
Eric Engestrom c2e00f9eee bin: whitespace cleanup
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-08-16 12:30:30 +01:00
Bas Nieuwenhuizen 011a811652 radv: Revert divisor = 0 case for vertex attribute extension.
Seems like DXVK depends on that and it might get reverted
upstream. Since apps are not supposed to use 0 in v2 anyway,
we should be safe implementing the old behavior there.

Fixes: 66e12451ac "radv: Update to new VK_EXT_vertex_attribute_divisor to version 2."
CC: 18.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-08-16 11:13:19 +02:00
Bas Nieuwenhuizen 3308db2dd7 radv: Possible on-demand compilation fix.
Seems that in a single case we use the renderpass before checking
the pipeline, so check the renderpass before we use it.

Fixes: fbcd167314 "radv: Add on-demand compilation of built-in shaders."
Tested-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-08-16 11:13:19 +02:00
Gert Wollny 1560c58b12 mesa/st: fix array indices off-by-one error in remapping
When moving the array sizes from the old list to the new one it was
not taken into account that the array indices start with one, but the
array_size array started at index zero, which resulted in incorrect array
sizes when arrays were merged. Correct this by copying the array_size
values of the retained arrays with an offset of -1.

Also fix whitespaces for the replaced lines.

Fixes: d8c2119f9b
  mesa/st/glsl_to_tgsi: Expose array live range tracking and merging
Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-08-16 08:52:26 +02:00
Alexander Tsoy 9a96bf0ecd meson: fix build for egl platform_x11 without dri3 and gbm
Compiling EGL's platform_x11 without dri3 and gbm yields this compile
failure:

platform_x11 needs inc_loader:

../mesa-18.2.0-rc2/src/egl/drivers/dri2/platform_x11.c:48:10: fatal
error: loader.h: No such file or directory
 #include "loader.h"
          ^~~~~~~~~~

Fixes: 108d257a16 ("meson: build libEGL")
Bugzilla: https://bugs.gentoo.org/663534
Reviewed-by: Matt Turner <mattst88@gmail.com>
2018-08-15 16:37:16 -07:00
Jason Ekstrand 10f44da775 Revert "intel/nir: Call nir_lower_io_to_scalar_early"
Commit 4434591bf5 caused substantially more URB messages in
geometry and tessellation shaders.  Before we can really enable this
sort of optimization,  We either need some way of combining them back
together into vectors or we need to do cross-stage vector element
elimination without splitting everything into scalars.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107510
Fixes: 4434591bf5 "intel/nir: Call nir_lower_io_to_scalar_early"
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>
2018-08-15 17:56:50 -05:00
Erik Faye-Lund da1f7c56da i965: do not emit empty surface state
If called with an empty size, brw_emit_buffer_surface_state asserts.
We already have a dedicated helper for uploading nothing, so let's use
that instead.

Avoids an assert in
dEQP-GLES31.functional.shaders.opaque_type_indexing.ssbo.const_literal_vertex
when running a debug build of i965.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-08-15 23:23:16 +01:00
Sergii Romantsov 743dff1cca intel/ppgtt: 4096 replaced by PAGE_SIZE
Usage of number 4096 replaced by PAGE_SIZE.

Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-08-15 23:23:16 +01:00
Sergii Romantsov 24839663a4 intel/ppgtt: memory address alignment
Kernel (for ppgtt) requires memory address to be
aligned to page size (4096).

-v2: added marking that also fixes initial commit 01058a5522.
-v3: numbers replaced by PAGE_SIZE; buffer-object size is aligned
instead of alignment of offsets (Chris Wilson).
-v4: changes related to PAGE_SIZE moved to separate commit
-v5: restored alignment to page-size for 0-size.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106997
Fixes: a363bb2cd0 (i965: Allocate VMA in userspace for full-PPGTT systems.)
Fixes: 01058a5522 (i965: Add virtual memory allocator infrastructure to brw_bufmgr.)
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-08-15 23:23:16 +01:00
Timothy Arceri f0a8accb0d radv: add Doom workaround
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-08-16 07:53:38 +10:00
Sergii Romantsov efb28aa970 i965: Emitting 3DSTATE_SO_BUFFER of 0-size.
Avoided filling of whole structure and bo-allocation if
size of surface is 0.

Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
2018-08-15 13:15:28 -07:00
Erik Faye-Lund 98b3b6367a virgl: report actual max-texture sizes
Instead of doing conservative guesses, we should report the max levels
based on the max sizes we get from GL on the host.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jakob Bornecrantz <jakob@collabora.com>
2018-08-15 18:48:16 +02:00
Erik Faye-Lund 825aaeae39 virgl: do not use SP_MAX_TEXTURE_*_LEVELS defines
These macro-names are also used for softpipe, so let's avoid confusion
by avoiding them. Besides, they are just used in one place in virgl, so
let's just inline them into the place they are used instead.

While we're at it, fixup an error in the comment for the 3D version.
Mesa subtracts computes max-size by doing by 2^(n-1), which means this
should be 256 cubed, not 512 cubed. The other comments are correct.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jakob Bornecrantz <jakob@collabora.com>
2018-08-15 18:48:08 +02:00
Dylan Baker ef7ae84daf docs: Add news item for 18.1.6 2018-08-15 09:09:59 -07:00
Samuel Pitoiset 71d5b2fbf8 radv: disable the auto-waitcnt-before-barrier LLVM option
This option allows us to remove additional s_waitcnt instructions
because s_barrier internally does s_waitcnt 0.

Though, apparently there is a problem with LDS accesses that
causes rendering issues with FFXV and DXVK. Disable this
optimization for now (RadeonSI still uses it).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107460
CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-08-15 16:21:50 +02:00
Samuel Pitoiset 85113c4d05 radv: fix memory leaks in radv_load_meta_pipeline()
Reported by Coverity.

Fixes: fbcd167314 ("radv: Add on-demand compilation of built-in shaders.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-08-15 16:20:58 +02:00
Samuel Pitoiset 17e79865cf radv: drop wrong initialization of COMPUTE_RESOURCE_LIMITS
The last parameter of radeon_set_sh_reg_seq() is the number of
dwords to emit. We were lucky because WAVES_PER_SH(0x3) is 3 but
it was initialized to 0.

COMPUTE_RESOURCE_LIMITS is correctly set when generating
compute pipelines, so we don't need to initialize it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-08-15 16:20:38 +02:00
Andres Gomez 53b4701cb0 docs: update calendar 18.2.0-rc3 is out
Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-08-15 15:48:18 +03:00
Mauro Rossi 43318d5857 radv/meta_decompress: fix pointer to integer conversion
VK_NULL_HANDLE replaces NULL to avoid following building error:

external/mesa/src/amd/vulkan/radv_meta_decompress.c:365:54: error:
incompatible pointer to integer conversion passing 'void *' to parameter
of type 'VkShaderModule' (aka 'unsigned long long') [-Werror,-Wint-conversion]
                VkResult ret = create_pipeline(cmd_buffer->device, NULL, samples,
                                                                   ^~~~
prebuilts/clang/host/linux-x86/clang-4053586/lib64/clang/5.0.300080/include/stddef.h:105:16:
note: expanded from macro 'NULL'
#  define NULL ((void*)0)
               ^~~~~~~~~~
external/mesa/src/amd/vulkan/radv_meta_decompress.c:97:32:
note: passing argument to parameter 'vs_module_h' here
                VkShaderModule vs_module_h,
                               ^
1 error generated.

Fixes: fbcd167314 ("radv: Add on-demand compilation of built-in shaders.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-08-15 14:34:50 +02:00
Mauro Rossi 73b342c7a5 egl/android: fix regression in drm_gralloc path (v2)
This patch fixes a regression in mesa 18.2 and mesa-dev branches
for HAVE_DRM_GRALLOC code path which is causing black screen on Android
and prevents boot due to SIGSEGV MAPERR crash related to unproper handling
of drm_gralloc drm FD in new droid_open_device() path.

Problem is due to c7bb82136b ("egl/android: Add DRM node probing and filtering")

To avoid the crash the former existing working droid_open_device() is restored,
renamed droid_open_device_drm_gralloc() and kept within HAVE_DRM_GRALLOC braces.

Tested with mesa-dev and mesa 18.2 branch and oreo-x86 bootanimation
and Androdi GUI booting is fixed with i965, nouveau, radeon.
The changes are compatible with gbm_gralloc, I've tested build with hwc too.

(v2) remove indentation from HAVE_DRM_GRALLOC pre-processor directive

NOTE: Definition of enum{} for GRALLOC_MODULE_PERFORM_GET_DRM_FD
is not necessary and it's actually causing a redefinition building error,
because in HAVE_DRM_GRALLOC path gralloc_drm.h is already exported
by libgralloc_drm which is currently still a dependency.

Fixes: c7bb82136b ("egl/android: Add DRM node probing and filtering")
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
2018-08-15 14:07:49 +02:00
Tapani Pälli 656ccf4ef8 mesa: shader dump/read support for ARB programs
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106283
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
2018-08-15 11:03:35 +03:00
Danylo Piliaiev 479a849ad6 glsl: Avoid calling get_array_element for scalar constants
Accessing scalar constant as an array in function call or
initializer list triggered assert in get_array_element.
Examples:
   func(0[0]);
   vec2 t = { 0[0], 0 };

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107550

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2018-08-15 10:01:43 +03:00
Marek Olšák bffa025ada radeonsi: enable 1 missing PS_SU perf counter on Polaris 2018-08-14 21:20:31 -04:00
Marek Olšák df50099834 radeonsi: use radeon_info::name
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-08-14 21:20:31 -04:00
Marek Olšák 84652721b9 ac: add radeon_info::name
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-08-14 21:20:31 -04:00
Marek Olšák de8d5edbc4 radeonsi: split si_clear_buffer to remove enum si_method
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-08-14 21:21:12 -04:00
Marek Olšák 4de92f2abb radeonsi: replace CP_DMA_USE_L2 with enum si_cache_policy
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-08-14 21:21:10 -04:00