5f3cb4c490
zink: create compute programs on bind
...
this simplifies the launch_grid codepath and gets shader binds out
the shader update bitmask
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12532 >
2021-08-25 17:29:10 -04:00
e14ecb903b
zink: avoid hashing shader stages multiple times for new gfx programs
...
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12532 >
2021-08-25 17:29:10 -04:00
4b5e26e678
zink: split gfx shader cache based on stages present
...
this makes the pool of progs in a given hash smaller and also minimizes
the hashing required for a given program
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12532 >
2021-08-25 17:29:08 -04:00
2d54e8da50
zink: track mask of bound gfx shader stages
...
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12532 >
2021-08-25 17:27:45 -04:00
ad6847cf53
zink: inline program cache structs
...
derefs--
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12532 >
2021-08-25 17:27:45 -04:00
bdbcf256a1
zink: return early when getting resource modifer if no modifier is used
...
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12534 >
2021-08-25 21:14:11 +00:00
325fbc3fd2
zink: verify program key sizes before checking for default variant
...
currently keys for shaders are always the same size, but this will change
in the future, at which point the keysize becomes relevant
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12547 >
2021-08-25 21:01:27 +00:00
4a3395f35a
microsoft/compiler: Miscellaneous fixes from running clang-format
...
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12513 >
2021-08-25 20:19:05 +00:00
1aca20be14
microsoft/compiler: Emit a flat interpolation method for SV_SampleIndex
...
We do not want to set an interpolation method for vertex shader inputs.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12513 >
2021-08-25 20:19:05 +00:00
74a24f4f1c
microsoft/compiler: Set the SampleFrequency runtime metadata
...
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12513 >
2021-08-25 20:19:05 +00:00
88220083cf
microsoft/compiler: More robustly handle setting Register=-1
...
This is the 'N/A mask' case in the DXIL disassembly.
This logic is taken from: 7c9e487afd/tools/clang/tools/dxcompiler/dxcdisassembler.cpp (L106)https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12513 >
2021-08-25 20:19:05 +00:00
62c3492d0b
microsoft/compiler: Add support for SV_SampleIndex intrinsic
...
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12513 >
2021-08-25 20:19:05 +00:00
c4b5921d55
pan/bi: Fix format specifiers in disassembler
...
Flagged by cppcheck.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12530 >
2021-08-25 20:03:08 +00:00
589f365d05
pan/bi: Remove unused clause_start field
...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12530 >
2021-08-25 20:03:08 +00:00
1c2bc67fac
pan/bi: Assert l != NULL in bi_ra
...
Confuses cppcheck; indeed, the proof is confusing.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12530 >
2021-08-25 20:03:08 +00:00
b1aa15d582
pan/bi: Simplify condition
...
Flagged by cppcheck.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12530 >
2021-08-25 20:03:08 +00:00
c08423699c
panfrost: Remove unused functions
...
Flagged by cppcheck.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12530 >
2021-08-25 20:03:08 +00:00
e9afd245f4
panfrost: Remove stale TODOs and XXXs
...
These don't meaningfully apply but their comments never got updated.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12530 >
2021-08-25 20:03:08 +00:00
8f25a606b4
panfrost: Remove CACHE_LINE_SIZE #define
...
Not only is it unused, it's totally wrong. Not even a little right.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12530 >
2021-08-25 20:03:08 +00:00
6e05f68924
llvmpipe: rip out cylindrical wrap support
...
Acked-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12505 >
2021-08-25 19:37:16 +00:00
e9cc7f1ae4
softpipe: rip out cylindrical wrap support
...
This is never used, so let's just remove it.
Acked-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12505 >
2021-08-25 19:37:16 +00:00
7b0bda2e55
gallium/tgsi: rip out cylindrical wrap support
...
We never enable this feature, so let's rip it out completely.
Acked-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12505 >
2021-08-25 19:37:16 +00:00
526f7d7790
gallium/tgsi: rip out cylindrical wrap from ureg
...
We always pass zero to these arguments, so this feature isn't in use.
Acked-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12505 >
2021-08-25 19:37:16 +00:00
bd93364ea2
gallium/tgsi: remove unused helper
...
Acked-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12505 >
2021-08-25 19:37:16 +00:00
e26fd607ca
draw/llvmpipe: correct exponent calculation for negative z
...
If the z components here contain negative values, we'll end up with the
wrong maximum value.
This updated equation is taken from the D3D11 functional spec (section
15.10 Depth Bias), which is a bit more clear than the OpenGL spec.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12443 >
2021-08-25 19:12:12 +00:00
0f05c84bba
radv: allow storage images with VK_FORMAT_E5B9G9R9_UFLOAT_PACK32 on GFX10.3+
...
It should be supported.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12543 >
2021-08-25 16:27:46 +00:00
74d1052537
freedreno/a6xx: Fix a6xx gen4 compute shaders
...
I believe the addition of these new regs is related to the changes made
for LPAC ring, so let's key off of that.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12497 >
2021-08-25 15:24:19 +00:00
12a9adbb3b
freedreno/a6xx: Register updates for a6xx gen4
...
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12497 >
2021-08-25 15:24:19 +00:00
ab37109d23
freedreno/a6xx: Updates for tess_use_shared
...
The formula for calculating these two values seems to depend on
tess_use_shared, ie. a6xx_gen3 and a6xx_gen4 match. The existing
calculation matches a6xx_gen1 and a6xx_gen2.
The new formula is based on traces varying # of output (from VS)
varyings from (1..31)*vec4 and vertices from (1..31) and coming up
with something that matches the blob. Once hs_input_size*4 divided
by tcs_vertices_out goes above 64, this deviates a bit from the
blob, but AFAICT it is safe to pick a larger values.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12497 >
2021-08-25 15:24:19 +00:00
31835ac3b8
freedreno/a6xx: Fix streamout with tess_use_shared
...
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12497 >
2021-08-25 15:24:19 +00:00
219e12b7f3
freedreno/a6xx: Rast updates for a6xx gen3
...
Not really sure what these new regs are, but blob emits them as part of
rasterizer state starting with a650.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12497 >
2021-08-25 15:24:19 +00:00
677dbb0e52
freedreno/a6xx: Register updates for a6xx gen3
...
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12497 >
2021-08-25 15:24:19 +00:00
28c5384cf9
freedreno/a6xx: Set type for PC_HS_INPUT_SIZE
...
It is an unsigned integer.. display it as such.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12497 >
2021-08-25 15:24:19 +00:00
8dff5356ff
freedreno/common: Fix comment typo
...
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12497 >
2021-08-25 15:24:19 +00:00
d051b06a48
panfrost: Raise maximum texture size
...
The hardware can handle much larger textures than we allowed. The game
"Cathedral" requires larger textures for some bizarre reason. Raise the
limit so the game runs, syncing MAX_MIP_LEVELS, the comments, and the CAPs.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Closes : #5203
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12312 >
2021-08-25 13:49:17 +00:00
cd489e5388
aco: remove redundant s_and exec after nir_op_inot
...
Totals from 22585 (15.04% of 150170) affected shaders: (GFX10.3)
VGPRs: 1474048 -> 1473904 (-0.01%)
CodeSize: 155238876 -> 155187688 (-0.03%); split: -0.06%, +0.03%
MaxWaves: 385086 -> 385122 (+0.01%)
Instrs: 29297735 -> 29284442 (-0.05%); split: -0.08%, +0.04%
Latency: 675841742 -> 675764151 (-0.01%); split: -0.02%, +0.01%
InvThroughput: 174859037 -> 174854796 (-0.00%); split: -0.01%, +0.01%
VClause: 479790 -> 479781 (-0.00%); split: -0.01%, +0.00%
SClause: 1106900 -> 1106615 (-0.03%); split: -0.03%, +0.01%
Copies: 1829037 -> 1828042 (-0.05%); split: -0.09%, +0.03%
Branches: 859971 -> 859967 (-0.00%); split: -0.00%, +0.00%
PreSGPRs: 1341850 -> 1342356 (+0.04%); split: -0.01%, +0.04%
PreVGPRs: 1327322 -> 1327034 (-0.02%)
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11573 >
2021-08-25 12:43:50 +00:00
abcc83e713
aco: Fix to_uniform_bool_instr when operands are not suitable.
...
Don't attempt to transform uniform boolean instructions when
their operands are unsuitable. This can happen eg. due to other
optimizations that combine SALU instructions which clear out
the uniform instruction labels.
Cc: mesa-stable
Fixes: 8a32f57fffhttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11573 >
2021-08-25 12:43:50 +00:00
a13e79843e
nir: prevent peephole from generating invalid NIR
...
We can't append instructions following a return/halt instruction
because the control flow helpers will modify the successor of the
block containing the return/halt. And the NIR validator enforces that
the return/halt must have the end of the function as successor.
This tends to happen following lower_shader_calls lowering which
inserts halts. This probably doesn't prevent the optimization, it'll
just happen in one of the return shaders after the halt has been
removed.
v2: Move prev block ending check earlier in the function (Daniel)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12506 >
2021-08-25 11:38:21 +00:00
e0a703af11
ci: update the list of expected failures/skips for RADV
...
Against CTS 1.2.7.0.
Tested chips are Pitcairn, Polaris10, Navi14 and Sienna Cichlid.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12539 >
2021-08-25 13:00:07 +02:00
3f5053b899
iris/ci: Add manual jobs for tracking performance
...
Use Piglit's replay profile to measure and store the time that frames
take to render in the GPU.
This job won't run automatically in regular pipelines, but will be
triggered automatically by a script for every successful pre-merge
pipeline.
This is because we want to generate performance data for every relevant
commit merged in main, but we don't want to keep a device busy during
the pre-merge run.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12236 >
2021-08-25 09:32:17 +02:00
cff106c4b6
nir/opt_algebraic: optimize fmax(-fmin(b, a), b) -> fmax(fabs(b), -a)
...
and fmin(-fmax(b, a)) to fmin(-fabs(b), -a).
fossils-db (Sienna Cichlid):
Totals from 34 (0.02% of 150170) affected shaders:
CodeSize: 388540 -> 387748 (-0.20%)
Instrs: 74621 -> 74423 (-0.27%)
Latency: 1039407 -> 1039011 (-0.04%)
InvThroughput: 208364 -> 208150 (-0.10%)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12519 >
2021-08-25 07:18:24 +02:00
ad78643061
crocus: add missing fs dirty on reduced prim change.
...
the reduced prim is used to decide some line antialiasing settings.
this fixes mesa-demos antialias
Fixes: f3630548f1https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12536 >
2021-08-25 03:30:16 +00:00
6b7a68b7c2
crocus: add missing line smooth bits.
...
Just noticed this in passing.
Fixes: f3630548f1https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12536 >
2021-08-25 03:30:16 +00:00
560dc4f790
zink: fix pipeline caching
...
this was apparently always broken, but in a very, very subtle way
where the hash table would compare the current pipeline state against
itself instead of using the cache entry's state
Cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12535 >
2021-08-25 03:11:41 +00:00
712a4d2fd2
zink: fix program init flag
...
this was accidentally !! instead of ! as intended
Fixes: c4702204bchttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12535 >
2021-08-25 03:11:41 +00:00
4237aa3a7e
spirv_to_dxil: Run nir_lower_tex during compilation
...
We need this to get e.g. a default lod for some instructions when it is
not provided.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12462 >
2021-08-24 22:18:30 +00:00
4c260f017c
crocus: drop u_primconvert header.
...
This is just leftover.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12531 >
2021-08-24 21:38:27 +00:00
ea18b0930b
zink: add better TODO note for surface swizzles
...
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12529 >
2021-08-24 21:23:45 +00:00
6ff5eaa7d5
zink: make void swizzle clamping util public
...
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12529 >
2021-08-24 21:23:45 +00:00
52032d5efa
zink: make component mapping function a static inline
...
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12529 >
2021-08-24 21:23:45 +00:00
Mike Blumenkrantz
Michael Tang
Alyssa Rosenzweig
Erik Faye-Lund
Samuel Pitoiset
Rob Clark
Daniel Schürmann
Timur Kristóf
Lionel Landwerlin
Tomeu Vizoso
Dave Airlie
Dave Airlie