mirror of https://gitlab.freedesktop.org/mesa/mesa
ir3: Add scalar ALU-specific passes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075>
This commit is contained in:
Connor Abbott
Marge Bot
parent
4c4234501f
commit
ce6c4f0320
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@ -2056,6 +2056,9 @@ bool ir3_remove_unreachable(struct ir3 *ir);
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/* calculate reconvergence information: */
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void ir3_calc_reconvergence(struct ir3_shader_variant *so);
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/* lower invalid shared phis after calculating reconvergence information: */
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bool ir3_lower_shared_phis(struct ir3 *ir);
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/* dead code elimination: */
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struct ir3_shader_variant;
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bool ir3_dce(struct ir3 *ir, struct ir3_shader_variant *so);
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@ -2063,6 +2066,9 @@ bool ir3_dce(struct ir3 *ir, struct ir3_shader_variant *so);
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/* fp16 conversion folding */
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bool ir3_cf(struct ir3 *ir);
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/* shared mov folding */
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bool ir3_shared_fold(struct ir3 *ir);
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/* copy-propagate: */
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bool ir3_cp(struct ir3 *ir, struct ir3_shader_variant *so);
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@ -2121,6 +2127,21 @@ ir3_has_latency_to_hide(struct ir3 *ir)
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return false;
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}
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/**
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* Move 'instr' to after the last phi node at the beginning of the block:
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*/
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static inline void
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ir3_instr_move_after_phis(struct ir3_instruction *instr,
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struct ir3_block *block)
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{
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struct ir3_instruction *last_phi = ir3_block_get_last_phi(block);
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if (last_phi)
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ir3_instr_move_after(instr, last_phi);
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else
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ir3_instr_move_before_block(instr, block);
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}
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/* ************************************************************************* */
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/* instruction helpers */
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@ -5182,6 +5182,8 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
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ir3_calc_reconvergence(so);
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IR3_PASS(ir, ir3_lower_shared_phis);
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do {
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progress = false;
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@ -5192,6 +5194,7 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
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progress |= IR3_PASS(ir, ir3_cse);
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progress |= IR3_PASS(ir, ir3_dce, so);
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progress |= IR3_PASS(ir, ir3_opt_predicates, so);
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progress |= IR3_PASS(ir, ir3_shared_fold);
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} while (progress);
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/* at this point, for binning pass, throw away unneeded outputs:
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@ -0,0 +1,134 @@
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/*
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* Copyright (C) 2023 Valve Corporation.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "ir3.h"
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#include "util/ralloc.h"
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/* RA cannot handle phis of shared registers where there are extra physical
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* sources, or the sources have extra physical destinations, because these edges
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* are critical edges that we cannot resolve copies along. Here's a contrived
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* example:
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*
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* loop {
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* if non-uniform {
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* if uniform {
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* x_1 = ...;
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* continue;
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* }
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* x_2 = ...;
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* } else {
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* break;
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* }
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* // continue block
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* x_3 = phi(x_1, x_2)
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* }
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*
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* Assuming x_1 and x_2 are uniform, x_3 will also be uniform, because all
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* threads that stay in the loop take the same branch to the continue block,
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* however execution may fall through from the assignment to x_2 to the
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* break statement because the outer if is non-uniform, and then it will fall
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* through again to the continue block. In cases like this we have to demote the
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* phi to normal registers and insert movs around it (which will probably be
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* coalesced).
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*/
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static void
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lower_phi(void *ctx, struct ir3_instruction *phi)
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{
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struct ir3_block *block = phi->block;
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for (unsigned i = 0; i < block->predecessors_count; i++) {
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struct ir3_block *pred = block->predecessors[i];
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if (phi->srcs[i]->def) {
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struct ir3_instruction *pred_mov = ir3_instr_create(pred, OPC_MOV, 1, 1);
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pred_mov->uses = _mesa_pointer_set_create(ctx);
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__ssa_dst(pred_mov)->flags |= (phi->srcs[i]->flags & IR3_REG_HALF);
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unsigned src_flags = IR3_REG_SSA | IR3_REG_SHARED |
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(phi->srcs[i]->flags & IR3_REG_HALF);
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ir3_src_create(pred_mov, INVALID_REG, src_flags)->def =
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phi->srcs[i]->def;
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pred_mov->cat1.src_type = pred_mov->cat1.dst_type =
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(src_flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32;
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_mesa_set_remove_key(phi->srcs[i]->def->instr->uses, phi);
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_mesa_set_add(phi->srcs[i]->def->instr->uses, pred_mov);
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phi->srcs[i]->def = pred_mov->dsts[0];
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}
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phi->srcs[i]->flags &= ~IR3_REG_SHARED;
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}
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phi->dsts[0]->flags &= ~IR3_REG_SHARED;
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struct ir3_instruction *shared_mov =
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ir3_MOV(block, phi,
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(phi->dsts[0]->flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32);
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shared_mov->uses = _mesa_pointer_set_create(ctx);
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shared_mov->dsts[0]->flags |= IR3_REG_SHARED;
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ir3_instr_move_after_phis(shared_mov, block);
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foreach_ssa_use (use, phi) {
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for (unsigned i = 0; i < use->srcs_count; i++) {
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if (use->srcs[i]->def == phi->dsts[0])
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use->srcs[i]->def = shared_mov->dsts[0];
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}
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}
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}
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bool
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ir3_lower_shared_phis(struct ir3 *ir)
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{
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void *mem_ctx = ralloc_context(NULL);
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bool progress = false;
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ir3_find_ssa_uses(ir, mem_ctx, false);
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foreach_block (block, &ir->block_list) {
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bool pred_physical_edge = false;
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for (unsigned i = 0; i < block->predecessors_count; i++) {
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unsigned successors_count =
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block->predecessors[i]->successors[1] ? 2 : 1;
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if (block->predecessors[i]->physical_successors_count > successors_count) {
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pred_physical_edge = true;
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break;
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}
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}
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if (!pred_physical_edge &&
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block->physical_predecessors_count == block->predecessors_count)
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continue;
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foreach_instr_safe (phi, &block->instr_list) {
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if (phi->opc != OPC_META_PHI)
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break;
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if (!(phi->dsts[0]->flags & IR3_REG_SHARED))
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continue;
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lower_phi(mem_ctx, phi);
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progress = true;
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}
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}
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ralloc_free(mem_ctx);
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return progress;
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}
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@ -0,0 +1,150 @@
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/*
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* Copyright (C) 2023 Valve Corporation.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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/* Try to fold a shared -> non-shared mov into the instruction producing the
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* shared src. We do this aggresively, even if there are other uses of the
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* source, on the assumption that the "default" state should be non-shared and
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* we should be able to fold the other sources eventually.
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*/
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#include "util/ralloc.h"
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#include "ir3.h"
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static bool
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try_shared_folding(struct ir3_instruction *mov, void *mem_ctx)
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{
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if (mov->opc != OPC_MOV)
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return false;
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if ((mov->dsts[0]->flags & IR3_REG_SHARED) ||
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!(mov->srcs[0]->flags & IR3_REG_SHARED))
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return false;
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struct ir3_instruction *src = ssa(mov->srcs[0]);
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if (!src)
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return false;
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if (mov->cat1.dst_type != mov->cat1.src_type) {
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/* Check if the conversion can be folded into the source by ir3_cf */
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bool can_fold;
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type_t output_type = ir3_output_conv_type(src, &can_fold);
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if (!can_fold || output_type != TYPE_U32)
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return false;
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foreach_ssa_use (use, src) {
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if (use->opc != OPC_MOV ||
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use->cat1.src_type != mov->cat1.src_type ||
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use->cat1.dst_type != mov->cat1.dst_type)
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return false;
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}
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}
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if (src->opc == OPC_META_PHI) {
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struct ir3_block *block = src->block;
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for (unsigned i = 0; i < block->predecessors_count; i++) {
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struct ir3_block *pred = block->predecessors[i];
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if (src->srcs[i]->def) {
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struct ir3_instruction *pred_mov = ir3_instr_create(pred, OPC_MOV, 1, 1);
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__ssa_dst(pred_mov)->flags |= (src->srcs[i]->flags & IR3_REG_HALF);
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unsigned src_flags = IR3_REG_SSA | IR3_REG_SHARED |
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(src->srcs[i]->flags & IR3_REG_HALF);
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ir3_src_create(pred_mov, INVALID_REG, src_flags)->def =
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src->srcs[i]->def;
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pred_mov->cat1.src_type = pred_mov->cat1.dst_type =
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(src_flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32;
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_mesa_set_remove_key(src->srcs[i]->def->instr->uses, src);
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_mesa_set_add(src->srcs[i]->def->instr->uses, pred_mov);
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src->srcs[i]->def = pred_mov->dsts[0];
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}
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src->srcs[i]->flags &= ~IR3_REG_SHARED;
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}
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} else if (opc_cat(src->opc) == 2 && src->srcs_count >= 2) {
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/* cat2 vector ALU instructions cannot have both shared sources */
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if ((src->srcs[0]->flags & (IR3_REG_SHARED | IR3_REG_CONST)) &&
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(src->srcs[1]->flags & (IR3_REG_SHARED | IR3_REG_CONST)))
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return false;
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} else if (opc_cat(src->opc) == 3) {
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/* cat3 vector ALU instructions cannot have src1 shared */
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if (src->srcs[1]->flags & IR3_REG_SHARED)
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return false;
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} else if (src->opc == OPC_LDC) {
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src->flags &= ~IR3_INSTR_U;
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} else {
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return false;
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}
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/* Remove IR3_REG_SHARED from the original destination, which should make the
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* mov trivial so that it can be cleaned up later by copy prop.
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*/
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src->dsts[0]->flags &= ~IR3_REG_SHARED;
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mov->srcs[0]->flags &= ~IR3_REG_SHARED;
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/* Insert a copy to shared for uses other than this move instruction. */
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struct ir3_instruction *shared_mov = NULL;
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foreach_ssa_use (use, src) {
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if (use == mov)
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continue;
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if (!shared_mov) {
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shared_mov = ir3_MOV(src->block, src, mov->cat1.src_type);
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shared_mov->dsts[0]->flags |= IR3_REG_SHARED;
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if (src->opc == OPC_META_PHI)
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ir3_instr_move_after_phis(shared_mov, src->block);
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else
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ir3_instr_move_after(shared_mov, src);
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shared_mov->uses = _mesa_pointer_set_create(mem_ctx);
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}
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for (unsigned i = 0; i < use->srcs_count; i++) {
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if (use->srcs[i]->def == src->dsts[0])
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use->srcs[i]->def = shared_mov->dsts[0];
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}
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_mesa_set_add(shared_mov->uses, use);
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}
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return true;
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}
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bool
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ir3_shared_fold(struct ir3 *ir)
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{
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void *mem_ctx = ralloc_context(NULL);
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bool progress = false;
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ir3_find_ssa_uses(ir, mem_ctx, false);
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/* Folding a phi can push the mov up to its sources, so iterate blocks in
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* reverse to try and convert an entire phi-web in one go.
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*/
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foreach_block_rev (block, &ir->block_list) {
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foreach_instr (instr, &block->instr_list) {
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progress |= try_shared_folding(instr, mem_ctx);
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}
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}
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ralloc_free(mem_ctx);
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return progress;
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}
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@ -97,6 +97,7 @@ libfreedreno_ir3_files = files(
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'ir3_legalize_relative.c',
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'ir3_liveness.c',
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'ir3_lower_parallelcopy.c',
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'ir3_lower_shared_phi.c',
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'ir3_lower_spill.c',
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'ir3_lower_subgroups.c',
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'ir3_merge_regs.c',
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@ -127,6 +128,7 @@ libfreedreno_ir3_files = files(
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'ir3_sched.c',
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'ir3_shader.c',
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'ir3_shader.h',
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'ir3_shared_folding.c',
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'ir3_shared_ra.c',
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'ir3_spill.c',
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'ir3_validate.c',
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