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Code Issues 9 Packages Projects Releases Wiki Activity

vulkan: Set SPIR-V caps from supported features 

Any drivers which use vk_spirv_to_nir() now no longer need to build a
caps table manually.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
This commit is contained in:
Faith Ekstrand 2024-04-24 11:45:55 -05:00 committed by Marge Bot
parent 1759c0eba7
commit ce2946ae0f
9 changed files with 8 additions and 264 deletions
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19
src/broadcom/vulkan/v3dv_pipeline.c
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@ -161,25 +161,6 @@ v3dv_DestroyPipeline(VkDevice _device,
}
static const struct spirv_to_nir_options default_spirv_options = {
.caps = {
.device_group = true,
.float_controls = true,
.multiview = true,
.storage_8bit = true,
.storage_16bit = true,
.subgroup_ballot = true,
.subgroup_basic = true,
.subgroup_quad = true,
.subgroup_shuffle = true,
.subgroup_vote = true,
.variable_pointers = true,
.vk_memory_model = true,
.vk_memory_model_device_scope = true,
.physical_storage_buffer_address = true,
.workgroup_memory_explicit_layout = true,
.image_read_without_format = true,
.demote_to_helper_invocation = true,
},
.ubo_addr_format = nir_address_format_32bit_index_offset,
.ssbo_addr_format = nir_address_format_32bit_index_offset,
.phys_ssbo_addr_format = nir_address_format_2x32bit_global,

34
src/freedreno/vulkan/tu_shader.cc
View File

@ -38,40 +38,6 @@ tu_spirv_to_nir(struct tu_device *dev,
/* Use 16-bit math for RelaxedPrecision ALU ops */
.mediump_16bit_alu = true,
.caps = {
.demote_to_helper_invocation = true,
.descriptor_array_dynamic_indexing = true,
.descriptor_array_non_uniform_indexing = true,
.descriptor_indexing = true,
.device_group = true,
.draw_parameters = true,
.float_controls = true,
.float16 = true,
.fragment_density = true,
.geometry_streams = true,
.image_read_without_format = true,
.image_write_without_format = true,
.int16 = true,
.multiview = true,
.physical_storage_buffer_address = true,
.post_depth_coverage = true,
.runtime_descriptor_array = true,
.shader_viewport_index_layer = true,
.stencil_export = true,
.storage_16bit = dev->physical_device->info->a6xx.storage_16bit,
.subgroup_arithmetic = true,
.subgroup_ballot = true,
.subgroup_basic = true,
.subgroup_quad = true,
.subgroup_shuffle = true,
.subgroup_vote = true,
.tessellation = true,
.transform_feedback = true,
.variable_pointers = true,
.vk_memory_model_device_scope = true,
.vk_memory_model = true,
},
.ubo_addr_format = nir_address_format_vec2_index_32bit_offset,
.ssbo_addr_format = nir_address_format_vec2_index_32bit_offset,

52
src/gallium/frontends/lavapipe/lvp_pipeline.c
View File

@ -302,58 +302,6 @@ compile_spirv(struct lvp_device *pdevice, const VkPipelineShaderStageCreateInfo
const struct spirv_to_nir_options spirv_options = {
.environment = NIR_SPIRV_VULKAN,
.caps = {
.float64 = (pdevice->pscreen->get_param(pdevice->pscreen, PIPE_CAP_DOUBLES) == 1),
.int16 = true,
.int64 = (pdevice->pscreen->get_param(pdevice->pscreen, PIPE_CAP_INT64) == 1),
.tessellation = true,
.float_controls = true,
.float32_atomic_add = true,
#if LLVM_VERSION_MAJOR >= 15
.float32_atomic_min_max = true,
#endif
.image_ms_array = true,
.image_read_without_format = true,
.image_write_without_format = true,
.storage_image_ms = true,
.geometry_streams = true,
.storage_8bit = true,
.storage_16bit = true,
.variable_pointers = true,
.stencil_export = true,
.post_depth_coverage = true,
.transform_feedback = true,
.device_group = true,
.draw_parameters = true,
.shader_viewport_index_layer = true,
.shader_clock = true,
.multiview = true,
.physical_storage_buffer_address = true,
.int64_atomics = true,
.subgroup_arithmetic = true,
.subgroup_basic = true,
.subgroup_ballot = true,
.subgroup_quad = true,
#if LLVM_VERSION_MAJOR >= 10
.subgroup_shuffle = true,
#endif
.subgroup_vote = true,
.vk_memory_model = true,
.vk_memory_model_device_scope = true,
.int8 = true,
.float16 = true,
.demote_to_helper_invocation = true,
.mesh_shading = true,
.descriptor_array_dynamic_indexing = true,
.descriptor_array_non_uniform_indexing = true,
.descriptor_indexing = true,
.runtime_descriptor_array = true,
.shader_enqueue = true,
.ray_query = true,
.ray_cull_mask = true,
.ray_tracing = true,
.ray_tracing_position_fetch = true,
},
.ubo_addr_format = nir_address_format_vec2_index_32bit_offset,
.ssbo_addr_format = nir_address_format_vec2_index_32bit_offset,
.phys_ssbo_addr_format = nir_address_format_64bit_global,

62
src/intel/vulkan/anv_pipeline.c
View File

@ -141,69 +141,7 @@ anv_shader_stage_to_nir(struct anv_device *device,
const nir_shader_compiler_options *nir_options =
compiler->nir_options[stage];
const bool rt_enabled = ANV_SUPPORT_RT && pdevice->info.has_ray_tracing;
const struct spirv_to_nir_options spirv_options = {
.caps = {
.amd_image_gather_bias_lod = pdevice->info.ver >= 20,
.cooperative_matrix = anv_has_cooperative_matrix(pdevice),
.demote_to_helper_invocation = true,
.derivative_group = true,
.descriptor_array_dynamic_indexing = true,
.descriptor_array_non_uniform_indexing = true,
.descriptor_indexing = true,
.device_group = true,
.draw_parameters = true,
.float16 = true,
.float32_atomic_add = pdevice->info.has_lsc,
.float32_atomic_min_max = true,
.float64 = true,
.float64_atomic_min_max = pdevice->info.has_lsc,
.fragment_shader_sample_interlock = true,
.fragment_shader_pixel_interlock = true,
.geometry_streams = true,
.image_read_without_format = true,
.image_write_without_format = true,
.int8 = true,
.int16 = true,
.int64 = true,
.int64_atomics = true,
.integer_functions2 = true,
.mesh_shading = pdevice->vk.supported_extensions.EXT_mesh_shader,
.mesh_shading_nv = false,
.min_lod = true,
.multiview = true,
.physical_storage_buffer_address = true,
.post_depth_coverage = true,
.quad_control = true,
.runtime_descriptor_array = true,
.float_controls = true,
.float_controls2 = true,
.ray_cull_mask = rt_enabled,
.ray_query = rt_enabled,
.ray_tracing = rt_enabled,
.ray_tracing_position_fetch = rt_enabled,
.shader_clock = true,
.shader_viewport_index_layer = true,
.sparse_residency = pdevice->sparse_type != ANV_SPARSE_TYPE_NOT_SUPPORTED,
.stencil_export = true,
.storage_8bit = true,
.storage_16bit = true,
.subgroup_arithmetic = true,
.subgroup_basic = true,
.subgroup_ballot = true,
.subgroup_dispatch = true,
.subgroup_quad = true,
.subgroup_rotate = true,
.subgroup_shuffle = true,
.subgroup_vote = true,
.tessellation = true,
.transform_feedback = true,
.variable_pointers = true,
.vk_memory_model = true,
.vk_memory_model_device_scope = true,
.workgroup_memory_explicit_layout = true,
.fragment_shading_rate = pdevice->info.ver >= 11,
},
.ubo_addr_format = anv_nir_ubo_addr_format(pdevice, robust_flags),
.ssbo_addr_format = anv_nir_ssbo_addr_format(pdevice, robust_flags),
.phys_ssbo_addr_format = nir_address_format_64bit_global,

48
src/intel/vulkan_hasvk/anv_pipeline.c
View File

@ -58,54 +58,6 @@ anv_shader_stage_to_nir(struct anv_device *device,
compiler->nir_options[stage];
const struct spirv_to_nir_options spirv_options = {
.caps = {
.demote_to_helper_invocation = true,
.derivative_group = true,
.descriptor_array_dynamic_indexing = true,
.descriptor_array_non_uniform_indexing = true,
.descriptor_indexing = true,
.device_group = true,
.draw_parameters = true,
.float16 = pdevice->info.ver >= 8,
.float32_atomic_add = pdevice->info.has_lsc,
.float32_atomic_min_max = pdevice->info.ver >= 9,
.float64 = pdevice->info.ver >= 8,
.float64_atomic_min_max = pdevice->info.has_lsc,
.fragment_shader_sample_interlock = pdevice->info.ver >= 9,
.fragment_shader_pixel_interlock = pdevice->info.ver >= 9,
.geometry_streams = true,
.image_read_without_format = true,
.image_write_without_format = true,
.int8 = pdevice->info.ver >= 8,
.int16 = pdevice->info.ver >= 8,
.int64 = pdevice->info.ver >= 8,
.int64_atomics = pdevice->info.ver >= 9 && pdevice->use_softpin,
.integer_functions2 = pdevice->info.ver >= 8,
.min_lod = true,
.multiview = true,
.physical_storage_buffer_address = pdevice->has_a64_buffer_access,
.post_depth_coverage = pdevice->info.ver >= 9,
.runtime_descriptor_array = true,
.float_controls = true,
.shader_clock = true,
.shader_viewport_index_layer = true,
.stencil_export = pdevice->info.ver >= 9,
.storage_8bit = pdevice->info.ver >= 8,
.storage_16bit = pdevice->info.ver >= 8,
.subgroup_arithmetic = true,
.subgroup_basic = true,
.subgroup_ballot = true,
.subgroup_dispatch = true,
.subgroup_quad = true,
.subgroup_shuffle = true,
.subgroup_vote = true,
.tessellation = true,
.transform_feedback = true,
.variable_pointers = true,
.vk_memory_model = true,
.vk_memory_model_device_scope = true,
.workgroup_memory_explicit_layout = true,
},
.ubo_addr_format = anv_nir_ubo_addr_format(pdevice, robust_flags),
.ssbo_addr_format = anv_nir_ssbo_addr_format(pdevice, robust_flags),
.phys_ssbo_addr_format = nir_address_format_64bit_global,

45
src/nouveau/vulkan/nvk_shader.c
View File

@ -121,51 +121,6 @@ nvk_get_spirv_options(struct vk_physical_device *vk_pdev,
container_of(vk_pdev, struct nvk_physical_device, vk);
return (struct spirv_to_nir_options) {
.caps = {
.demote_to_helper_invocation = true,
.descriptor_array_dynamic_indexing = true,
.descriptor_array_non_uniform_indexing = true,
.descriptor_indexing = true,
.device_group = true,
.draw_parameters = true,
.float_controls = true,
.float16 = true,
.float64 = true,
.fragment_barycentric = true,
.geometry_streams = true,
.image_atomic_int64 = true,
.image_ms_array = true,
.image_read_without_format = true,
.image_write_without_format = true,
.int8 = true,
.int16 = true,
.int64 = true,
.int64_atomics = true,
.min_lod = true,
.multiview = true,
.physical_storage_buffer_address = true,
.runtime_descriptor_array = true,
.shader_clock = true,
.shader_sm_builtins_nv = true,
.shader_viewport_index_layer = true,
.sparse_residency = true,
.storage_8bit = true,
.storage_16bit = true,
.storage_image_ms = true,
.subgroup_arithmetic = true,
.subgroup_ballot = true,
.subgroup_basic = true,
.subgroup_quad = true,
.subgroup_rotate = true,
.subgroup_shuffle = true,
.subgroup_vote = true,
.tessellation = true,
.transform_feedback = true,
.variable_pointers = true,
.vk_memory_model_device_scope = true,
.vk_memory_model = true,
.workgroup_memory_explicit_layout = true,
},
.ssbo_addr_format = nvk_buffer_addr_format(rs->storage_buffers),
.phys_ssbo_addr_format = nir_address_format_64bit_global,
.ubo_addr_format = nvk_buffer_addr_format(rs->uniform_buffers),

4
src/panfrost/vulkan/panvk_vX_shader.c
View File

@ -235,10 +235,6 @@ panvk_per_arch(shader_create)(struct panvk_device *dev, gl_shader_stage stage,
/* TODO these are made-up */
const struct spirv_to_nir_options spirv_options = {
.caps =
{
.variable_pointers = true,
},
.ubo_addr_format = nir_address_format_32bit_index_offset,
.ssbo_addr_format = dev->vk.enabled_features.robustBufferAccess
? nir_address_format_64bit_bounded_global

6
src/vulkan/runtime/vk_nir.c
View File

@ -26,7 +26,9 @@
#include "compiler/nir/nir_xfb_info.h"
#include "compiler/spirv/nir_spirv.h"
#include "vk_device.h"
#include "vk_log.h"
#include "vk_physical_device.h"
#include "vk_util.h"
#define SPIR_V_MAGIC_NUMBER 0x07230203
@ -126,7 +128,11 @@ vk_spirv_to_nir(struct vk_device *device,
assert(spirv_size_B >= 4 && spirv_size_B % 4 == 0);
assert(spirv_data[0] == SPIR_V_MAGIC_NUMBER);
const struct spirv_capabilities spirv_caps =
vk_physical_device_get_spirv_capabilities(device->physical);
struct spirv_to_nir_options spirv_options_local = *spirv_options;
spirv_options_local.capabilities = &spirv_caps;
spirv_options_local.debug.func = spirv_nir_debug;
spirv_options_local.debug.private_data = (void *)device;
spirv_options_local.subgroup_size = subgroup_size;

2
src/vulkan/runtime/vk_physical_device.h
View File

@ -29,6 +29,8 @@
#include "vk_physical_device_features.h"
#include "vk_physical_device_properties.h"
#include "compiler/spirv/spirv_info.h"
#include "util/list.h"
#ifdef __cplusplus