mirror of https://gitlab.freedesktop.org/mesa/mesa
ac/llvm: always trim components of texture instructions, trim DMASK
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28725>
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@ -3959,6 +3959,10 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
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if (sample_index && (instr->op == nir_texop_txf_ms || instr->op == nir_texop_fragment_fetch_amd))
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args.coords[instr->coord_components] = sample_index;
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bool is_new_style_shadow = instr->is_shadow && instr->is_new_style_shadow &&
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instr->op != nir_texop_lod && instr->op != nir_texop_tg4;
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unsigned num_components = util_last_bit(nir_def_components_read(&instr->def));
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/* DMASK was repurposed for GATHER4. 4 components are always
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* returned and DMASK works like a swizzle - it selects
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* the component to fetch. The only valid DMASK values are
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@ -3966,12 +3970,15 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
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* (red,red,red,red) etc.) The ISA document doesn't mention
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* this.
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*/
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args.dmask = 0xf;
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if (instr->op == nir_texop_tg4) {
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if (instr->is_shadow)
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args.dmask = 1;
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else
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args.dmask = 1 << instr->component;
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} else if (is_new_style_shadow || instr->op == nir_texop_fragment_mask_fetch_amd) {
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args.dmask = 1;
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} else {
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args.dmask = BITFIELD_MASK(num_components);
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}
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if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
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@ -4010,8 +4017,7 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
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result = ac_trim_vector(&ctx->ac, result, 4);
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}
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if (instr->is_shadow && instr->is_new_style_shadow &&
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instr->op != nir_texop_lod && instr->op != nir_texop_tg4)
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if (is_new_style_shadow)
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result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
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else if (instr->op == nir_texop_fragment_mask_fetch_amd) {
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/* Use 0x76543210 if the image doesn't have FMASK. */
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@ -4021,8 +4027,8 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
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result = LLVMBuildSelect(ctx->ac.builder, tmp,
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LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, ""),
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LLVMConstInt(ctx->ac.i32, 0x76543210, false), "");
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} else if (nir_tex_instr_result_size(instr) != 4)
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result = ac_trim_vector(&ctx->ac, result, instr->def.num_components);
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} else
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result = ac_trim_vector(&ctx->ac, result, num_components);
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if (instr->is_sparse)
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result = ac_build_concat(&ctx->ac, result, code);
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