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radv: add radv_sqtt.h 

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28551>
This commit is contained in:
Samuel Pitoiset 2024-04-02 09:31:42 +02:00 committed by Marge Bot
parent a313d5f82a
commit c1414a9799
11 changed files with 151 additions and 82 deletions
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1
src/amd/vulkan/layers/radv_sqtt_layer.c
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@ -26,6 +26,7 @@
#include "radv_private.h"
#include "radv_queue.h"
#include "radv_shader.h"
#include "radv_sqtt.h"
#include "vk_common_entrypoints.h"
#include "vk_semaphore.h"

1
src/amd/vulkan/meson.build
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@ -163,6 +163,7 @@ libradv_files = files(
'radv_shader_object.c',
'radv_spm.c',
'radv_sqtt.c',
'radv_sqtt.h',
'radv_query.c',
'radv_query.h',
'radv_video.c',

1
src/amd/vulkan/meta/radv_meta.h
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@ -39,6 +39,7 @@
#include "radv_private.h"
#include "radv_queue.h"
#include "radv_shader.h"
#include "radv_sqtt.h"
#ifdef __cplusplus
extern "C" {

1
src/amd/vulkan/radv_acceleration_structure.c
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@ -22,6 +22,7 @@
*/
#include "radv_private.h"
#include "radv_sqtt.h"
#include "meta/radv_meta.h"
#include "nir_builder.h"

1
src/amd/vulkan/radv_cmd_buffer.c
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@ -34,6 +34,7 @@
#include "radv_private.h"
#include "radv_radeon_winsys.h"
#include "radv_shader.h"
#include "radv_sqtt.h"
#include "sid.h"
#include "vk_common_entrypoints.h"
#include "vk_enum_defines.h"

1
src/amd/vulkan/radv_device.c
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@ -51,6 +51,7 @@
#include "radv_formats.h"
#include "radv_private.h"
#include "radv_shader.h"
#include "radv_sqtt.h"
#include "vk_common_entrypoints.h"
#include "vk_pipeline_cache.h"
#include "vk_semaphore.h"

1
src/amd/vulkan/radv_perfcounter.c
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@ -28,6 +28,7 @@
#include "radv_cs.h"
#include "radv_perfcounter.h"
#include "radv_private.h"
#include "radv_sqtt.h"
#include "sid.h"
void

82
src/amd/vulkan/radv_private.h
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@ -1026,26 +1026,6 @@ void llvm_compile_shader(const struct radv_nir_compiler_options *options, const
unsigned shader_count, struct nir_shader *const *shaders, struct radv_shader_binary **binary,
const struct radv_shader_args *args);
bool radv_sqtt_init(struct radv_device *device);
void radv_sqtt_finish(struct radv_device *device);
bool radv_begin_sqtt(struct radv_queue *queue);
bool radv_end_sqtt(struct radv_queue *queue);
bool radv_get_sqtt_trace(struct radv_queue *queue, struct ac_sqtt_trace *sqtt_trace);
void radv_reset_sqtt_trace(struct radv_device *device);
void radv_emit_sqtt_userdata(const struct radv_cmd_buffer *cmd_buffer, const void *data, uint32_t num_dwords);
bool radv_is_instruction_timing_enabled(void);
bool radv_sqtt_queue_events_enabled(void);
bool radv_sqtt_sample_clocks(struct radv_device *device);
void radv_emit_inhibit_clockgating(const struct radv_device *device, struct radeon_cmdbuf *cs, bool inhibit);
void radv_emit_spi_config_cntl(const struct radv_device *device, struct radeon_cmdbuf *cs, bool enable);
VkResult radv_sqtt_get_timed_cmdbuf(struct radv_queue *queue, struct radeon_winsys_bo *timestamp_bo,
uint32_t timestamp_offset, VkPipelineStageFlags2 timestamp_stage,
VkCommandBuffer *pcmdbuf);
VkResult radv_sqtt_acquire_gpu_timestamp(struct radv_device *device, struct radeon_winsys_bo **gpu_timestamp_bo,
uint32_t *gpu_timestamp_offset, void **gpu_timestamp_ptr);
void radv_memory_trace_init(struct radv_device *device);
void radv_rmv_log_bo_allocate(struct radv_device *device, struct radeon_winsys_bo *bo, bool is_internal);
@ -1077,68 +1057,6 @@ void radv_rmv_fill_device_info(const struct radv_physical_device *pdev, struct v
void radv_rmv_collect_trace_events(struct radv_device *device);
void radv_memory_trace_finish(struct radv_device *device);
/* radv_sqtt_layer_.c */
struct radv_barrier_data {
union {
struct {
uint16_t depth_stencil_expand : 1;
uint16_t htile_hiz_range_expand : 1;
uint16_t depth_stencil_resummarize : 1;
uint16_t dcc_decompress : 1;
uint16_t fmask_decompress : 1;
uint16_t fast_clear_eliminate : 1;
uint16_t fmask_color_expand : 1;
uint16_t init_mask_ram : 1;
uint16_t reserved : 8;
};
uint16_t all;
} layout_transitions;
};
/**
* Value for the reason field of an RGP barrier start marker originating from
* the Vulkan client (does not include PAL-defined values). (Table 15)
*/
enum rgp_barrier_reason {
RGP_BARRIER_UNKNOWN_REASON = 0xFFFFFFFF,
/* External app-generated barrier reasons, i.e. API synchronization
* commands Range of valid values: [0x00000001 ... 0x7FFFFFFF].
*/
RGP_BARRIER_EXTERNAL_CMD_PIPELINE_BARRIER = 0x00000001,
RGP_BARRIER_EXTERNAL_RENDER_PASS_SYNC = 0x00000002,
RGP_BARRIER_EXTERNAL_CMD_WAIT_EVENTS = 0x00000003,
/* Internal barrier reasons, i.e. implicit synchronization inserted by
* the Vulkan driver Range of valid values: [0xC0000000 ... 0xFFFFFFFE].
*/
RGP_BARRIER_INTERNAL_BASE = 0xC0000000,
RGP_BARRIER_INTERNAL_PRE_RESET_QUERY_POOL_SYNC = RGP_BARRIER_INTERNAL_BASE + 0,
RGP_BARRIER_INTERNAL_POST_RESET_QUERY_POOL_SYNC = RGP_BARRIER_INTERNAL_BASE + 1,
RGP_BARRIER_INTERNAL_GPU_EVENT_RECYCLE_STALL = RGP_BARRIER_INTERNAL_BASE + 2,
RGP_BARRIER_INTERNAL_PRE_COPY_QUERY_POOL_RESULTS_SYNC = RGP_BARRIER_INTERNAL_BASE + 3
};
void radv_describe_begin_cmd_buffer(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_end_cmd_buffer(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_draw(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_dispatch(struct radv_cmd_buffer *cmd_buffer, const struct radv_dispatch_info *info);
void radv_describe_begin_render_pass_clear(struct radv_cmd_buffer *cmd_buffer, VkImageAspectFlagBits aspects);
void radv_describe_end_render_pass_clear(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_begin_render_pass_resolve(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_end_render_pass_resolve(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_barrier_start(struct radv_cmd_buffer *cmd_buffer, enum rgp_barrier_reason reason);
void radv_describe_barrier_end(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_barrier_end_delayed(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_layout_transition(struct radv_cmd_buffer *cmd_buffer, const struct radv_barrier_data *barrier);
void radv_describe_begin_accel_struct_build(struct radv_cmd_buffer *cmd_buffer, uint32_t count);
void radv_describe_end_accel_struct_build(struct radv_cmd_buffer *cmd_buffer);
void radv_sqtt_emit_relocated_shaders(struct radv_cmd_buffer *cmd_buffer, struct radv_graphics_pipeline *pipeline);
void radv_write_user_event_marker(struct radv_cmd_buffer *cmd_buffer, enum rgp_sqtt_marker_user_event_type type,
const char *str);
ALWAYS_INLINE static bool
radv_is_streamout_enabled(struct radv_cmd_buffer *cmd_buffer)
{

1
src/amd/vulkan/radv_sqtt.c
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@ -28,6 +28,7 @@
#include "radv_debug.h"
#include "radv_perfcounter.h"
#include "radv_private.h"
#include "radv_sqtt.h"
#include "sid.h"
#include "vk_common_entrypoints.h"

142
src/amd/vulkan/radv_sqtt.h Normal file
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@ -0,0 +1,142 @@
/*
* Copyright © 2016 Red Hat.
* Copyright © 2016 Bas Nieuwenhuizen
*
* based in part on anv driver which is:
* Copyright © 2015 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#ifndef RADV_SQTT_H
#define RADV_SQTT_H
#include "radv_device.h"
struct radv_cmd_buffer;
struct radv_dispatch_info;
struct radv_graphics_pipeline;
struct radv_barrier_data {
union {
struct {
uint16_t depth_stencil_expand : 1;
uint16_t htile_hiz_range_expand : 1;
uint16_t depth_stencil_resummarize : 1;
uint16_t dcc_decompress : 1;
uint16_t fmask_decompress : 1;
uint16_t fast_clear_eliminate : 1;
uint16_t fmask_color_expand : 1;
uint16_t init_mask_ram : 1;
uint16_t reserved : 8;
};
uint16_t all;
} layout_transitions;
};
/**
* Value for the reason field of an RGP barrier start marker originating from
* the Vulkan client (does not include PAL-defined values). (Table 15)
*/
enum rgp_barrier_reason {
RGP_BARRIER_UNKNOWN_REASON = 0xFFFFFFFF,
/* External app-generated barrier reasons, i.e. API synchronization
* commands Range of valid values: [0x00000001 ... 0x7FFFFFFF].
*/
RGP_BARRIER_EXTERNAL_CMD_PIPELINE_BARRIER = 0x00000001,
RGP_BARRIER_EXTERNAL_RENDER_PASS_SYNC = 0x00000002,
RGP_BARRIER_EXTERNAL_CMD_WAIT_EVENTS = 0x00000003,
/* Internal barrier reasons, i.e. implicit synchronization inserted by
* the Vulkan driver Range of valid values: [0xC0000000 ... 0xFFFFFFFE].
*/
RGP_BARRIER_INTERNAL_BASE = 0xC0000000,
RGP_BARRIER_INTERNAL_PRE_RESET_QUERY_POOL_SYNC = RGP_BARRIER_INTERNAL_BASE + 0,
RGP_BARRIER_INTERNAL_POST_RESET_QUERY_POOL_SYNC = RGP_BARRIER_INTERNAL_BASE + 1,
RGP_BARRIER_INTERNAL_GPU_EVENT_RECYCLE_STALL = RGP_BARRIER_INTERNAL_BASE + 2,
RGP_BARRIER_INTERNAL_PRE_COPY_QUERY_POOL_RESULTS_SYNC = RGP_BARRIER_INTERNAL_BASE + 3
};
bool radv_is_instruction_timing_enabled(void);
bool radv_sqtt_queue_events_enabled(void);
void radv_emit_sqtt_userdata(const struct radv_cmd_buffer *cmd_buffer, const void *data, uint32_t num_dwords);
void radv_emit_spi_config_cntl(const struct radv_device *device, struct radeon_cmdbuf *cs, bool enable);
void radv_emit_inhibit_clockgating(const struct radv_device *device, struct radeon_cmdbuf *cs, bool inhibit);
VkResult radv_sqtt_acquire_gpu_timestamp(struct radv_device *device, struct radeon_winsys_bo **gpu_timestamp_bo,
uint32_t *gpu_timestamp_offset, void **gpu_timestamp_ptr);
bool radv_sqtt_init(struct radv_device *device);
void radv_sqtt_finish(struct radv_device *device);
bool radv_begin_sqtt(struct radv_queue *queue);
bool radv_end_sqtt(struct radv_queue *queue);
bool radv_get_sqtt_trace(struct radv_queue *queue, struct ac_sqtt_trace *sqtt_trace);
void radv_reset_sqtt_trace(struct radv_device *device);
bool radv_sqtt_sample_clocks(struct radv_device *device);
VkResult radv_sqtt_get_timed_cmdbuf(struct radv_queue *queue, struct radeon_winsys_bo *timestamp_bo,
uint32_t timestamp_offset, VkPipelineStageFlags2 timestamp_stage,
VkCommandBuffer *pcmdbuf);
void radv_sqtt_emit_relocated_shaders(struct radv_cmd_buffer *cmd_buffer, struct radv_graphics_pipeline *pipeline);
void radv_write_user_event_marker(struct radv_cmd_buffer *cmd_buffer, enum rgp_sqtt_marker_user_event_type type,
const char *str);
void radv_describe_begin_cmd_buffer(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_end_cmd_buffer(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_draw(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_dispatch(struct radv_cmd_buffer *cmd_buffer, const struct radv_dispatch_info *info);
void radv_describe_begin_render_pass_clear(struct radv_cmd_buffer *cmd_buffer, VkImageAspectFlagBits aspects);
void radv_describe_end_render_pass_clear(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_begin_render_pass_resolve(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_end_render_pass_resolve(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_barrier_end_delayed(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_barrier_start(struct radv_cmd_buffer *cmd_buffer, enum rgp_barrier_reason reason);
void radv_describe_barrier_end(struct radv_cmd_buffer *cmd_buffer);
void radv_describe_layout_transition(struct radv_cmd_buffer *cmd_buffer, const struct radv_barrier_data *barrier);
void radv_describe_begin_accel_struct_build(struct radv_cmd_buffer *cmd_buffer, uint32_t count);
void radv_describe_end_accel_struct_build(struct radv_cmd_buffer *cmd_buffer);
#endif /* RADV_SQTT_H */

1
src/amd/vulkan/si_cmd_buffer.c
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@ -32,6 +32,7 @@
#include "radv_debug.h"
#include "radv_private.h"
#include "radv_shader.h"
#include "radv_sqtt.h"
#include "sid.h"
static void