mirror of https://gitlab.freedesktop.org/mesa/mesa
radeonsi: use ip_type in debug code instead of hardcoding GFX
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28725>
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@ -21,6 +21,11 @@ static void si_dump_bo_list(struct si_context *sctx, const struct radeon_saved_c
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DEBUG_GET_ONCE_OPTION(replace_shaders, "RADEON_REPLACE_SHADERS", NULL)
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static enum amd_ip_type si_get_context_ip_type(struct si_context *sctx)
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{
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return sctx->has_graphics ? AMD_IP_GFX : AMD_IP_COMPUTE;
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}
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/**
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* Store a linearized copy of all chunks of \p cs together with the buffer
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* list in \p saved.
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@ -322,6 +327,7 @@ static void si_dump_debug_registers(struct si_context *sctx, FILE *f)
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struct si_log_chunk_cs {
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struct si_context *ctx;
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struct si_saved_cs *cs;
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enum amd_ip_type ip_type;
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bool dump_bo_list;
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unsigned gfx_begin, gfx_end;
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};
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@ -334,14 +340,16 @@ static void si_log_chunk_type_cs_destroy(void *data)
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}
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static void si_parse_current_ib(FILE *f, struct radeon_cmdbuf *cs, unsigned begin, unsigned end,
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int *last_trace_id, unsigned trace_id_count, const char *name,
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enum amd_gfx_level gfx_level, enum radeon_family family)
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int *last_trace_id, unsigned trace_id_count,
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enum amd_ip_type ip_type, enum amd_gfx_level gfx_level,
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enum radeon_family family)
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{
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unsigned orig_end = end;
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const char *ip_name = ac_get_ip_type_string(NULL, ip_type);
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assert(begin <= end);
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fprintf(f, "------------------ %s begin (dw = %u) ------------------\n", name, begin);
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fprintf(f, "------------------ %s begin (dw = %u) ------------------\n", ip_name, begin);
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for (unsigned prev_idx = 0; prev_idx < cs->num_prev; ++prev_idx) {
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struct radeon_cmdbuf_chunk *chunk = &cs->prev[prev_idx];
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@ -355,7 +363,7 @@ static void si_parse_current_ib(FILE *f, struct radeon_cmdbuf *cs, unsigned begi
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.trace_id_count = trace_id_count,
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.gfx_level = gfx_level,
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.family = family,
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.ip_type = AMD_IP_GFX,
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.ip_type = ip_type,
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};
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ac_parse_ib_chunk(&ib_parser);
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@ -365,7 +373,7 @@ static void si_parse_current_ib(FILE *f, struct radeon_cmdbuf *cs, unsigned begi
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return;
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if (begin < chunk->cdw)
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fprintf(f, "\n---------- Next %s Chunk ----------\n\n", name);
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fprintf(f, "\n---------- %s next chunk ----------\n\n", ip_name);
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begin -= MIN2(begin, chunk->cdw);
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end -= chunk->cdw;
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@ -381,18 +389,19 @@ static void si_parse_current_ib(FILE *f, struct radeon_cmdbuf *cs, unsigned begi
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.trace_id_count = trace_id_count,
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.gfx_level = gfx_level,
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.family = family,
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.ip_type = AMD_IP_GFX,
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.ip_type = ip_type,
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};
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ac_parse_ib_chunk(&ib_parser);
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fprintf(f, "------------------- %s end (dw = %u) -------------------\n\n", name, orig_end);
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fprintf(f, "------------------- %s end (dw = %u) -------------------\n\n", ip_name, orig_end);
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}
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void si_print_current_ib(struct si_context *sctx, FILE *f)
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{
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si_parse_current_ib(f, &sctx->gfx_cs, 0, sctx->gfx_cs.prev_dw + sctx->gfx_cs.current.cdw,
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NULL, 0, "GFX", sctx->gfx_level, sctx->family);
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NULL, 0, si_get_context_ip_type(sctx), sctx->gfx_level,
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sctx->family);
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}
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static void si_log_chunk_type_cs_print(void *data, FILE *f)
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@ -421,13 +430,13 @@ static void si_log_chunk_type_cs_print(void *data, FILE *f)
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.trace_id_count = map ? 1 : 0,
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.gfx_level = ctx->gfx_level,
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.family = ctx->family,
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.ip_type = AMD_IP_GFX,
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.ip_type = chunk->ip_type,
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};
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ac_parse_ib(&ib_parser, "IB");
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} else {
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si_parse_current_ib(f, &ctx->gfx_cs, chunk->gfx_begin, chunk->gfx_end, &last_trace_id,
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map ? 1 : 0, "IB", ctx->gfx_level, ctx->family);
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map ? 1 : 0, chunk->ip_type, ctx->gfx_level, ctx->family);
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}
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}
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@ -458,6 +467,7 @@ static void si_log_cs(struct si_context *ctx, struct u_log_context *log, bool du
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chunk->ctx = ctx;
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si_saved_cs_reference(&chunk->cs, scs);
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chunk->ip_type = si_get_context_ip_type(ctx);
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chunk->dump_bo_list = dump_bo_list;
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chunk->gfx_begin = scs->gfx_last_dw;
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@ -1059,7 +1069,7 @@ void si_log_compute_state(struct si_context *sctx, struct u_log_context *log)
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si_dump_compute_descriptors(sctx, log);
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}
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void si_check_vm_faults(struct si_context *sctx, struct radeon_saved_cs *saved, enum amd_ip_type ring)
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void si_check_vm_faults(struct si_context *sctx, struct radeon_saved_cs *saved)
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{
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struct pipe_screen *screen = sctx->b.screen;
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FILE *f;
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@ -1084,8 +1094,9 @@ void si_check_vm_faults(struct si_context *sctx, struct radeon_saved_cs *saved,
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if (sctx->apitrace_call_number)
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fprintf(f, "Last apitrace call: %u\n\n", sctx->apitrace_call_number);
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switch (ring) {
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case AMD_IP_GFX: {
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switch (si_get_context_ip_type(sctx)) {
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case AMD_IP_GFX:
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case AMD_IP_COMPUTE: {
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struct u_log_context log;
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u_log_context_init(&log);
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@ -211,7 +211,7 @@ void si_flush_gfx_cs(struct si_context *ctx, unsigned flags, struct pipe_fence_h
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*/
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ctx->ws->fence_wait(ctx->ws, ctx->last_gfx_fence, 800 * 1000 * 1000);
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si_check_vm_faults(ctx, &ctx->current_saved_cs->gfx, AMD_IP_GFX);
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si_check_vm_faults(ctx, &ctx->current_saved_cs->gfx);
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}
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if (unlikely(ctx->sqtt && (flags & PIPE_FLUSH_END_OF_FRAME))) {
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@ -1583,8 +1583,7 @@ void si_log_hw_flush(struct si_context *sctx);
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void si_log_draw_state(struct si_context *sctx, struct u_log_context *log);
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void si_log_compute_state(struct si_context *sctx, struct u_log_context *log);
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void si_init_debug_functions(struct si_context *sctx);
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void si_check_vm_faults(struct si_context *sctx, struct radeon_saved_cs *saved,
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enum amd_ip_type ring);
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void si_check_vm_faults(struct si_context *sctx, struct radeon_saved_cs *saved);
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bool si_replace_shader(unsigned num, struct si_shader_binary *binary);
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void si_print_current_ib(struct si_context *sctx, FILE *f);
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