mirror of https://gitlab.freedesktop.org/mesa/mesa
ac,radv,radeonsi: introduce a helper to build a sampler descriptor
This introduces ac_sampler_state which contains all information to build a sampler descriptor for AMD hardware instead of duplicating code between RADV and RadeonSI. Both drivers just need to fill this new struct to get a descriptor. This allows RADV to get GFX12 support for free. I think we should introduce helpers for other type of descriptors. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29221>
This commit is contained in:
Samuel Pitoiset
Marge Bot
parent
cd05b23a95
commit
7fe169dd4a
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@ -0,0 +1,64 @@
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/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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* Copyright 2024 Valve Corporation
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*
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* SPDX-License-Identifier: MIT
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*/
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#include "ac_descriptors.h"
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#include "sid.h"
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#include "util/u_math.h"
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void
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ac_build_sampler_descriptor(const enum amd_gfx_level gfx_level, const struct ac_sampler_state *state, uint32_t desc[4])
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{
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const unsigned perf_mip = state->max_aniso_ratio ? state->max_aniso_ratio + 6 : 0;
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const bool compat_mode = gfx_level == GFX8 || gfx_level == GFX9;
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desc[0] = S_008F30_CLAMP_X(state->address_mode_u) |
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S_008F30_CLAMP_Y(state->address_mode_v) |
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S_008F30_CLAMP_Z(state->address_mode_w) |
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S_008F30_MAX_ANISO_RATIO(state->max_aniso_ratio) |
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S_008F30_DEPTH_COMPARE_FUNC(state->depth_compare_func) |
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S_008F30_FORCE_UNNORMALIZED(state->unnormalized_coords) |
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S_008F30_ANISO_THRESHOLD(state->max_aniso_ratio >> 1) |
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S_008F30_ANISO_BIAS(state->max_aniso_ratio) |
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S_008F30_DISABLE_CUBE_WRAP(!state->cube_wrap) |
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S_008F30_COMPAT_MODE(compat_mode) |
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S_008F30_TRUNC_COORD(state->trunc_coord) |
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S_008F30_FILTER_MODE(state->filter_mode);
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desc[1] = 0;
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desc[2] = S_008F38_XY_MAG_FILTER(state->mag_filter) |
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S_008F38_XY_MIN_FILTER(state->min_filter) |
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S_008F38_MIP_FILTER(state->mip_filter);
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desc[3] = S_008F3C_BORDER_COLOR_TYPE(state->border_color_type);
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if (gfx_level >= GFX12) {
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desc[1] |= S_008F34_MIN_LOD_GFX12(util_unsigned_fixed(CLAMP(state->min_lod, 0, 17), 8)) |
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S_008F34_MAX_LOD_GFX12(util_unsigned_fixed(CLAMP(state->max_lod, 0, 17), 8));
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desc[2] |= S_008F38_PERF_MIP_LO(perf_mip);
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desc[3] |= S_008F3C_PERF_MIP_HI(perf_mip >> 2);
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} else {
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desc[1] |= S_008F34_MIN_LOD_GFX6(util_unsigned_fixed(CLAMP(state->min_lod, 0, 15), 8)) |
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S_008F34_MAX_LOD_GFX6(util_unsigned_fixed(CLAMP(state->max_lod, 0, 15), 8)) |
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S_008F34_PERF_MIP(perf_mip);
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}
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if (gfx_level >= GFX10) {
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desc[2] |= S_008F38_LOD_BIAS(util_signed_fixed(CLAMP(state->lod_bias, -32, 31), 8)) |
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S_008F38_ANISO_OVERRIDE_GFX10(!state->aniso_single_level);
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} else {
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desc[2] |= S_008F38_LOD_BIAS(util_signed_fixed(CLAMP(state->lod_bias, -16, 16), 8)) |
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S_008F38_DISABLE_LSB_CEIL(gfx_level <= GFX8) |
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S_008F38_FILTER_PREC_FIX(1) |
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S_008F38_ANISO_OVERRIDE_GFX8(gfx_level >= GFX8 && !state->aniso_single_level);
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}
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if (gfx_level >= GFX11) {
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desc[3] |= S_008F3C_BORDER_COLOR_PTR_GFX11(state->border_color_ptr);
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} else {
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desc[3] |= S_008F3C_BORDER_COLOR_PTR_GFX6(state->border_color_ptr);
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}
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}
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@ -0,0 +1,47 @@
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/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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* Copyright 2024 Valve Corporation
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*
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* SPDX-License-Identifier: MIT
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*/
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#ifndef AC_DESCRIPTORS_H
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#define AC_DESCRIPTORS_H
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#include "ac_gpu_info.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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struct ac_sampler_state {
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unsigned address_mode_u : 3;
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unsigned address_mode_v : 3;
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unsigned address_mode_w : 3;
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unsigned max_aniso_ratio : 3;
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unsigned depth_compare_func : 3;
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unsigned unnormalized_coords : 1;
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unsigned cube_wrap : 1;
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unsigned trunc_coord : 1;
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unsigned filter_mode : 2;
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unsigned mag_filter : 2;
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unsigned min_filter : 2;
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unsigned mip_filter : 2;
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unsigned aniso_single_level : 1;
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unsigned border_color_type : 2;
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unsigned border_color_ptr : 12;
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float min_lod;
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float max_lod;
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float lod_bias;
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};
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void
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ac_build_sampler_descriptor(const enum amd_gfx_level gfx_level,
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const struct ac_sampler_state *state,
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uint32_t desc[4]);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -82,6 +82,8 @@ amd_common_files = files(
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'ac_surface.h',
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'ac_debug.c',
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'ac_debug.h',
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'ac_descriptors.c',
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'ac_descriptors.h',
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'ac_formats.c',
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'ac_formats.h',
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'ac_shadowed_regs.c',
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@ -10,6 +10,8 @@
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#include "vk_log.h"
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#include "ac_descriptors.h"
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#include "radv_sampler.h"
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#include "radv_device.h"
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#include "radv_entrypoints.h"
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@ -186,7 +188,6 @@ radv_init_sampler(struct radv_device *device, struct radv_sampler *sampler, cons
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const struct radv_instance *instance = radv_physical_device_instance(pdev);
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uint32_t max_aniso = radv_get_max_anisotropy(device, pCreateInfo);
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uint32_t max_aniso_ratio = radv_tex_aniso_filter(max_aniso);
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bool compat_mode = pdev->info.gfx_level == GFX8 || pdev->info.gfx_level == GFX9;
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unsigned filter_mode = radv_tex_filter_mode(sampler->vk.reduction_mode);
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unsigned depth_compare_func = V_008F30_SQ_TEX_DEPTH_COMPARE_NEVER;
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bool trunc_coord = ((pCreateInfo->minFilter == VK_FILTER_NEAREST && pCreateInfo->magFilter == VK_FILTER_NEAREST) ||
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@ -217,37 +218,28 @@ radv_init_sampler(struct radv_device *device, struct radv_sampler *sampler, cons
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/* If we don't have a custom color, set the ptr to 0 */
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border_color_ptr = sampler->border_color_slot != RADV_BORDER_COLOR_COUNT ? sampler->border_color_slot : 0;
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sampler->state[0] = (S_008F30_CLAMP_X(radv_tex_wrap(pCreateInfo->addressModeU)) |
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S_008F30_CLAMP_Y(radv_tex_wrap(pCreateInfo->addressModeV)) |
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S_008F30_CLAMP_Z(radv_tex_wrap(pCreateInfo->addressModeW)) |
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S_008F30_MAX_ANISO_RATIO(max_aniso_ratio) | S_008F30_DEPTH_COMPARE_FUNC(depth_compare_func) |
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S_008F30_FORCE_UNNORMALIZED(pCreateInfo->unnormalizedCoordinates ? 1 : 0) |
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S_008F30_ANISO_THRESHOLD(max_aniso_ratio >> 1) | S_008F30_ANISO_BIAS(max_aniso_ratio) |
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S_008F30_DISABLE_CUBE_WRAP(disable_cube_wrap) | S_008F30_COMPAT_MODE(compat_mode) |
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S_008F30_FILTER_MODE(filter_mode) | S_008F30_TRUNC_COORD(trunc_coord));
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sampler->state[1] = (S_008F34_MIN_LOD_GFX6(util_unsigned_fixed(CLAMP(pCreateInfo->minLod, 0, 15), 8)) |
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S_008F34_MAX_LOD_GFX6(util_unsigned_fixed(CLAMP(pCreateInfo->maxLod, 0, 15), 8)) |
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S_008F34_PERF_MIP(max_aniso_ratio ? max_aniso_ratio + 6 : 0));
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sampler->state[2] = (S_008F38_XY_MAG_FILTER(radv_tex_filter(pCreateInfo->magFilter, max_aniso)) |
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S_008F38_XY_MIN_FILTER(radv_tex_filter(pCreateInfo->minFilter, max_aniso)) |
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S_008F38_MIP_FILTER(radv_tex_mipfilter(pCreateInfo->mipmapMode)));
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sampler->state[3] = S_008F3C_BORDER_COLOR_TYPE(radv_tex_bordercolor(border_color));
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struct ac_sampler_state ac_state = {
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.address_mode_u = radv_tex_wrap(pCreateInfo->addressModeU),
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.address_mode_v = radv_tex_wrap(pCreateInfo->addressModeV),
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.address_mode_w = radv_tex_wrap(pCreateInfo->addressModeW),
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.max_aniso_ratio = max_aniso_ratio,
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.depth_compare_func = depth_compare_func,
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.unnormalized_coords = pCreateInfo->unnormalizedCoordinates ? 1 : 0,
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.cube_wrap = !disable_cube_wrap,
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.trunc_coord = trunc_coord,
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.filter_mode = filter_mode,
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.mag_filter = radv_tex_filter(pCreateInfo->magFilter, max_aniso),
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.min_filter = radv_tex_filter(pCreateInfo->minFilter, max_aniso),
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.mip_filter = radv_tex_mipfilter(pCreateInfo->mipmapMode),
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.min_lod = pCreateInfo->minLod,
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.max_lod = pCreateInfo->maxLod,
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.lod_bias = pCreateInfo->mipLodBias,
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.aniso_single_level = !instance->drirc.disable_aniso_single_level,
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.border_color_type = radv_tex_bordercolor(border_color),
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.border_color_ptr = border_color_ptr,
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};
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if (pdev->info.gfx_level >= GFX10) {
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sampler->state[2] |= S_008F38_LOD_BIAS(util_signed_fixed(CLAMP(pCreateInfo->mipLodBias, -32, 31), 8)) |
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S_008F38_ANISO_OVERRIDE_GFX10(instance->drirc.disable_aniso_single_level);
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} else {
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sampler->state[2] |=
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S_008F38_LOD_BIAS(util_signed_fixed(CLAMP(pCreateInfo->mipLodBias, -16, 16), 8)) |
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S_008F38_DISABLE_LSB_CEIL(pdev->info.gfx_level <= GFX8) | S_008F38_FILTER_PREC_FIX(1) |
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S_008F38_ANISO_OVERRIDE_GFX8(instance->drirc.disable_aniso_single_level && pdev->info.gfx_level >= GFX8);
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}
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if (pdev->info.gfx_level >= GFX11) {
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sampler->state[3] |= S_008F3C_BORDER_COLOR_PTR_GFX11(border_color_ptr);
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} else {
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sampler->state[3] |= S_008F3C_BORDER_COLOR_PTR_GFX6(border_color_ptr);
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}
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ac_build_sampler_descriptor(pdev->info.gfx_level, &ac_state, sampler->state);
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}
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VKAPI_ATTR VkResult VKAPI_CALL
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@ -18,6 +18,7 @@
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#include "util/u_upload_mgr.h"
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#include "util/u_blend.h"
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#include "ac_descriptors.h"
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#include "ac_formats.h"
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#include "gfx10_format_table.h"
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@ -5470,7 +5471,6 @@ static void *si_create_sampler_state(struct pipe_context *ctx,
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struct si_sampler_state *rstate = CALLOC_STRUCT(si_sampler_state);
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unsigned max_aniso = sscreen->force_aniso >= 0 ? sscreen->force_aniso : state->max_anisotropy;
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unsigned max_aniso_ratio = si_tex_aniso_filter(max_aniso);
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unsigned perf_mip = max_aniso_ratio ? max_aniso_ratio + 6 : 0;
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bool trunc_coord = (state->min_img_filter == PIPE_TEX_FILTER_NEAREST &&
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state->mag_img_filter == PIPE_TEX_FILTER_NEAREST &&
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state->compare_mode == PIPE_TEX_COMPARE_NONE) ||
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@ -5502,47 +5502,26 @@ static void *si_create_sampler_state(struct pipe_context *ctx,
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state->border_color_is_integer,
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&border_color_ptr);
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rstate->val[0] =
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(S_008F30_CLAMP_X(si_tex_wrap(state->wrap_s)) | S_008F30_CLAMP_Y(si_tex_wrap(state->wrap_t)) |
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S_008F30_CLAMP_Z(si_tex_wrap(state->wrap_r)) | S_008F30_MAX_ANISO_RATIO(max_aniso_ratio) |
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S_008F30_DEPTH_COMPARE_FUNC(si_tex_compare(state->compare_mode, state->compare_func)) |
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S_008F30_FORCE_UNNORMALIZED(state->unnormalized_coords) |
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S_008F30_ANISO_THRESHOLD(max_aniso_ratio >> 1) | S_008F30_ANISO_BIAS(max_aniso_ratio) |
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S_008F30_DISABLE_CUBE_WRAP(!state->seamless_cube_map) |
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S_008F30_TRUNC_COORD(trunc_coord));
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rstate->val[1] = 0;
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rstate->val[2] = (S_008F38_XY_MAG_FILTER(si_tex_filter(state->mag_img_filter, max_aniso)) |
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S_008F38_XY_MIN_FILTER(si_tex_filter(state->min_img_filter, max_aniso)) |
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S_008F38_MIP_FILTER(si_tex_mipfilter(state->min_mip_filter)));
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rstate->val[3] = S_008F3C_BORDER_COLOR_TYPE(border_color_type);
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struct ac_sampler_state ac_state = {
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.address_mode_u = si_tex_wrap(state->wrap_s),
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.address_mode_v = si_tex_wrap(state->wrap_t),
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.address_mode_w = si_tex_wrap(state->wrap_r),
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.max_aniso_ratio = max_aniso_ratio,
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.depth_compare_func = si_tex_compare(state->compare_mode, state->compare_func),
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.unnormalized_coords = state->unnormalized_coords,
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.cube_wrap = state->seamless_cube_map,
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.trunc_coord = trunc_coord,
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.mag_filter = si_tex_filter(state->mag_img_filter, max_aniso),
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.min_filter = si_tex_filter(state->min_img_filter, max_aniso),
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.mip_filter = si_tex_mipfilter(state->min_mip_filter),
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.min_lod = state->min_lod,
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.max_lod = state->max_lod,
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.lod_bias = state->lod_bias,
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.border_color_type = border_color_type,
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.border_color_ptr = border_color_ptr,
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};
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if (sscreen->info.gfx_level >= GFX12) {
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rstate->val[1] |= S_008F34_MIN_LOD_GFX12(S_FIXED(CLAMP(state->min_lod, 0, 17), 8)) |
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S_008F34_MAX_LOD_GFX12(S_FIXED(CLAMP(state->max_lod, 0, 17), 8));
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rstate->val[2] |= S_008F38_PERF_MIP_LO(perf_mip);
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rstate->val[3] |= S_008F3C_PERF_MIP_HI(perf_mip >> 2);
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} else {
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rstate->val[1] |= S_008F34_MIN_LOD_GFX6(S_FIXED(CLAMP(state->min_lod, 0, 15), 8)) |
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S_008F34_MAX_LOD_GFX6(S_FIXED(CLAMP(state->max_lod, 0, 15), 8)) |
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S_008F34_PERF_MIP(perf_mip);
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}
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if (sscreen->info.gfx_level >= GFX10) {
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rstate->val[2] |= S_008F38_LOD_BIAS(S_FIXED(CLAMP(state->lod_bias, -32, 31), 8)) |
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S_008F38_ANISO_OVERRIDE_GFX10(1);
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} else {
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rstate->val[0] |= S_008F30_COMPAT_MODE(sctx->gfx_level >= GFX8);
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rstate->val[2] |= S_008F38_LOD_BIAS(S_FIXED(CLAMP(state->lod_bias, -16, 16), 8)) |
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S_008F38_DISABLE_LSB_CEIL(sctx->gfx_level <= GFX8) |
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S_008F38_FILTER_PREC_FIX(1) |
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S_008F38_ANISO_OVERRIDE_GFX8(sctx->gfx_level >= GFX8);
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}
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if (sscreen->info.gfx_level >= GFX11) {
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rstate->val[3] |= S_008F3C_BORDER_COLOR_PTR_GFX11(border_color_ptr);
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} else {
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rstate->val[3] |= S_008F3C_BORDER_COLOR_PTR_GFX6(border_color_ptr);
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}
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ac_build_sampler_descriptor(sscreen->info.gfx_level, &ac_state, rstate->val);
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/* Create sampler resource for upgraded depth textures. */
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memcpy(rstate->upgraded_depth_val, rstate->val, sizeof(rstate->val));
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