mirror of https://gitlab.freedesktop.org/mesa/mesa
i965: expose RGBA visuals only on Android
As Marek pointed out in earlier commit - exposing RGBA on other
platforms introduces ~500 Visuals, which are not tested.
Note that this does not quite happen, yet. Reason being that the GLX
code does not check the masks - see scaralEqual().
Thus as we fix that, we'll run into the issue described.
v2: Rebase, while keeping loaderPrivate
v3: Beef-up commit message, getCapability() returns unsigned (Tapani)
Fixes: 1bf703e4ea
("dri_interface,egl,gallium: only expose RGBA visuals
on Android")
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: Chad Versace <chadversary@chromium.org>
Cc: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
This commit is contained in:
parent
dad32fc61c
commit
731ba6924a
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@ -1846,6 +1846,20 @@ intel_supported_msaa_modes(const struct intel_screen *screen)
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}
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}
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static unsigned
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intel_loader_get_cap(const __DRIscreen *dri_screen, enum dri_loader_cap cap)
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{
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if (dri_screen->dri2.loader && dri_screen->dri2.loader->base.version >= 4 &&
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dri_screen->dri2.loader->getCapability)
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return dri_screen->dri2.loader->getCapability(dri_screen->loaderPrivate, cap);
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if (dri_screen->image.loader && dri_screen->image.loader->base.version >= 2 &&
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dri_screen->image.loader->getCapability)
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return dri_screen->image.loader->getCapability(dri_screen->loaderPrivate, cap);
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return 0;
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}
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static __DRIconfig**
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intel_screen_make_configs(__DRIscreen *dri_screen)
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{
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@ -1888,8 +1902,15 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
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uint8_t depth_bits[4], stencil_bits[4];
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__DRIconfig **configs = NULL;
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/* Expose only BGRA ordering if the loader doesn't support RGBA ordering. */
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unsigned num_formats;
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if (intel_loader_get_cap(dri_screen, DRI_LOADER_CAP_RGBA_ORDERING))
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num_formats = ARRAY_SIZE(formats);
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else
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num_formats = 3;
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/* Generate singlesample configs without accumulation buffer. */
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for (unsigned i = 0; i < ARRAY_SIZE(formats); i++) {
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for (unsigned i = 0; i < num_formats; i++) {
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__DRIconfig **new_configs;
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int num_depth_stencil_bits = 2;
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