anv: Enable HiZ on multi-LOD depth buffers.

Initial work by Rafael Antognolli <rafael.antognolli@intel.com>

Reworks
 - Rebase to main
 - Emit the right hiz op for higher mip levels when transitioning the
   depth buffer

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28629>
This commit is contained in:
Rohan Garg 2024-04-05 11:51:11 +02:00 committed by Marge Bot
parent 599e8bf921
commit 5efecc9782
2 changed files with 28 additions and 10 deletions

View File

@ -785,7 +785,8 @@ add_aux_surface_if_supported(struct anv_device *device,
return VK_SUCCESS; return VK_SUCCESS;
} }
if (image->vk.mip_levels > 1) { /* TODO: Adjust blorp for multi-LOD HiZ surface on Gen8 - Gen9*/
if (image->vk.mip_levels > 1 && device->info->ver <= 9) {
anv_perf_warn(VK_LOG_OBJS(&image->vk.base), "Enable multi-LOD HiZ"); anv_perf_warn(VK_LOG_OBJS(&image->vk.base), "Enable multi-LOD HiZ");
return VK_SUCCESS; return VK_SUCCESS;
} }

View File

@ -477,6 +477,7 @@ add_surface_state_relocs(struct anv_cmd_buffer *cmd_buffer,
static void static void
transition_depth_buffer(struct anv_cmd_buffer *cmd_buffer, transition_depth_buffer(struct anv_cmd_buffer *cmd_buffer,
const struct anv_image *image, const struct anv_image *image,
uint32_t base_level, uint32_t level_count,
uint32_t base_layer, uint32_t layer_count, uint32_t base_layer, uint32_t layer_count,
VkImageLayout initial_layout, VkImageLayout initial_layout,
VkImageLayout final_layout, VkImageLayout final_layout,
@ -488,10 +489,8 @@ transition_depth_buffer(struct anv_cmd_buffer *cmd_buffer,
return; return;
/* If will_full_fast_clear is set, the caller promises to fast-clear the /* If will_full_fast_clear is set, the caller promises to fast-clear the
* largest portion of the specified range as it can. For depth images, * largest portion of the specified range as it can.
* that means the entire image because we don't support multi-LOD HiZ.
*/ */
assert(image->planes[0].primary_surface.isl.levels == 1);
if (will_full_fast_clear) if (will_full_fast_clear)
return; return;
@ -521,14 +520,29 @@ transition_depth_buffer(struct anv_cmd_buffer *cmd_buffer,
*/ */
assert(final_state != ISL_AUX_STATE_PASS_THROUGH); assert(final_state != ISL_AUX_STATE_PASS_THROUGH);
enum isl_aux_op hiz_op = ISL_AUX_OP_NONE;
if (final_needs_depth && !initial_depth_valid) { if (final_needs_depth && !initial_depth_valid) {
assert(initial_hiz_valid); assert(initial_hiz_valid);
anv_image_hiz_op(cmd_buffer, image, VK_IMAGE_ASPECT_DEPTH_BIT, hiz_op = ISL_AUX_OP_FULL_RESOLVE;
0, base_layer, layer_count, ISL_AUX_OP_FULL_RESOLVE);
} else if (final_needs_hiz && !initial_hiz_valid) { } else if (final_needs_hiz && !initial_hiz_valid) {
assert(initial_depth_valid); assert(initial_depth_valid);
anv_image_hiz_op(cmd_buffer, image, VK_IMAGE_ASPECT_DEPTH_BIT, hiz_op = ISL_AUX_OP_AMBIGUATE;
0, base_layer, layer_count, ISL_AUX_OP_AMBIGUATE); }
if (hiz_op != ISL_AUX_OP_NONE) {
for (uint32_t l = 0; l < level_count; l++) {
const uint32_t level = base_level + l;
uint32_t aux_layers =
anv_image_aux_layers(image, VK_IMAGE_ASPECT_DEPTH_BIT, level);
if (base_layer >= aux_layers)
break; /* We will only get fewer layers as level increases */
uint32_t level_layer_count =
MIN2(layer_count, aux_layers - base_layer);
anv_image_hiz_op(cmd_buffer, image, VK_IMAGE_ASPECT_DEPTH_BIT,
l, base_layer, level_layer_count, hiz_op);
}
} }
/* Additional tile cache flush for MTL: /* Additional tile cache flush for MTL:
@ -4019,6 +4033,7 @@ cmd_buffer_barrier(struct anv_cmd_buffer *cmd_buffer,
if (range->aspectMask & VK_IMAGE_ASPECT_DEPTH_BIT) { if (range->aspectMask & VK_IMAGE_ASPECT_DEPTH_BIT) {
transition_depth_buffer(cmd_buffer, image, transition_depth_buffer(cmd_buffer, image,
range->baseMipLevel, level_count,
base_layer, layer_count, base_layer, layer_count,
old_layout, new_layout, old_layout, new_layout,
false /* will_full_fast_clear */); false /* will_full_fast_clear */);
@ -5110,6 +5125,7 @@ void genX(CmdBeginRendering)(
if (is_multiview) { if (is_multiview) {
u_foreach_bit(view, gfx->view_mask) { u_foreach_bit(view, gfx->view_mask) {
transition_depth_buffer(cmd_buffer, d_iview->image, transition_depth_buffer(cmd_buffer, d_iview->image,
d_iview->vk.base_mip_level, 1,
d_iview->vk.base_array_layer + view, d_iview->vk.base_array_layer + view,
1 /* layer_count */, 1 /* layer_count */,
initial_depth_layout, depth_layout, initial_depth_layout, depth_layout,
@ -5117,6 +5133,7 @@ void genX(CmdBeginRendering)(
} }
} else { } else {
transition_depth_buffer(cmd_buffer, d_iview->image, transition_depth_buffer(cmd_buffer, d_iview->image,
d_iview->vk.base_mip_level, 1,
d_iview->vk.base_array_layer, d_iview->vk.base_array_layer,
gfx->layer_count, gfx->layer_count,
initial_depth_layout, depth_layout, initial_depth_layout, depth_layout,
@ -5397,7 +5414,7 @@ void genX(CmdEndRendering)(
* depth attachment first to get rid of any HiZ that we may not be * depth attachment first to get rid of any HiZ that we may not be
* able to handle. * able to handle.
*/ */
transition_depth_buffer(cmd_buffer, src_iview->image, transition_depth_buffer(cmd_buffer, src_iview->image, 0, 1,
src_iview->planes[0].isl.base_array_layer, src_iview->planes[0].isl.base_array_layer,
layers, layers,
gfx->depth_att.layout, gfx->depth_att.layout,
@ -5412,7 +5429,7 @@ void genX(CmdEndRendering)(
* inefficient but, since HiZ resolves aren't destructive, going from * inefficient but, since HiZ resolves aren't destructive, going from
* less HiZ to more is generally a no-op. * less HiZ to more is generally a no-op.
*/ */
transition_depth_buffer(cmd_buffer, src_iview->image, transition_depth_buffer(cmd_buffer, src_iview->image, 0, 1,
src_iview->planes[0].isl.base_array_layer, src_iview->planes[0].isl.base_array_layer,
layers, layers,
VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL, VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL,