mirror of https://gitlab.freedesktop.org/mesa/mesa
intel/brw: Update CSEL source type validation
Gfx9 can only have F, but newer GPUs can have F, HF, *D, or *W. The source and destination types must still match in size. v2: Simplify the float vs integer logic. Suggested by Ken. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29095>
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@ -2122,8 +2122,22 @@ instruction_restrictions(const struct brw_isa_info *isa,
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src_type = brw_inst_3src_a16_src_type(devinfo, inst);
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}
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ERROR_IF(src_type != dst_type,
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"CSEL source type must match destination type");
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if (devinfo->ver == 9) {
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ERROR_IF(src_type != BRW_TYPE_F,
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"CSEL source type must be F");
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} else {
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ERROR_IF(src_type != BRW_TYPE_F && src_type != BRW_TYPE_HF &&
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src_type != BRW_TYPE_D && src_type != BRW_TYPE_UD &&
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src_type != BRW_TYPE_W && src_type != BRW_TYPE_UW,
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"CSEL source type must be F, HF, *D, or *W");
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ERROR_IF(brw_type_is_float(src_type) != brw_type_is_float(dst_type),
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"CSEL cannot mix float and integer types.");
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ERROR_IF(brw_type_size_bytes(src_type) !=
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brw_type_size_bytes(dst_type),
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"CSEL cannot mix different type sizes.");
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}
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}
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}
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