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svga: Add support for SVGAv3 

SVGAv3 changes the PCI id due to differences in how PCI configuration
is handled - removal of VRAM and FIFO PCI resources, switch to MMIO
registers and MSI/MSI-X IRQ support but the 3D commands remain largely
the same.

This enables 3D/graphics acceleration support on SVGAv3.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
(cherry picked from commit 16019ff7cc)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16564>
This commit is contained in:
Zack Rusin 2022-02-08 16:41:32 -05:00 committed by Dylan Baker
parent 768c1a9512
commit 321cf6e65d
5 changed files with 27 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
include/pci_ids/vmwgfx_pci_ids.h
View File

@ -1 +1,2 @@
CHIPSET(0x0405, SVGAII, SVGAII)
CHIPSET(0x0406, SVGAv3, SVGAv3)

6
src/gallium/drivers/svga/svga_screen.c
View File

@ -432,7 +432,11 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_VENDOR_ID:
return 0x15ad; /* VMware Inc. */
case PIPE_CAP_DEVICE_ID:
return 0x0405; /* assume SVGA II */
if (sws->device_id) {
return sws->device_id;
} else {
return 0x0405; /* assume SVGA II */
}
case PIPE_CAP_ACCELERATED:
return 0; /* XXX: */
case PIPE_CAP_VIDEO_MEMORY:

3
src/gallium/drivers/svga/svga_winsys.h
View File

@ -824,6 +824,9 @@ struct svga_winsys_screen
/** Have GL43 capable device */
boolean have_gl43;
/** SVGA device_id version we're running on */
uint16_t device_id;
};

10
src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
View File

@ -1053,6 +1053,16 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws)
vws->base.have_sm4_1 = FALSE;
vws->base.have_intra_surface_copy = FALSE;
memset(&gp_arg, 0, sizeof(gp_arg));
gp_arg.param = DRM_VMW_PARAM_DEVICE_ID;
ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM,
&gp_arg, sizeof(gp_arg));
if (ret || gp_arg.value == 0) {
vws->base.device_id = 0x0405; /* assume SVGA II */
} else {
vws->base.device_id = gp_arg.value;
}
if (vws->base.have_gb_objects) {
memset(&gp_arg, 0, sizeof(gp_arg));
gp_arg.param = DRM_VMW_PARAM_MAX_MOB_MEMORY;

9
src/gallium/winsys/svga/drm/vmwgfx_drm.h
View File

@ -1,6 +1,6 @@
/**************************************************************************
*
* Copyright © 2009-2021 VMware, Inc., Palo Alto, CA., USA
* Copyright © 2009-2022 VMware, Inc., Palo Alto, CA., USA
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
@ -92,6 +92,12 @@ extern "C" {
*
* DRM_VMW_PARAM_SM5
* SM5 support is enabled.
*
* DRM_VMW_PARAM_GL43
* SM5.1+GL4.3 support is enabled.
*
* DRM_VMW_PARAM_DEVICE_ID
* PCI ID of the underlying SVGA device.
*/
#define DRM_VMW_PARAM_NUM_STREAMS 0
@ -111,6 +117,7 @@ extern "C" {
#define DRM_VMW_PARAM_SM4_1 14
#define DRM_VMW_PARAM_SM5 15
#define DRM_VMW_PARAM_GL43 16
#define DRM_VMW_PARAM_DEVICE_ID 17
/**
* enum drm_vmw_handle_type - handle type for ref ioctls