mirror of https://gitlab.freedesktop.org/mesa/mesa
aco/tests: add control flow tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28301>
This commit is contained in:
Rhys Perry
Marge Bot
parent
ae63d967d7
commit
306a72db1f
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@ -234,3 +234,548 @@ BEGIN_TEST(isel.s_bfe_mask_bits)
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pbld.add_cs(cs);
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pbld.print_ir(VK_SHADER_STAGE_COMPUTE_BIT, "ACO IR", true);
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END_TEST
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/**
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* loop {
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* if (uniform) {
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* break;
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* } else {
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* break;
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* }
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* // unreachable continue
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* }
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*/
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BEGIN_TEST(isel.cf.unreachable_continue.uniform_break)
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if (!setup_nir_cs(GFX11))
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return;
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//>> s1: %init0 = p_unit_test 0
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//>> v1: %init1 = p_unit_test 1
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nir_def *init0 = nir_unit_test_uniform_amd(nb, 1, 32, .base=0);
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nir_def *init1 = nir_unit_test_divergent_amd(nb, 1, 32, .base=1);
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nir_phi_instr *phi[2];
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nir_loop *loop = nir_push_loop(nb);
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{
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//>> BB1
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//! /* logical preds: BB0, / linear preds: BB0, / kind: uniform, loop-header, */
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//! v1: %_ = p_phi %init1
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//! s1: %_ = p_linear_phi %init0
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phi[0] = nir_phi_instr_create(nb->shader);
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phi[1] = nir_phi_instr_create(nb->shader);
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nir_def_init(&phi[0]->instr, &phi[0]->def, 1, 32);
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nir_def_init(&phi[1]->instr, &phi[1]->def, 1, 32);
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nir_phi_instr_add_src(phi[0], init0->parent_instr->block, init0);
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nir_phi_instr_add_src(phi[1], init1->parent_instr->block, init1);
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nir_push_if(nb, nir_unit_test_uniform_amd(nb, 1, 1, .base=4));
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{
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//>> BB2
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//! /* logical preds: BB1, / linear preds: BB1, / kind: uniform, break, */
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nir_jump(nb, nir_jump_break);
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}
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nir_push_else(nb, NULL);
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{
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/* The contents of this branch is moved to the merge block. */
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//>> BB3
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//! /* logical preds: BB1, / linear preds: BB1, / kind: uniform, */
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//>> BB4
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//! /* logical preds: BB3, / linear preds: BB3, / kind: uniform, break, */
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//! p_logical_start
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//! s1: %_ = p_unit_test 5
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//! p_logical_end
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nir_unit_test_uniform_amd(nb, 1, 32, .base=5);
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nir_jump(nb, nir_jump_break);
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}
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nir_pop_if(nb, NULL);
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nir_def *cont0 = nir_unit_test_uniform_amd(nb, 1, 32, .base=2);
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nir_def *cont1 = nir_unit_test_divergent_amd(nb, 1, 32, .base=3);
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nir_phi_instr_add_src(phi[0], nir_loop_last_block(loop), cont0);
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nir_phi_instr_add_src(phi[1], nir_loop_last_block(loop), cont1);
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}
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nir_pop_loop(nb, NULL);
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nb->cursor = nir_after_phis(nir_loop_first_block(loop));
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nir_builder_instr_insert(nb, &phi[0]->instr);
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nir_builder_instr_insert(nb, &phi[1]->instr);
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finish_isel_test();
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END_TEST
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/**
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* loop {
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* if (divergent) {
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* break;
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* } else {
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* break;
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* }
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* // unreachable continue
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* }
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*/
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BEGIN_TEST(isel.cf.unreachable_continue.divergent_break)
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if (!setup_nir_cs(GFX11))
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return;
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//>> s1: %init0 = p_unit_test 0
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//>> v1: %init1 = p_unit_test 1
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nir_def *init0 = nir_unit_test_uniform_amd(nb, 1, 32, .base=0);
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nir_def *init1 = nir_unit_test_divergent_amd(nb, 1, 32, .base=1);
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nir_phi_instr *phi[2];
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nir_loop *loop = nir_push_loop(nb);
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{
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//>> BB1
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//! /* logical preds: BB0, / linear preds: BB0, / kind: loop-header, branch, */
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//! v1: %_ = p_phi %init1
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//! s1: %_ = p_linear_phi %init0
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phi[0] = nir_phi_instr_create(nb->shader);
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phi[1] = nir_phi_instr_create(nb->shader);
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nir_def_init(&phi[0]->instr, &phi[0]->def, 1, 32);
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nir_def_init(&phi[1]->instr, &phi[1]->def, 1, 32);
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nir_phi_instr_add_src(phi[0], init0->parent_instr->block, init0);
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nir_phi_instr_add_src(phi[1], init1->parent_instr->block, init1);
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nir_push_if(nb, nir_unit_test_divergent_amd(nb, 1, 1, .base=4));
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{
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//>> BB2
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//! /* logical preds: BB1, / linear preds: BB1, / kind: break, */
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nir_jump(nb, nir_jump_break);
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}
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nir_push_else(nb, NULL);
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{
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/* The contents of this branch is moved to the merge block. */
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//>> BB7
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//! /* logical preds: BB1, / linear preds: BB6, / kind: uniform, */
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//>> BB9
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//! /* logical preds: BB7, / linear preds: BB7, BB8, / kind: uniform, break, merge, */
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//! p_logical_start
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//! s1: %_ = p_unit_test 5
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//! p_logical_end
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nir_unit_test_uniform_amd(nb, 1, 32, .base=5);
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nir_jump(nb, nir_jump_break);
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}
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nir_pop_if(nb, NULL);
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nir_def *cont0 = nir_unit_test_uniform_amd(nb, 1, 32, .base=2);
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nir_def *cont1 = nir_unit_test_divergent_amd(nb, 1, 32, .base=3);
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nir_phi_instr_add_src(phi[0], nir_loop_last_block(loop), cont0);
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nir_phi_instr_add_src(phi[1], nir_loop_last_block(loop), cont1);
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}
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nir_pop_loop(nb, NULL);
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nb->cursor = nir_after_phis(nir_loop_first_block(loop));
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nir_builder_instr_insert(nb, &phi[0]->instr);
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nir_builder_instr_insert(nb, &phi[1]->instr);
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finish_isel_test();
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END_TEST
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/**
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* loop {
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* if (uniform) {
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* continue;
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* } else {
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* continue;
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* }
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* // unreachable block
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* break;
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* }
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*/
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BEGIN_TEST(isel.cf.unreachable_break.uniform_continue)
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if (!setup_nir_cs(GFX11))
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return;
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nir_def *val0;
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nir_def *val1;
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/* These are undefs. */
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//>> s3: %val1 = p_create_vector 0, 0, 0
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//>> s1: %val0 = p_parallelcopy 0
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nir_push_loop(nb);
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{
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//>> BB1
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//! /* logical preds: BB0, BB2, BB7, / linear preds: BB0, BB2, BB7, / kind: uniform, loop-header, */
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nir_push_if(nb, nir_unit_test_uniform_amd(nb, 1, 1, .base=2));
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{
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//>> BB2
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//! /* logical preds: BB1, / linear preds: BB1, / kind: uniform, continue, */
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nir_jump(nb, nir_jump_continue);
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}
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nir_push_else(nb, NULL);
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{
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/* The contents of this branch is moved to the merge block, and a dummy break is inserted
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* before the continue so that the loop has an exit.
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*/
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//>> BB3
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//! /* logical preds: BB1, / linear preds: BB1, / kind: uniform, */
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//>> BB4
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//! /* logical preds: BB3, / linear preds: BB3, / kind: uniform, */
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//! p_logical_start
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//! s1: %_ = p_unit_test 5
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//! s2: %zero = p_parallelcopy 0
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//! s2: %_, s1: %cond:scc = s_and_b64 %zero, %0:exec
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//! p_logical_end
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//! s2: %_ = p_cbranch_z %cond:scc
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//! BB5
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//! /* logical preds: BB4, / linear preds: BB4, / kind: uniform, break, */
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//>> BB6
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//! /* logical preds: BB4, / linear preds: BB4, / kind: uniform, */
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//>> BB7
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//! /* logical preds: BB6, / linear preds: BB6, / kind: uniform, continue, */
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nir_unit_test_uniform_amd(nb, 1, 32, .base=5);
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nir_jump(nb, nir_jump_continue);
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}
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nir_pop_if(nb, NULL);
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val0 = nir_imm_zero(nb, 1, 32);
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val1 = nir_load_local_invocation_id(nb);
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nir_jump(nb, nir_jump_break);
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}
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nir_pop_loop(nb, NULL);
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//>> BB8
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//! /* logical preds: BB5, / linear preds: BB5, / kind: uniform, top-level, loop-exit, */
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//>> p_unit_test 0, %val0
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//! p_unit_test 1, %val1
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nir_unit_test_amd(nb, val0, .base=0);
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nir_unit_test_amd(nb, val1, .base=1);
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finish_isel_test();
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END_TEST
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/**
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* loop {
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* if (uniform) {
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* break;
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* } else {
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* if (divergent) {
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* break;
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* } else {
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* break;
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* }
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* }
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* // unreachable continue
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* }
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*/
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BEGIN_TEST(isel.cf.unreachable_continue.mixed_break)
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if (!setup_nir_cs(GFX11))
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return;
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//>> s1: %init0 = p_unit_test 0
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//>> v1: %init1 = p_unit_test 1
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nir_def *init0 = nir_unit_test_uniform_amd(nb, 1, 32, .base=0);
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nir_def *init1 = nir_unit_test_divergent_amd(nb, 1, 32, .base=1);
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nir_phi_instr *phi[2];
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nir_loop *loop = nir_push_loop(nb);
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{
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//>> BB1
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//! /* logical preds: BB0, / linear preds: BB0, / kind: uniform, loop-header, */
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//! v1: %_ = p_phi %init1
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//! s1: %_ = p_linear_phi %init0
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phi[0] = nir_phi_instr_create(nb->shader);
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phi[1] = nir_phi_instr_create(nb->shader);
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nir_def_init(&phi[0]->instr, &phi[0]->def, 1, 32);
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nir_def_init(&phi[1]->instr, &phi[1]->def, 1, 32);
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nir_phi_instr_add_src(phi[0], init0->parent_instr->block, init0);
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nir_phi_instr_add_src(phi[1], init1->parent_instr->block, init1);
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nir_push_if(nb, nir_unit_test_uniform_amd(nb, 1, 1, .base=4));
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{
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//>> BB2
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//! /* logical preds: BB1, / linear preds: BB1, / kind: uniform, break, */
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nir_jump(nb, nir_jump_break);
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}
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nir_push_else(nb, NULL);
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{
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/* The contents of this branch is moved to the merge block. */
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//>> BB3
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//! /* logical preds: BB1, / linear preds: BB1, / kind: uniform, */
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//>> BB4
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//! /* logical preds: BB3, / linear preds: BB3, / kind: branch, */
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//! p_logical_start
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//! s2: %cond = p_unit_test 5
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//! p_logical_end
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//! s2: %_ = p_cbranch_z %cond
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nir_push_if(nb, nir_unit_test_divergent_amd(nb, 1, 1, .base=5));
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{
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//>> BB5
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//! /* logical preds: BB4, / linear preds: BB4, / kind: break, */
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nir_jump(nb, nir_jump_break);
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}
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nir_push_else(nb, NULL);
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{
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/* The contents of this branch is moved to the merge block. */
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//>> BB10
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//! /* logical preds: BB4, / linear preds: BB9, / kind: uniform, */
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//>> BB12
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//! /* logical preds: BB10, / linear preds: BB10, BB11, / kind: uniform, break, merge, */
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//! p_logical_start
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//! s1: %_ = p_unit_test 6
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nir_unit_test_uniform_amd(nb, 1, 32, .base=6);
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nir_jump(nb, nir_jump_break);
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}
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nir_pop_if(nb, NULL);
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}
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nir_pop_if(nb, NULL);
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nir_def *cont0 = nir_unit_test_uniform_amd(nb, 1, 32, .base=2);
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nir_def *cont1 = nir_unit_test_divergent_amd(nb, 1, 32, .base=3);
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nir_phi_instr_add_src(phi[0], nir_loop_last_block(loop), cont0);
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nir_phi_instr_add_src(phi[1], nir_loop_last_block(loop), cont1);
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}
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nir_pop_loop(nb, NULL);
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//>> BB13
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//! /* logical preds: BB2, BB5, BB12, / linear preds: BB2, BB6, BB12, / kind: uniform, top-level, loop-exit, */
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nb->cursor = nir_after_phis(nir_loop_first_block(loop));
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nir_builder_instr_insert(nb, &phi[0]->instr);
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nir_builder_instr_insert(nb, &phi[1]->instr);
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finish_isel_test();
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END_TEST
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/**
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* loop {
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* if (uniform) {
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* break;
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* } else {
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* if (uniform) {
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* break;
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* } else {
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* if (divergent) {
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* break;
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* } else {
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* break;
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* }
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* }
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* }
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* // unreachable continue
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* }
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*/
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BEGIN_TEST(isel.cf.unreachable_continue.nested_mixed_break)
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if (!setup_nir_cs(GFX11))
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return;
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//>> s1: %init0 = p_unit_test 0
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//>> v1: %init1 = p_unit_test 1
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nir_def *init0 = nir_unit_test_uniform_amd(nb, 1, 32, .base=0);
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nir_def *init1 = nir_unit_test_divergent_amd(nb, 1, 32, .base=1);
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nir_phi_instr *phi[2];
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nir_loop *loop = nir_push_loop(nb);
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{
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//>> BB1
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//! /* logical preds: BB0, / linear preds: BB0, / kind: uniform, loop-header, */
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//! v1: %_ = p_phi %init1
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//! s1: %_ = p_linear_phi %init0
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phi[0] = nir_phi_instr_create(nb->shader);
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phi[1] = nir_phi_instr_create(nb->shader);
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nir_def_init(&phi[0]->instr, &phi[0]->def, 1, 32);
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nir_def_init(&phi[1]->instr, &phi[1]->def, 1, 32);
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nir_phi_instr_add_src(phi[0], init0->parent_instr->block, init0);
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nir_phi_instr_add_src(phi[1], init1->parent_instr->block, init1);
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nir_push_if(nb, nir_unit_test_uniform_amd(nb, 1, 1, .base=4));
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{
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//>> BB2
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//! /* logical preds: BB1, / linear preds: BB1, / kind: uniform, break, */
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nir_jump(nb, nir_jump_break);
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}
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nir_push_else(nb, NULL);
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{
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/* The contents of this branch is moved to the merge block. */
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//>> BB3
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//! /* logical preds: BB1, / linear preds: BB1, / kind: uniform, */
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//>> BB4
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//! /* logical preds: BB3, / linear preds: BB3, / kind: uniform, */
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//! p_logical_start
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//! s2: %cond1 = p_unit_test 4
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//! s2: %_, s1: %_:scc = s_and_b64 %cond1, %0:exec
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//! p_logical_end
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//! s2: %_ = p_cbranch_z %_:scc
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nir_push_if(nb, nir_unit_test_uniform_amd(nb, 1, 1, .base=4));
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{
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//>> BB5
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//! /* logical preds: BB4, / linear preds: BB4, / kind: uniform, break, */
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nir_jump(nb, nir_jump_break);
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}
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nir_push_else(nb, NULL);
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{
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/* The contents of this branch is moved to the merge block. */
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//>> BB6
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//! /* logical preds: BB4, / linear preds: BB4, / kind: uniform, */
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//>> BB7
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//! /* logical preds: BB6, / linear preds: BB6, / kind: branch, */
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//! p_logical_start
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//! s2: %cond2 = p_unit_test 5
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//! p_logical_end
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//! s2: %_ = p_cbranch_z %cond2
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nir_push_if(nb, nir_unit_test_divergent_amd(nb, 1, 1, .base=5));
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{
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//>> BB8
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//! /* logical preds: BB7, / linear preds: BB7, / kind: break, */
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nir_jump(nb, nir_jump_break);
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}
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nir_push_else(nb, NULL);
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{
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/* The contents of this branch is moved to the merge block. */
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//>> BB13
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//! /* logical preds: BB7, / linear preds: BB12, / kind: uniform, */
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//>> BB15
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//! /* logical preds: BB13, / linear preds: BB13, BB14, / kind: uniform, break, merge, */
|
||||
nir_jump(nb, nir_jump_break);
|
||||
}
|
||||
nir_pop_if(nb, NULL);
|
||||
}
|
||||
nir_pop_if(nb, NULL);
|
||||
}
|
||||
nir_pop_if(nb, NULL);
|
||||
|
||||
nir_def *cont0 = nir_unit_test_uniform_amd(nb, 1, 32, .base=2);
|
||||
nir_def *cont1 = nir_unit_test_divergent_amd(nb, 1, 32, .base=3);
|
||||
|
||||
nir_phi_instr_add_src(phi[0], nir_loop_last_block(loop), cont0);
|
||||
nir_phi_instr_add_src(phi[1], nir_loop_last_block(loop), cont1);
|
||||
}
|
||||
nir_pop_loop(nb, NULL);
|
||||
|
||||
nb->cursor = nir_after_phis(nir_loop_first_block(loop));
|
||||
nir_builder_instr_insert(nb, &phi[0]->instr);
|
||||
nir_builder_instr_insert(nb, &phi[1]->instr);
|
||||
|
||||
finish_isel_test();
|
||||
END_TEST
|
||||
|
||||
/**
|
||||
* loop {
|
||||
* continue;
|
||||
* }
|
||||
*/
|
||||
BEGIN_TEST(isel.cf.unreachable_loop_exit)
|
||||
if (!setup_nir_cs(GFX11))
|
||||
return;
|
||||
|
||||
nir_push_loop(nb);
|
||||
{
|
||||
/* A dummy break is inserted before the continue so that the loop has an exit. */
|
||||
//>> BB1
|
||||
//! /* logical preds: BB0, BB4, / linear preds: BB0, BB4, / kind: uniform, loop-header, */
|
||||
//>> s1: %_ = p_unit_test 0
|
||||
//>> s2: %zero = p_parallelcopy 0
|
||||
//>> s2: %_, s1: %cond:scc = s_and_b64 %zero, %0:exec
|
||||
//>> s2: %_ = p_cbranch_z %cond:scc
|
||||
//! BB2
|
||||
//! /* logical preds: BB1, / linear preds: BB1, / kind: uniform, break, */
|
||||
//>> BB4
|
||||
//! /* logical preds: BB3, / linear preds: BB3, / kind: uniform, continue, */
|
||||
nir_unit_test_uniform_amd(nb, 1, 32, .base=0);
|
||||
nir_jump(nb, nir_jump_continue);
|
||||
}
|
||||
nir_pop_loop(nb, NULL);
|
||||
|
||||
finish_isel_test();
|
||||
END_TEST
|
||||
|
||||
/**
|
||||
* loop {
|
||||
* if (divergent) {
|
||||
* break;
|
||||
* } else {
|
||||
* val = uniform;
|
||||
* }
|
||||
* use(val);
|
||||
* }
|
||||
*/
|
||||
BEGIN_TEST(isel.cf.divergent_if_branch_use)
|
||||
if (!setup_nir_cs(GFX11))
|
||||
return;
|
||||
|
||||
nir_push_loop(nb);
|
||||
{
|
||||
nir_def *val;
|
||||
nir_push_if(nb, nir_unit_test_divergent_amd(nb, 1, 1, .base=2));
|
||||
{
|
||||
//>> BB2
|
||||
//! /* logical preds: BB1, / linear preds: BB1, / kind: break, */
|
||||
nir_jump(nb, nir_jump_break);
|
||||
}
|
||||
nir_push_else(nb, NULL);
|
||||
{
|
||||
/* The contents of this branch is moved to the merge block. */
|
||||
//>> BB9
|
||||
//! /* logical preds: BB7, / linear preds: BB7, BB8, / kind: uniform, continue, merge, */
|
||||
//! p_logical_start
|
||||
//! s1: %val = p_unit_test 0
|
||||
val = nir_unit_test_uniform_amd(nb, 1, 32, .base=0);
|
||||
}
|
||||
nir_pop_if(nb, NULL);
|
||||
|
||||
//! p_unit_test 1, %val
|
||||
nir_unit_test_amd(nb, val, .base=1);
|
||||
}
|
||||
nir_pop_loop(nb, NULL);
|
||||
|
||||
finish_isel_test();
|
||||
END_TEST
|
||||
|
||||
/**
|
||||
* loop {
|
||||
* if (divergent) {
|
||||
* continue;
|
||||
* }
|
||||
* if (uniform) {
|
||||
* break;
|
||||
* } else {
|
||||
* val = uniform;
|
||||
* }
|
||||
* use(val);
|
||||
* }
|
||||
*/
|
||||
BEGIN_TEST(isel.cf.uniform_if_branch_use)
|
||||
if (!setup_nir_cs(GFX11))
|
||||
return;
|
||||
|
||||
nir_push_loop(nb);
|
||||
{
|
||||
nir_push_if(nb, nir_unit_test_divergent_amd(nb, 1, 1, .base=3));
|
||||
{
|
||||
nir_jump(nb, nir_jump_continue);
|
||||
}
|
||||
nir_pop_if(nb, NULL);
|
||||
|
||||
//>> s2: %cond = p_unit_test 2
|
||||
//! s2: %_, s1: %_:scc = s_and_b64 %cond, %0:exec
|
||||
//! p_logical_end
|
||||
//! s2: %_ = p_cbranch_z %_:scc
|
||||
nir_def *val;
|
||||
nir_push_if(nb, nir_unit_test_uniform_amd(nb, 1, 1, .base=2));
|
||||
{
|
||||
//>> BB10
|
||||
//! /* logical preds: BB9, / linear preds: BB9, / kind: break, */
|
||||
nir_jump(nb, nir_jump_break);
|
||||
}
|
||||
nir_push_else(nb, NULL);
|
||||
{
|
||||
/* The contents of this branch is moved to the merge block. */
|
||||
//>> BB14
|
||||
//! /* logical preds: BB13, / linear preds: BB12, BB13, / kind: uniform, continue, */
|
||||
//! p_logical_start
|
||||
//! s1: %val = p_unit_test 0
|
||||
val = nir_unit_test_uniform_amd(nb, 1, 32, .base=0);
|
||||
}
|
||||
nir_pop_if(nb, NULL);
|
||||
|
||||
//! p_unit_test 1, %val
|
||||
nir_unit_test_amd(nb, val, .base=1);
|
||||
}
|
||||
nir_pop_loop(nb, NULL);
|
||||
|
||||
finish_isel_test();
|
||||
END_TEST
|
||||
|
|
|
|||
Loading…
Reference in New Issue