mirror of https://gitlab.freedesktop.org/mesa/mesa
ac/nir/ngg: Use just one IO semantics variable in MS output store.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28704>
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@ -3843,24 +3843,24 @@ ms_store_arrayed_output_intrin(nir_builder *b,
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nir_intrinsic_instr *intrin,
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lower_ngg_ms_state *s)
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{
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unsigned location = nir_intrinsic_io_semantics(intrin).location;
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const nir_io_semantics io_sem = nir_intrinsic_io_semantics(intrin);
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if (location == VARYING_SLOT_PRIMITIVE_INDICES) {
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if (io_sem.location == VARYING_SLOT_PRIMITIVE_INDICES) {
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ms_store_prim_indices(b, intrin, s);
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return;
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} else if (location == VARYING_SLOT_CULL_PRIMITIVE) {
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} else if (io_sem.location == VARYING_SLOT_CULL_PRIMITIVE) {
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ms_store_cull_flag(b, intrin, s);
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return;
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}
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ms_out_mode out_mode;
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const ms_out_part *out = ms_get_out_layout_part(location, &b->shader->info, &out_mode, s);
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const ms_out_part *out = ms_get_out_layout_part(io_sem.location, &b->shader->info, &out_mode, s);
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update_ms_output_info(intrin, out, s);
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/* We compact the LDS size (we don't reserve LDS space for outputs which can
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* be stored in variables), so we compute the first free location based on the output mask.
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*/
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unsigned mapped_location = util_bitcount64(out->mask & u_bit_consecutive64(0, location));
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unsigned mapped_location = util_bitcount64(out->mask & u_bit_consecutive64(0, io_sem.location));
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unsigned component_offset = nir_intrinsic_component(intrin);
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unsigned write_mask = nir_intrinsic_write_mask(intrin);
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unsigned num_outputs = util_bitcount64(out->mask);
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@ -3893,7 +3893,6 @@ ms_store_arrayed_output_intrin(nir_builder *b,
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* this is still much better than reserving LDS and losing waves.
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* (Also much better than storing and reloading from the scratch ring.)
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*/
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const nir_io_semantics io_sem = nir_intrinsic_io_semantics(intrin);
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unsigned param_offset = s->vs_output_param_offset[io_sem.location];
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nir_def *ring = nir_load_ring_attr_amd(b);
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nir_def *soffset = nir_load_ring_attr_offset_amd(b);
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@ -3912,7 +3911,7 @@ ms_store_arrayed_output_intrin(nir_builder *b,
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u_foreach_bit(comp, write_mask) {
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nir_def *val = nir_channel(b, store_val, comp);
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unsigned idx = location * 4 + comp + component_offset;
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unsigned idx = io_sem.location * 4 + comp + component_offset;
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nir_store_var(b, s->out_variables[idx], val, 0x1);
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}
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} else {
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