2019-07-24 15:23:19 +01:00
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/*
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* Copyright (C) 2018 Alyssa Rosenzweig
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* Copyright (C) 2019 Collabora, Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "compiler.h"
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#include "midgard_ops.h"
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bool
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midgard_opt_copy_prop(compiler_context *ctx, midgard_block *block)
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{
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bool progress = false;
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mir_foreach_instr_in_block_safe(block, ins) {
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if (ins->type != TAG_ALU_4) continue;
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if (!OP_IS_MOVE(ins->alu.op)) continue;
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2019-08-02 23:25:02 +01:00
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unsigned from = ins->ssa_args.src[1];
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2019-07-24 15:23:19 +01:00
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unsigned to = ins->ssa_args.dest;
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/* We only work on pure SSA */
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if (to >= SSA_FIXED_MINIMUM) continue;
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if (from >= SSA_FIXED_MINIMUM) continue;
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2019-07-26 19:30:06 +01:00
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if (to & IS_REG) continue;
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if (from & IS_REG) continue;
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2019-07-24 15:23:19 +01:00
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/* Constant propagation is not handled here, either */
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if (ins->ssa_args.inline_constant) continue;
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if (ins->has_constants) continue;
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/* Modifier propagation is not handled here */
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2019-07-26 20:05:23 +01:00
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if (mir_nontrivial_source2_mod_simple(ins)) continue;
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2019-07-24 15:23:19 +01:00
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if (mir_nontrivial_outmod(ins)) continue;
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2019-07-26 20:05:23 +01:00
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/* Texture ops have some weirdness around bias */
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bool skip = false;
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mir_foreach_instr_global(ctx, q) {
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2019-08-02 23:25:02 +01:00
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if (q->ssa_args.src[1] != to) continue;
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2019-07-26 20:05:23 +01:00
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if (q->type == TAG_TEXTURE_4) skip = true;
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}
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if (skip)
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continue;
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/* We're clear -- rewrite, composing the swizzle */
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midgard_vector_alu_src src2 =
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vector_alu_from_unsigned(ins->alu.src2);
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mir_rewrite_index_src_swizzle(ctx, to, from, src2.swizzle);
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2019-07-24 15:23:19 +01:00
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mir_remove_instruction(ins);
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progress |= true;
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}
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return progress;
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}
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