2017-02-23 21:56:15 +00:00
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/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "nir.h"
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#include "nir_builder.h"
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static nir_ssa_def *
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2017-02-23 22:54:13 +00:00
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lower_imul64(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
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2017-02-23 21:56:15 +00:00
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{
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nir_ssa_def *x_lo = nir_unpack_64_2x32_split_x(b, x);
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nir_ssa_def *x_hi = nir_unpack_64_2x32_split_y(b, x);
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nir_ssa_def *y_lo = nir_unpack_64_2x32_split_x(b, y);
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nir_ssa_def *y_hi = nir_unpack_64_2x32_split_y(b, y);
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nir_ssa_def *res_lo = nir_imul(b, x_lo, y_lo);
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nir_ssa_def *res_hi = nir_iadd(b, nir_umul_high(b, x_lo, y_lo),
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nir_iadd(b, nir_imul(b, x_lo, y_hi),
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nir_imul(b, x_hi, y_lo)));
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return nir_pack_64_2x32_split(b, res_lo, res_hi);
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}
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static nir_ssa_def *
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lower_isign64(nir_builder *b, nir_ssa_def *x)
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{
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nir_ssa_def *x_lo = nir_unpack_64_2x32_split_x(b, x);
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nir_ssa_def *x_hi = nir_unpack_64_2x32_split_y(b, x);
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nir_ssa_def *is_non_zero = nir_i2b(b, nir_ior(b, x_lo, x_hi));
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nir_ssa_def *res_hi = nir_ishr(b, x_hi, nir_imm_int(b, 31));
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nir_ssa_def *res_lo = nir_ior(b, res_hi, nir_b2i(b, is_non_zero));
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return nir_pack_64_2x32_split(b, res_lo, res_hi);
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}
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static void
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lower_udiv64_mod64(nir_builder *b, nir_ssa_def *n, nir_ssa_def *d,
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nir_ssa_def **q, nir_ssa_def **r)
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{
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/* TODO: We should specially handle the case where the denominator is a
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* constant. In that case, we should be able to reduce it to a multiply by
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* a constant, some shifts, and an add.
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*/
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nir_ssa_def *n_lo = nir_unpack_64_2x32_split_x(b, n);
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nir_ssa_def *n_hi = nir_unpack_64_2x32_split_y(b, n);
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nir_ssa_def *d_lo = nir_unpack_64_2x32_split_x(b, d);
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nir_ssa_def *d_hi = nir_unpack_64_2x32_split_y(b, d);
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nir_const_value v = { .u32 = { 0, 0, 0, 0 } };
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nir_ssa_def *q_lo = nir_build_imm(b, n->num_components, 32, v);
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nir_ssa_def *q_hi = nir_build_imm(b, n->num_components, 32, v);
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nir_ssa_def *n_hi_before_if = n_hi;
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nir_ssa_def *q_hi_before_if = q_hi;
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/* If the upper 32 bits of denom are non-zero, it is impossible for shifts
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* greater than 32 bits to occur. If the upper 32 bits of the numerator
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* are zero, it is impossible for (denom << [63, 32]) <= numer unless
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* denom == 0.
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*/
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nir_ssa_def *need_high_div =
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nir_iand(b, nir_ieq(b, d_hi, nir_imm_int(b, 0)), nir_uge(b, n_hi, d_lo));
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nir_push_if(b, nir_bany(b, need_high_div));
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{
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/* If we only have one component, then the bany above goes away and
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* this is always true within the if statement.
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*/
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if (n->num_components == 1)
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need_high_div = nir_imm_int(b, NIR_TRUE);
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nir_ssa_def *log2_d_lo = nir_ufind_msb(b, d_lo);
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for (int i = 31; i >= 0; i--) {
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/* if ((d.x << i) <= n.y) {
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* n.y -= d.x << i;
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* quot.y |= 1U << i;
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* }
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*/
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nir_ssa_def *d_shift = nir_ishl(b, d_lo, nir_imm_int(b, i));
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nir_ssa_def *new_n_hi = nir_isub(b, n_hi, d_shift);
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nir_ssa_def *new_q_hi = nir_ior(b, q_hi, nir_imm_int(b, 1u << i));
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nir_ssa_def *cond = nir_iand(b, need_high_div,
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nir_uge(b, n_hi, d_shift));
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if (i != 0) {
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/* log2_d_lo is always <= 31, so we don't need to bother with it
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* in the last iteration.
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*/
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cond = nir_iand(b, cond,
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nir_ige(b, nir_imm_int(b, 31 - i), log2_d_lo));
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}
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n_hi = nir_bcsel(b, cond, new_n_hi, n_hi);
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q_hi = nir_bcsel(b, cond, new_q_hi, q_hi);
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}
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}
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nir_pop_if(b, NULL);
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n_hi = nir_if_phi(b, n_hi, n_hi_before_if);
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q_hi = nir_if_phi(b, q_hi, q_hi_before_if);
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nir_ssa_def *log2_denom = nir_ufind_msb(b, d_hi);
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n = nir_pack_64_2x32_split(b, n_lo, n_hi);
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d = nir_pack_64_2x32_split(b, d_lo, d_hi);
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for (int i = 31; i >= 0; i--) {
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/* if ((d64 << i) <= n64) {
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* n64 -= d64 << i;
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* quot.x |= 1U << i;
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* }
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*/
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nir_ssa_def *d_shift = nir_ishl(b, d, nir_imm_int(b, i));
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nir_ssa_def *new_n = nir_isub(b, n, d_shift);
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nir_ssa_def *new_q_lo = nir_ior(b, q_lo, nir_imm_int(b, 1u << i));
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nir_ssa_def *cond = nir_uge(b, n, d_shift);
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if (i != 0) {
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/* log2_denom is always <= 31, so we don't need to bother with it
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* in the last iteration.
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*/
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cond = nir_iand(b, cond,
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nir_ige(b, nir_imm_int(b, 31 - i), log2_denom));
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}
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n = nir_bcsel(b, cond, new_n, n);
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q_lo = nir_bcsel(b, cond, new_q_lo, q_lo);
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}
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*q = nir_pack_64_2x32_split(b, q_lo, q_hi);
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*r = n;
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}
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static nir_ssa_def *
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lower_udiv64(nir_builder *b, nir_ssa_def *n, nir_ssa_def *d)
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{
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nir_ssa_def *q, *r;
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lower_udiv64_mod64(b, n, d, &q, &r);
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return q;
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}
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static nir_ssa_def *
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lower_idiv64(nir_builder *b, nir_ssa_def *n, nir_ssa_def *d)
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{
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nir_ssa_def *n_hi = nir_unpack_64_2x32_split_y(b, n);
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nir_ssa_def *d_hi = nir_unpack_64_2x32_split_y(b, d);
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nir_ssa_def *negate = nir_ine(b, nir_ilt(b, n_hi, nir_imm_int(b, 0)),
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nir_ilt(b, d_hi, nir_imm_int(b, 0)));
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nir_ssa_def *q, *r;
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lower_udiv64_mod64(b, nir_iabs(b, n), nir_iabs(b, d), &q, &r);
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return nir_bcsel(b, negate, nir_ineg(b, q), q);
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}
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static nir_ssa_def *
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lower_umod64(nir_builder *b, nir_ssa_def *n, nir_ssa_def *d)
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{
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nir_ssa_def *q, *r;
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lower_udiv64_mod64(b, n, d, &q, &r);
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return r;
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}
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static nir_ssa_def *
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lower_imod64(nir_builder *b, nir_ssa_def *n, nir_ssa_def *d)
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{
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nir_ssa_def *n_hi = nir_unpack_64_2x32_split_y(b, n);
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nir_ssa_def *d_hi = nir_unpack_64_2x32_split_y(b, d);
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2017-03-01 23:20:31 +00:00
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nir_ssa_def *n_is_neg = nir_ilt(b, n_hi, nir_imm_int(b, 0));
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nir_ssa_def *d_is_neg = nir_ilt(b, d_hi, nir_imm_int(b, 0));
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2017-02-23 21:56:15 +00:00
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nir_ssa_def *q, *r;
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lower_udiv64_mod64(b, nir_iabs(b, n), nir_iabs(b, d), &q, &r);
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2017-03-01 23:20:31 +00:00
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nir_ssa_def *rem = nir_bcsel(b, n_is_neg, nir_ineg(b, r), r);
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return nir_bcsel(b, nir_ieq(b, r, nir_imm_int64(b, 0)), nir_imm_int64(b, 0),
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nir_bcsel(b, nir_ieq(b, n_is_neg, d_is_neg), rem,
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nir_iadd(b, rem, d)));
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}
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static nir_ssa_def *
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lower_irem64(nir_builder *b, nir_ssa_def *n, nir_ssa_def *d)
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{
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nir_ssa_def *n_hi = nir_unpack_64_2x32_split_y(b, n);
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nir_ssa_def *n_is_neg = nir_ilt(b, n_hi, nir_imm_int(b, 0));
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nir_ssa_def *q, *r;
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lower_udiv64_mod64(b, nir_iabs(b, n), nir_iabs(b, d), &q, &r);
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return nir_bcsel(b, n_is_neg, nir_ineg(b, r), r);
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2017-02-23 21:56:15 +00:00
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}
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2017-02-23 22:54:13 +00:00
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static nir_lower_int64_options
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opcode_to_options_mask(nir_op opcode)
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{
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switch (opcode) {
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case nir_op_imul:
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return nir_lower_imul64;
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case nir_op_isign:
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return nir_lower_isign64;
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case nir_op_udiv:
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case nir_op_idiv:
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case nir_op_umod:
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case nir_op_imod:
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case nir_op_irem:
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return nir_lower_divmod64;
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default:
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return 0;
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}
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}
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static nir_ssa_def *
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lower_int64_alu_instr(nir_builder *b, nir_alu_instr *alu)
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{
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nir_ssa_def *src[4];
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for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++)
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src[i] = nir_ssa_for_alu_src(b, alu, i);
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switch (alu->op) {
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case nir_op_imul:
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return lower_imul64(b, src[0], src[1]);
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case nir_op_isign:
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return lower_isign64(b, src[0]);
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case nir_op_udiv:
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return lower_udiv64(b, src[0], src[1]);
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case nir_op_idiv:
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return lower_idiv64(b, src[0], src[1]);
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case nir_op_umod:
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return lower_umod64(b, src[0], src[1]);
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case nir_op_imod:
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return lower_imod64(b, src[0], src[1]);
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2017-03-01 23:20:31 +00:00
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case nir_op_irem:
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return lower_irem64(b, src[0], src[1]);
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2017-02-23 22:54:13 +00:00
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default:
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unreachable("Invalid ALU opcode to lower");
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}
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}
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2017-02-23 21:56:15 +00:00
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static bool
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lower_int64_impl(nir_function_impl *impl, nir_lower_int64_options options)
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{
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nir_builder b;
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nir_builder_init(&b, impl);
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bool progress = false;
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nir_foreach_block(block, impl) {
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nir_foreach_instr_safe(instr, block) {
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if (instr->type != nir_instr_type_alu)
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continue;
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nir_alu_instr *alu = nir_instr_as_alu(instr);
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assert(alu->dest.dest.is_ssa);
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if (alu->dest.dest.ssa.bit_size != 64)
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continue;
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2017-02-23 22:54:13 +00:00
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if (!(options & opcode_to_options_mask(alu->op)))
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2017-02-23 21:56:15 +00:00
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continue;
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2017-02-23 22:54:13 +00:00
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b.cursor = nir_before_instr(instr);
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nir_ssa_def *lowered = lower_int64_alu_instr(&b, alu);
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nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa,
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nir_src_for_ssa(lowered));
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nir_instr_remove(&alu->instr);
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progress = true;
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2017-02-23 21:56:15 +00:00
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}
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}
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return progress;
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}
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bool
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nir_lower_int64(nir_shader *shader, nir_lower_int64_options options)
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{
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bool progress = false;
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nir_foreach_function(function, shader) {
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if (function->impl)
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progress |= lower_int64_impl(function->impl, options);
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}
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return progress;
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}
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