mirror of https://github.com/doitsujin/dxvk
360 lines
12 KiB
C++
360 lines
12 KiB
C++
#include "dxbc_decoder.h"
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namespace dxvk {
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const uint32_t* DxbcCodeSlice::ptrAt(uint32_t id) const {
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if (m_ptr + id >= m_end)
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throw DxvkError("DxbcCodeSlice: End of stream");
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return m_ptr + id;
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}
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uint32_t DxbcCodeSlice::at(uint32_t id) const {
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if (m_ptr + id >= m_end)
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throw DxvkError("DxbcCodeSlice: End of stream");
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return m_ptr[id];
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}
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uint32_t DxbcCodeSlice::read() {
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if (m_ptr >= m_end)
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throw DxvkError("DxbcCodeSlice: End of stream");
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return *(m_ptr++);
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}
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DxbcCodeSlice DxbcCodeSlice::take(uint32_t n) const {
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if (m_ptr + n > m_end)
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throw DxvkError("DxbcCodeSlice: End of stream");
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return DxbcCodeSlice(m_ptr, m_ptr + n);
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}
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DxbcCodeSlice DxbcCodeSlice::skip(uint32_t n) const {
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if (m_ptr + n > m_end)
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throw DxvkError("DxbcCodeSlice: End of stream");
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return DxbcCodeSlice(m_ptr + n, m_end);
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}
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void DxbcDecodeContext::decodeInstruction(DxbcCodeSlice& code) {
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const uint32_t token0 = code.at(0);
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// Initialize the instruction structure. Some of these values
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// may not get written otherwise while decoding the instruction.
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m_instruction.op = static_cast<DxbcOpcode>(bit::extract(token0, 0, 10));
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m_instruction.opClass = DxbcInstClass::Undefined;
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m_instruction.sampleControls = { 0, 0, 0 };
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m_instruction.dstCount = 0;
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m_instruction.srcCount = 0;
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m_instruction.immCount = 0;
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m_instruction.dst = m_dstOperands.data();
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m_instruction.src = m_srcOperands.data();
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m_instruction.imm = m_immOperands.data();
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m_instruction.customDataType = DxbcCustomDataClass::Comment;
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m_instruction.customDataSize = 0;
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m_instruction.customData = nullptr;
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// Reset the index pointer, which may still contain
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// a non-zero value from the previous iteration
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m_indexId = 0;
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// Instruction length, in DWORDs. This includes the token
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// itself and any other prefix that an instruction may have.
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uint32_t length = 0;
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if (m_instruction.op == DxbcOpcode::CustomData) {
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length = code.at(1);
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this->decodeCustomData(code.take(length));
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} else {
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length = bit::extract(token0, 24, 30);
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this->decodeOperation(code.take(length));
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}
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// Advance the caller's slice to the next token so that
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// they can make consecutive calls to decodeInstruction()
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code = code.skip(length);
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}
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void DxbcDecodeContext::decodeCustomData(DxbcCodeSlice code) {
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const uint32_t blockLength = code.at(1);
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if (blockLength < 2) {
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Logger::err("DxbcDecodeContext: Invalid custom data block");
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return;
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}
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// Custom data blocks have their own instruction class
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m_instruction.op = DxbcOpcode::CustomData;
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m_instruction.opClass = DxbcInstClass::CustomData;
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// We'll point into the code buffer rather than making a copy
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m_instruction.customDataType = static_cast<DxbcCustomDataClass>(
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bit::extract(code.at(0), 11, 31));
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m_instruction.customDataSize = blockLength - 2;
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m_instruction.customData = code.ptrAt(2);
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}
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void DxbcDecodeContext::decodeOperation(DxbcCodeSlice code) {
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uint32_t token = code.read();
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// Result modifiers, which are applied to common ALU ops
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m_instruction.modifiers.saturate = !!bit::extract(token, 13, 13);
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m_instruction.modifiers.precise = !!bit::extract(token, 19, 22);
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// Opcode controls. It will depend on the
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// opcode itself which ones are valid.
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m_instruction.controls = DxbcShaderOpcodeControls(token);
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// Process extended opcode tokens
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while (bit::extract(token, 31, 31)) {
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token = code.read();
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const DxbcExtOpcode extOpcode
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= static_cast<DxbcExtOpcode>(bit::extract(token, 0, 5));
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switch (extOpcode) {
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case DxbcExtOpcode::SampleControls: {
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struct {
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int u : 4;
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int v : 4;
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int w : 4;
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} aoffimmi;
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aoffimmi.u = bit::extract(token, 9, 12);
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aoffimmi.v = bit::extract(token, 13, 16);
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aoffimmi.w = bit::extract(token, 17, 20);
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// Four-bit signed numbers, sign-extend them
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m_instruction.sampleControls.u = aoffimmi.u;
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m_instruction.sampleControls.v = aoffimmi.v;
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m_instruction.sampleControls.w = aoffimmi.w;
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} break;
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case DxbcExtOpcode::ResourceDim:
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case DxbcExtOpcode::ResourceReturnType:
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break; // part of resource description
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default:
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Logger::warn(str::format(
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"DxbcDecodeContext: Unhandled extended opcode: ",
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extOpcode));
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}
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}
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// Retrieve the instruction format in order to parse the
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// operands. Doing this mostly automatically means that
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// the compiler can rely on the operands being valid.
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const DxbcInstFormat format = dxbcInstructionFormat(m_instruction.op);
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m_instruction.opClass = format.instructionClass;
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for (uint32_t i = 0; i < format.operandCount; i++)
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this->decodeOperand(code, format.operands[i]);
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}
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void DxbcDecodeContext::decodeComponentSelection(DxbcRegister& reg, uint32_t token) {
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// Pick the correct component selection mode based on the
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// component count. We'll simplify this here so that the
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// compiler can assume that everything is a 4D vector.
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reg.componentCount = static_cast<DxbcComponentCount>(bit::extract(token, 0, 1));
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switch (reg.componentCount) {
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// No components - used for samplers etc.
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case DxbcComponentCount::Component0:
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reg.mask = DxbcRegMask(false, false, false, false);
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reg.swizzle = DxbcRegSwizzle(0, 0, 0, 0);
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break;
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// One component - used for immediates
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// and a few built-in registers.
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case DxbcComponentCount::Component1:
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reg.mask = DxbcRegMask(true, false, false, false);
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reg.swizzle = DxbcRegSwizzle(0, 0, 0, 0);
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break;
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// Four components - everything else. This requires us
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// to actually parse the component selection mode.
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case DxbcComponentCount::Component4: {
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const DxbcRegMode componentMode =
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static_cast<DxbcRegMode>(bit::extract(token, 2, 3));
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switch (componentMode) {
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// Write mask for destination operands
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case DxbcRegMode::Mask:
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reg.mask = bit::extract(token, 4, 7);
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reg.swizzle = DxbcRegSwizzle(0, 1, 2, 3);
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break;
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// Swizzle for source operands (including resources)
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case DxbcRegMode::Swizzle:
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reg.mask = DxbcRegMask(true, true, true, true);
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reg.swizzle = DxbcRegSwizzle(
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bit::extract(token, 4, 5),
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bit::extract(token, 6, 7),
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bit::extract(token, 8, 9),
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bit::extract(token, 10, 11));
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break;
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// Selection of one component. We can generate both a
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// mask and a swizzle for this so that the compiler
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// won't have to deal with this case specifically.
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case DxbcRegMode::Select1: {
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const uint32_t n = bit::extract(token, 4, 5);
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reg.mask = DxbcRegMask(n == 0, n == 1, n == 2, n == 3);
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reg.swizzle = DxbcRegSwizzle(n, n, n, n);
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} break;
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default:
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Logger::warn("DxbcDecodeContext: Invalid component selection mode");
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}
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} break;
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default:
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Logger::warn("DxbcDecodeContext: Invalid component count");
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}
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}
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void DxbcDecodeContext::decodeOperandExtensions(DxbcCodeSlice& code, DxbcRegister& reg, uint32_t token) {
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while (bit::extract(token, 31, 31)) {
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token = code.read();
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// Type of the extended operand token
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const DxbcOperandExt extTokenType =
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static_cast<DxbcOperandExt>(bit::extract(token, 0, 5));
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switch (extTokenType) {
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// Operand modifiers, which are used to manipulate the
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// value of a source operand during the load operation
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case DxbcOperandExt::OperandModifier:
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reg.modifiers = bit::extract(token, 6, 13);
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break;
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default:
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Logger::warn(str::format(
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"DxbcDecodeContext: Unhandled extended operand token: ",
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extTokenType));
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}
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}
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}
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void DxbcDecodeContext::decodeOperandImmediates(DxbcCodeSlice& code, DxbcRegister& reg) {
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if (reg.type == DxbcOperandType::Imm32
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|| reg.type == DxbcOperandType::Imm64) {
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switch (reg.componentCount) {
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// This is commonly used if only one vector
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// component is involved in an operation
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case DxbcComponentCount::Component1: {
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reg.imm.u32_1 = code.read();
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} break;
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// Typical four-component vector
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case DxbcComponentCount::Component4: {
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reg.imm.u32_4[0] = code.read();
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reg.imm.u32_4[1] = code.read();
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reg.imm.u32_4[2] = code.read();
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reg.imm.u32_4[3] = code.read();
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} break;
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default:
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Logger::warn("DxbcDecodeContext: Invalid component count for immediate operand");
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}
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}
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}
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void DxbcDecodeContext::decodeOperandIndex(DxbcCodeSlice& code, DxbcRegister& reg, uint32_t token) {
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reg.idxDim = bit::extract(token, 20, 21);
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for (uint32_t i = 0; i < reg.idxDim; i++) {
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// An index can be encoded in various different ways
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const DxbcOperandIndexRepresentation repr =
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static_cast<DxbcOperandIndexRepresentation>(
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bit::extract(token, 22 + 3 * i, 24 + 3 * i));
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switch (repr) {
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case DxbcOperandIndexRepresentation::Imm32:
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reg.idx[i].offset = static_cast<int32_t>(code.read());
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reg.idx[i].relReg = nullptr;
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break;
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case DxbcOperandIndexRepresentation::Relative:
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reg.idx[i].offset = 0;
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reg.idx[i].relReg = &m_indices.at(m_indexId);
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this->decodeRegister(code,
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m_indices.at(m_indexId++),
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DxbcScalarType::Sint32);
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break;
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case DxbcOperandIndexRepresentation::Imm32Relative:
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reg.idx[i].offset = static_cast<int32_t>(code.read());
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reg.idx[i].relReg = &m_indices.at(m_indexId);
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this->decodeRegister(code,
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m_indices.at(m_indexId++),
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DxbcScalarType::Sint32);
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break;
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default:
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Logger::warn(str::format(
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"DxbcDecodeContext: Unhandled index representation: ",
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repr));
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}
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}
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}
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void DxbcDecodeContext::decodeRegister(DxbcCodeSlice& code, DxbcRegister& reg, DxbcScalarType type) {
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const uint32_t token = code.read();
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reg.type = static_cast<DxbcOperandType>(bit::extract(token, 12, 19));
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reg.dataType = type;
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reg.modifiers = 0;
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reg.idxDim = 0;
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for (uint32_t i = 0; i < DxbcMaxRegIndexDim; i++) {
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reg.idx[i].relReg = nullptr;
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reg.idx[i].offset = 0;
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}
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this->decodeComponentSelection(reg, token);
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this->decodeOperandExtensions(code, reg, token);
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this->decodeOperandImmediates(code, reg);
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this->decodeOperandIndex(code, reg, token);
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}
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void DxbcDecodeContext::decodeImm32(DxbcCodeSlice& code, DxbcImmediate& imm, DxbcScalarType type) {
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imm.u32 = code.read();
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}
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void DxbcDecodeContext::decodeOperand(DxbcCodeSlice& code, const DxbcInstOperandFormat& format) {
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switch (format.kind) {
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case DxbcOperandKind::DstReg: {
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const uint32_t operandId = m_instruction.dstCount++;
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this->decodeRegister(code, m_dstOperands.at(operandId), format.type);
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} break;
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case DxbcOperandKind::SrcReg: {
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const uint32_t operandId = m_instruction.srcCount++;
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this->decodeRegister(code, m_srcOperands.at(operandId), format.type);
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} break;
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case DxbcOperandKind::Imm32: {
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const uint32_t operandId = m_instruction.immCount++;
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this->decodeImm32(code, m_immOperands.at(operandId), format.type);
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} break;
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default:
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throw DxvkError("DxbcDecodeContext: Invalid operand format");
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}
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}
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} |