mirror of https://github.com/doitsujin/dxvk
[dxbc] Remove emitRawBuffer{Load,Store}
And factor these into the callers. We need to preserve the raw index and offset parameters to use raw access chains.
This commit is contained in:
Philip Rebohle
parent
94098aa97d
commit
69d74a46a0
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@ -2824,11 +2824,55 @@ namespace dxvk {
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// the data depends on the register type.
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const DxbcRegister& dstReg = ins.dst[0];
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const DxbcRegister& srcReg = isStructured ? ins.src[2] : ins.src[1];
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// Retrieve common info about the buffer
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const DxbcBufferInfo bufferInfo = getBufferInfo(srcReg);
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// Compute element index
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// Shared memory is the only type of buffer that
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// is not accessed through a texel buffer view
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bool isTgsm = srcReg.type == DxbcOperandType::ThreadGroupSharedMemory;
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bool isSsbo = bufferInfo.isSsbo;
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// Common types and IDs used while loading the data
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uint32_t bufferId = isTgsm || isSsbo ? 0 : m_module.opLoad(bufferInfo.typeId, bufferInfo.varId);
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uint32_t vectorTypeId = getVectorTypeId({ DxbcScalarType::Uint32, 4 });
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uint32_t scalarTypeId = getVectorTypeId({ DxbcScalarType::Uint32, 1 });
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// Since all data is represented as a sequence of 32-bit
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// integers, we have to load each component individually.
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std::array<uint32_t, 4> ccomps = { 0, 0, 0, 0 };
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std::array<uint32_t, 4> scomps = { 0, 0, 0, 0 };
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uint32_t scount = 0;
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// The sparse feedback ID will be non-zero for sparse
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// instructions on input. We need to reset it to 0.
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SpirvMemoryOperands memoryOperands;
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SpirvImageOperands imageOperands;
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imageOperands.sparse = ins.dstCount == 2;
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uint32_t coherence = bufferInfo.coherence;
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if (isTgsm && m_moduleInfo.options.forceVolatileTgsmAccess) {
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memoryOperands.flags |= spv::MemoryAccessVolatileMask;
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coherence = spv::ScopeWorkgroup;
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}
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if (coherence) {
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memoryOperands.flags |= spv::MemoryAccessNonPrivatePointerMask;
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if (coherence != spv::ScopeInvocation) {
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memoryOperands.flags |= spv::MemoryAccessMakePointerVisibleMask;
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memoryOperands.makeVisible = m_module.constu32(coherence);
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imageOperands.flags = spv::ImageOperandsNonPrivateTexelMask
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| spv::ImageOperandsMakeTexelVisibleMask;
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imageOperands.makeVisible = m_module.constu32(coherence);
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}
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}
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uint32_t sparseFeedbackId = 0;
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const DxbcRegisterValue elementIndex = isStructured
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? emitCalcBufferIndexStructured(
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emitRegisterLoad(ins.src[0], DxbcRegMask(true, false, false, false)),
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@ -2837,10 +2881,81 @@ namespace dxvk {
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: emitCalcBufferIndexRaw(
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emitRegisterLoad(ins.src[0], DxbcRegMask(true, false, false, false)));
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uint32_t sparseFeedbackId = uint32_t(ins.dstCount == 2);
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for (uint32_t i = 0; i < 4; i++) {
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uint32_t sindex = srcReg.swizzle[i];
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emitRegisterStore(dstReg, emitRawBufferLoad(srcReg,
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elementIndex, dstReg.mask, sparseFeedbackId));
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if (!dstReg.mask[i])
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continue;
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if (ccomps[sindex] == 0) {
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uint32_t elementIndexAdjusted = m_module.opIAdd(
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getVectorTypeId(elementIndex.type), elementIndex.id,
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m_module.consti32(sindex));
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// Load requested component from the buffer
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uint32_t zero = 0;
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if (isTgsm) {
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ccomps[sindex] = m_module.opLoad(scalarTypeId,
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m_module.opAccessChain(bufferInfo.typeId,
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bufferInfo.varId, 1, &elementIndexAdjusted),
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memoryOperands);
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} else if (isSsbo) {
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uint32_t indices[2] = { m_module.constu32(0), elementIndexAdjusted };
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ccomps[sindex] = m_module.opLoad(scalarTypeId,
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m_module.opAccessChain(bufferInfo.typeId,
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bufferInfo.varId, 2, indices),
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memoryOperands);
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} else {
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uint32_t resultTypeId = vectorTypeId;
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uint32_t resultId = 0;
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if (imageOperands.sparse)
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resultTypeId = getSparseResultTypeId(vectorTypeId);
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if (srcReg.type == DxbcOperandType::Resource) {
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resultId = m_module.opImageFetch(resultTypeId,
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bufferId, elementIndexAdjusted, imageOperands);
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} else if (srcReg.type == DxbcOperandType::UnorderedAccessView) {
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resultId = m_module.opImageRead(resultTypeId,
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bufferId, elementIndexAdjusted, imageOperands);
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} else {
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throw DxvkError("DxbcCompiler: Invalid operand type for strucured/raw load");
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}
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// Only read sparse feedback once. This may be somewhat inaccurate
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// for reads that straddle pages, but we can't easily emulate this.
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if (imageOperands.sparse) {
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imageOperands.sparse = false;
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sparseFeedbackId = resultId;
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resultId = emitExtractSparseTexel(vectorTypeId, resultId);
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}
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ccomps[sindex] = m_module.opCompositeExtract(scalarTypeId, resultId, 1, &zero);
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}
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}
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}
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for (uint32_t i = 0; i < 4; i++) {
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uint32_t sindex = srcReg.swizzle[i];
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if (dstReg.mask[i])
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scomps[scount++] = ccomps[sindex];
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}
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DxbcRegisterValue result = { };
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result.type.ctype = DxbcScalarType::Uint32;
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result.type.ccount = scount;
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result.id = scomps[0];
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if (scount > 1) {
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result.id = m_module.opCompositeConstruct(
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getVectorTypeId(result.type),
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scount, scomps.data());
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}
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emitRegisterStore(dstReg, result);
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if (sparseFeedbackId)
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emitStoreSparseFeedback(ins.dst[1], sparseFeedbackId);
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@ -2863,11 +2978,49 @@ namespace dxvk {
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// the data depends on the register type.
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const DxbcRegister& dstReg = ins.dst[0];
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const DxbcRegister& srcReg = isStructured ? ins.src[2] : ins.src[1];
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DxbcRegisterValue value = emitRegisterLoad(srcReg, dstReg.mask);
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value = emitRegisterBitcast(value, DxbcScalarType::Uint32);
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// Retrieve common info about the buffer
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const DxbcBufferInfo bufferInfo = getBufferInfo(dstReg);
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// Compute element index
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// Thread Group Shared Memory is not accessed through a texel buffer view
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bool isTgsm = dstReg.type == DxbcOperandType::ThreadGroupSharedMemory;
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bool isSsbo = bufferInfo.isSsbo;
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uint32_t bufferId = isTgsm || isSsbo ? 0 : m_module.opLoad(bufferInfo.typeId, bufferInfo.varId);
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uint32_t scalarTypeId = getVectorTypeId({ DxbcScalarType::Uint32, 1 });
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uint32_t vectorTypeId = getVectorTypeId({ DxbcScalarType::Uint32, 4 });
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uint32_t srcComponentIndex = 0;
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// Set memory operands according to resource properties
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SpirvMemoryOperands memoryOperands;
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SpirvImageOperands imageOperands;
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uint32_t coherence = bufferInfo.coherence;
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if (isTgsm && m_moduleInfo.options.forceVolatileTgsmAccess) {
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memoryOperands.flags |= spv::MemoryAccessVolatileMask;
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coherence = spv::ScopeWorkgroup;
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}
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if (coherence) {
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memoryOperands.flags |= spv::MemoryAccessNonPrivatePointerMask;
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if (coherence != spv::ScopeInvocation) {
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memoryOperands.flags |= spv::MemoryAccessMakePointerAvailableMask;
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memoryOperands.makeAvailable = m_module.constu32(coherence);
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imageOperands.flags = spv::ImageOperandsNonPrivateTexelMask
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imageOperands.makeAvailable = m_module.constu32(coherence);
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}
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}
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// Compute flat element index
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const DxbcRegisterValue elementIndex = isStructured
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? emitCalcBufferIndexStructured(
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emitRegisterLoad(ins.src[0], DxbcRegMask(true, false, false, false)),
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@ -2875,9 +3028,50 @@ namespace dxvk {
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bufferInfo.stride)
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: emitCalcBufferIndexRaw(
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emitRegisterLoad(ins.src[0], DxbcRegMask(true, false, false, false)));
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emitRawBufferStore(dstReg, elementIndex,
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emitRegisterLoad(srcReg, dstReg.mask));
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for (uint32_t i = 0; i < 4; i++) {
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if (dstReg.mask[i]) {
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uint32_t srcComponentId = value.type.ccount > 1
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? m_module.opCompositeExtract(scalarTypeId,
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value.id, 1, &srcComponentIndex)
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: value.id;
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// Add the component offset to the element index
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uint32_t elementIndexAdjusted = i != 0
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? m_module.opIAdd(getVectorTypeId(elementIndex.type),
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elementIndex.id, m_module.consti32(i))
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: elementIndex.id;
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if (isTgsm) {
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m_module.opStore(
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m_module.opAccessChain(bufferInfo.typeId,
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bufferInfo.varId, 1, &elementIndexAdjusted),
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srcComponentId, memoryOperands);
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} else if (isSsbo) {
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uint32_t indices[2] = { m_module.constu32(0), elementIndexAdjusted };
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m_module.opStore(
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m_module.opAccessChain(bufferInfo.typeId,
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bufferInfo.varId, 2, indices),
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srcComponentId, memoryOperands);
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} else if (dstReg.type == DxbcOperandType::UnorderedAccessView) {
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const std::array<uint32_t, 4> srcVectorIds = {
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srcComponentId, srcComponentId,
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srcComponentId, srcComponentId,
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};
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m_module.opImageWrite(
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bufferId, elementIndexAdjusted,
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m_module.opCompositeConstruct(vectorTypeId,
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4, srcVectorIds.data()),
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imageOperands);
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} else {
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throw DxvkError("DxbcCompiler: Invalid operand type for strucured/raw store");
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}
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// Write next component
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srcComponentIndex += 1;
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}
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}
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}
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@ -5205,227 +5399,6 @@ namespace dxvk {
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}
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DxbcRegisterValue DxbcCompiler::emitRawBufferLoad(
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const DxbcRegister& operand,
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DxbcRegisterValue elementIndex,
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DxbcRegMask writeMask,
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uint32_t& sparseFeedbackId) {
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const DxbcBufferInfo bufferInfo = getBufferInfo(operand);
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// Shared memory is the only type of buffer that
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// is not accessed through a texel buffer view
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bool isTgsm = operand.type == DxbcOperandType::ThreadGroupSharedMemory;
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bool isSsbo = bufferInfo.isSsbo;
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// Common types and IDs used while loading the data
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uint32_t bufferId = isTgsm || isSsbo ? 0 : m_module.opLoad(bufferInfo.typeId, bufferInfo.varId);
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uint32_t vectorTypeId = getVectorTypeId({ DxbcScalarType::Uint32, 4 });
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uint32_t scalarTypeId = getVectorTypeId({ DxbcScalarType::Uint32, 1 });
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// Since all data is represented as a sequence of 32-bit
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// integers, we have to load each component individually.
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std::array<uint32_t, 4> ccomps = { 0, 0, 0, 0 };
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std::array<uint32_t, 4> scomps = { 0, 0, 0, 0 };
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uint32_t scount = 0;
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// The sparse feedback ID will be non-zero for sparse
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// instructions on input. We need to reset it to 0.
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SpirvMemoryOperands memoryOperands;
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SpirvImageOperands imageOperands;
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imageOperands.sparse = sparseFeedbackId != 0;
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uint32_t coherence = bufferInfo.coherence;
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if (isTgsm && m_moduleInfo.options.forceVolatileTgsmAccess) {
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memoryOperands.flags |= spv::MemoryAccessVolatileMask;
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coherence = spv::ScopeWorkgroup;
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}
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if (coherence) {
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memoryOperands.flags |= spv::MemoryAccessNonPrivatePointerMask;
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if (coherence != spv::ScopeInvocation) {
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memoryOperands.flags |= spv::MemoryAccessMakePointerVisibleMask;
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memoryOperands.makeVisible = m_module.constu32(coherence);
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imageOperands.flags = spv::ImageOperandsNonPrivateTexelMask
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| spv::ImageOperandsMakeTexelVisibleMask;
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imageOperands.makeVisible = m_module.constu32(coherence);
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}
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}
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sparseFeedbackId = 0;
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for (uint32_t i = 0; i < 4; i++) {
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uint32_t sindex = operand.swizzle[i];
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if (!writeMask[i])
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continue;
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if (ccomps[sindex] == 0) {
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uint32_t elementIndexAdjusted = m_module.opIAdd(
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getVectorTypeId(elementIndex.type), elementIndex.id,
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m_module.consti32(sindex));
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// Load requested component from the buffer
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uint32_t zero = 0;
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if (isTgsm) {
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ccomps[sindex] = m_module.opLoad(scalarTypeId,
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m_module.opAccessChain(bufferInfo.typeId,
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bufferInfo.varId, 1, &elementIndexAdjusted),
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memoryOperands);
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} else if (isSsbo) {
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uint32_t indices[2] = { m_module.constu32(0), elementIndexAdjusted };
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ccomps[sindex] = m_module.opLoad(scalarTypeId,
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m_module.opAccessChain(bufferInfo.typeId,
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bufferInfo.varId, 2, indices),
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memoryOperands);
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} else {
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uint32_t resultTypeId = vectorTypeId;
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uint32_t resultId = 0;
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if (imageOperands.sparse)
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resultTypeId = getSparseResultTypeId(vectorTypeId);
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if (operand.type == DxbcOperandType::Resource) {
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resultId = m_module.opImageFetch(resultTypeId,
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bufferId, elementIndexAdjusted, imageOperands);
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} else if (operand.type == DxbcOperandType::UnorderedAccessView) {
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resultId = m_module.opImageRead(resultTypeId,
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bufferId, elementIndexAdjusted, imageOperands);
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} else {
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throw DxvkError("DxbcCompiler: Invalid operand type for strucured/raw load");
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}
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// Only read sparse feedback once. This may be somewhat inaccurate
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// for reads that straddle pages, but we can't easily emulate this.
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if (imageOperands.sparse) {
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imageOperands.sparse = false;
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sparseFeedbackId = resultId;
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resultId = emitExtractSparseTexel(vectorTypeId, resultId);
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}
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ccomps[sindex] = m_module.opCompositeExtract(scalarTypeId, resultId, 1, &zero);
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}
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}
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}
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for (uint32_t i = 0; i < 4; i++) {
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uint32_t sindex = operand.swizzle[i];
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if (writeMask[i])
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scomps[scount++] = ccomps[sindex];
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}
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DxbcRegisterValue result;
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result.type.ctype = DxbcScalarType::Uint32;
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result.type.ccount = scount;
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result.id = scomps[0];
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if (scount > 1) {
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result.id = m_module.opCompositeConstruct(
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getVectorTypeId(result.type),
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scount, scomps.data());
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}
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return result;
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}
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void DxbcCompiler::emitRawBufferStore(
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const DxbcRegister& operand,
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DxbcRegisterValue elementIndex,
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DxbcRegisterValue value) {
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const DxbcBufferInfo bufferInfo = getBufferInfo(operand);
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// Cast source value to the expected data type
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value = emitRegisterBitcast(value, DxbcScalarType::Uint32);
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// Thread Group Shared Memory is not accessed through a texel buffer view
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bool isTgsm = operand.type == DxbcOperandType::ThreadGroupSharedMemory;
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bool isSsbo = bufferInfo.isSsbo;
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// Perform the actual write operation
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uint32_t bufferId = isTgsm || isSsbo ? 0 : m_module.opLoad(bufferInfo.typeId, bufferInfo.varId);
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uint32_t scalarTypeId = getVectorTypeId({ DxbcScalarType::Uint32, 1 });
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uint32_t vectorTypeId = getVectorTypeId({ DxbcScalarType::Uint32, 4 });
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uint32_t srcComponentIndex = 0;
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// Set memory operands according to resource properties
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SpirvMemoryOperands memoryOperands;
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SpirvImageOperands imageOperands;
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uint32_t coherence = bufferInfo.coherence;
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if (isTgsm && m_moduleInfo.options.forceVolatileTgsmAccess) {
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memoryOperands.flags |= spv::MemoryAccessVolatileMask;
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coherence = spv::ScopeWorkgroup;
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}
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if (coherence) {
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memoryOperands.flags |= spv::MemoryAccessNonPrivatePointerMask;
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if (coherence != spv::ScopeInvocation) {
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memoryOperands.flags |= spv::MemoryAccessMakePointerAvailableMask;
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memoryOperands.makeAvailable = m_module.constu32(coherence);
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imageOperands.flags = spv::ImageOperandsNonPrivateTexelMask
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| spv::ImageOperandsMakeTexelAvailableMask;
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imageOperands.makeAvailable = m_module.constu32(coherence);
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}
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}
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for (uint32_t i = 0; i < 4; i++) {
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if (operand.mask[i]) {
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uint32_t srcComponentId = value.type.ccount > 1
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? m_module.opCompositeExtract(scalarTypeId,
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value.id, 1, &srcComponentIndex)
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: value.id;
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// Add the component offset to the element index
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uint32_t elementIndexAdjusted = i != 0
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? m_module.opIAdd(getVectorTypeId(elementIndex.type),
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elementIndex.id, m_module.consti32(i))
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: elementIndex.id;
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if (isTgsm) {
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m_module.opStore(
|
||||
m_module.opAccessChain(bufferInfo.typeId,
|
||||
bufferInfo.varId, 1, &elementIndexAdjusted),
|
||||
srcComponentId, memoryOperands);
|
||||
} else if (isSsbo) {
|
||||
uint32_t indices[2] = { m_module.constu32(0), elementIndexAdjusted };
|
||||
m_module.opStore(
|
||||
m_module.opAccessChain(bufferInfo.typeId,
|
||||
bufferInfo.varId, 2, indices),
|
||||
srcComponentId, memoryOperands);
|
||||
} else if (operand.type == DxbcOperandType::UnorderedAccessView) {
|
||||
const std::array<uint32_t, 4> srcVectorIds = {
|
||||
srcComponentId, srcComponentId,
|
||||
srcComponentId, srcComponentId,
|
||||
};
|
||||
|
||||
m_module.opImageWrite(
|
||||
bufferId, elementIndexAdjusted,
|
||||
m_module.opCompositeConstruct(vectorTypeId,
|
||||
4, srcVectorIds.data()),
|
||||
imageOperands);
|
||||
} else {
|
||||
throw DxvkError("DxbcCompiler: Invalid operand type for strucured/raw store");
|
||||
}
|
||||
|
||||
// Write next component
|
||||
srcComponentIndex += 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
DxbcRegisterValue DxbcCompiler::emitQueryBufferSize(
|
||||
const DxbcRegister& resource) {
|
||||
const DxbcBufferInfo bufferInfo = getBufferInfo(resource);
|
||||
|
|
|
|||
|
|
@ -945,19 +945,6 @@ namespace dxvk {
|
|||
const DxbcRegister& operand,
|
||||
const DxbcRegister& address);
|
||||
|
||||
///////////////////////////////
|
||||
// Resource load/store methods
|
||||
DxbcRegisterValue emitRawBufferLoad(
|
||||
const DxbcRegister& operand,
|
||||
DxbcRegisterValue elementIndex,
|
||||
DxbcRegMask writeMask,
|
||||
uint32_t& sparseFeedbackId);
|
||||
|
||||
void emitRawBufferStore(
|
||||
const DxbcRegister& operand,
|
||||
DxbcRegisterValue elementIndex,
|
||||
DxbcRegisterValue value);
|
||||
|
||||
//////////////////////////
|
||||
// Resource query methods
|
||||
DxbcRegisterValue emitQueryBufferSize(
|
||||
|
|
|
|||
Loading…
Reference in New Issue