mesa/src/nouveau/codegen
Emma Anholt f6c5b1d6c6 nir: Split usub_sat lowering flag from uadd_sat.
Intel vec4 would like to do uadd_sat, but use lowering for usub_sat.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17637>
2022-07-22 17:54:28 +00:00
..
lib
meson.build nouveau: Drop C++03 compat code 2022-07-05 13:23:12 +00:00
nv50_ir.cpp
nv50_ir.h nouveau: Drop C++03 compat code 2022-07-05 13:23:12 +00:00
nv50_ir_bb.cpp
nv50_ir_build_util.cpp
nv50_ir_build_util.h
nv50_ir_driver.h nouveau/nv50: disable GLSL IR loop unrolling 2022-06-04 16:11:49 +00:00
nv50_ir_emit_gk110.cpp
nv50_ir_emit_gm107.cpp
nv50_ir_emit_gv100.cpp
nv50_ir_emit_gv100.h
nv50_ir_emit_nv50.cpp
nv50_ir_emit_nvc0.cpp
nv50_ir_from_common.cpp
nv50_ir_from_common.h
nv50_ir_from_nir.cpp nir: Split usub_sat lowering flag from uadd_sat. 2022-07-22 17:54:28 +00:00
nv50_ir_from_tgsi.cpp gallium: Rename MUL_ZERO_WINS to LEGACY_MATH_RULES. 2022-06-10 03:26:32 +00:00
nv50_ir_graph.cpp
nv50_ir_graph.h
nv50_ir_inlines.h
nv50_ir_lowering_gm107.cpp
nv50_ir_lowering_gm107.h
nv50_ir_lowering_gv100.cpp
nv50_ir_lowering_gv100.h
nv50_ir_lowering_helper.cpp
nv50_ir_lowering_helper.h
nv50_ir_lowering_nv50.cpp
nv50_ir_lowering_nvc0.cpp nouveau: Drop C++03 compat code 2022-07-05 13:23:12 +00:00
nv50_ir_lowering_nvc0.h nouveau: Drop C++03 compat code 2022-07-05 13:23:12 +00:00
nv50_ir_peephole.cpp
nv50_ir_print.cpp
nv50_ir_ra.cpp nouveau: Drop C++03 compat code 2022-07-05 13:23:12 +00:00
nv50_ir_sched_gm107.h
nv50_ir_serialize.cpp
nv50_ir_ssa.cpp
nv50_ir_target.cpp
nv50_ir_target.h
nv50_ir_target_gm107.cpp
nv50_ir_target_gm107.h
nv50_ir_target_gv100.cpp
nv50_ir_target_gv100.h
nv50_ir_target_nv50.cpp
nv50_ir_target_nv50.h
nv50_ir_target_nvc0.cpp
nv50_ir_target_nvc0.h
nv50_ir_util.cpp
nv50_ir_util.h nouveau: Drop C++03 compat code 2022-07-05 13:23:12 +00:00