119 lines
3.8 KiB
C
119 lines
3.8 KiB
C
/*
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* Copyright © 2020 Valve Corporation
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* SPDX-License-Identifier: MIT
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*/
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#include "tu_private.h"
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#include "nir_builder.h"
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/* Some a6xx variants cannot support a non-contiguous multiview mask. Instead,
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* inside the shader something like this needs to be inserted:
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*
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* gl_Position = ((1ull << gl_ViewIndex) & view_mask) ? gl_Position : vec4(0.);
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*
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* Scan backwards until we find the gl_Position write (there should only be
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* one).
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*/
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static bool
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lower_multiview_mask(nir_shader *nir, uint32_t *mask)
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{
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nir_function_impl *impl = nir_shader_get_entrypoint(nir);
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if (util_is_power_of_two_or_zero(*mask + 1)) {
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nir_metadata_preserve(impl, nir_metadata_all);
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return false;
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}
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nir_builder b;
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nir_builder_init(&b, impl);
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uint32_t old_mask = *mask;
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*mask = BIT(util_logbase2(old_mask) + 1) - 1;
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nir_foreach_block_reverse(block, impl) {
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nir_foreach_instr_reverse(instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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if (intrin->intrinsic != nir_intrinsic_store_deref)
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continue;
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nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
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if (!nir_deref_mode_is(deref, nir_var_shader_out))
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continue;
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nir_variable *var = nir_deref_instr_get_variable(deref);
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if (var->data.location != VARYING_SLOT_POS)
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continue;
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assert(intrin->src[1].is_ssa);
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nir_ssa_def *orig_src = intrin->src[1].ssa;
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b.cursor = nir_before_instr(instr);
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/* ((1ull << gl_ViewIndex) & mask) != 0 */
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nir_ssa_def *cmp =
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nir_i2b(&b, nir_iand(&b, nir_imm_int(&b, old_mask),
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nir_ishl(&b, nir_imm_int(&b, 1),
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nir_load_view_index(&b))));
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nir_ssa_def *src = nir_bcsel(&b, cmp, orig_src, nir_imm_float(&b, 0.));
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nir_instr_rewrite_src(instr, &intrin->src[1], nir_src_for_ssa(src));
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nir_metadata_preserve(impl, nir_metadata_block_index |
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nir_metadata_dominance);
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return true;
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}
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}
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nir_metadata_preserve(impl, nir_metadata_all);
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return false;
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}
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bool
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tu_nir_lower_multiview(nir_shader *nir, uint32_t mask, bool *multi_pos_output,
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struct tu_device *dev)
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{
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*multi_pos_output = false;
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bool progress = false;
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if (!dev->physical_device->info->a6xx.supports_multiview_mask)
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NIR_PASS(progress, nir, lower_multiview_mask, &mask);
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unsigned num_views = util_logbase2(mask) + 1;
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/* Blob doesn't apply multipos optimization starting from 11 views
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* even on a650, however in practice, with the limit of 16 views,
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* tests pass on a640/a650 and fail on a630.
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*/
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unsigned max_views_for_multipos =
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dev->physical_device->info->a6xx.supports_multiview_mask ? 16 : 10;
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/* Speculatively assign output locations so that we know num_outputs. We
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* will assign output locations for real after this pass.
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*/
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unsigned num_outputs;
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nir_assign_io_var_locations(nir, nir_var_shader_out, &num_outputs, MESA_SHADER_VERTEX);
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/* In addition to the generic checks done by NIR, check that we don't
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* overflow VPC with the extra copies of gl_Position.
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*/
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if (likely(!(dev->physical_device->instance->debug_flags & TU_DEBUG_NOMULTIPOS)) &&
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num_views <= max_views_for_multipos && num_outputs + (num_views - 1) <= 32 &&
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nir_can_lower_multiview(nir)) {
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*multi_pos_output = true;
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/* It appears that the multiview mask is ignored when multi-position
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* output is enabled, so we have to write 0 to inactive views ourselves.
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*/
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NIR_PASS(progress, nir, lower_multiview_mask, &mask);
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NIR_PASS_V(nir, nir_lower_multiview, mask);
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progress = true;
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}
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return progress;
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}
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