Commit Graph

92759 Commits

Author SHA1 Message Date
Tim Rowley 3b76dea5d1 swr/rast: remove unused functions
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:21:52 -05:00
Tim Rowley d91402fefa swr/rast: code cleanup (no functional change)
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:21:47 -05:00
Tim Rowley 7e271a763e swr/rast: move binner utility functions to binner.h
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:21:41 -05:00
Tim Rowley 5ea9a30f50 swr/rast: SIMD16 FE - fix/use SIMD16 calcDeterminantIntVertical()
Stop double pumping the SIMD8 version.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:21:36 -05:00
Tim Rowley fb9f7bd717 swr/rast: add renderTargetArrayIndex to SWR_PS_CONTEXT
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:21:30 -05:00
Tim Rowley 2438932b7e swr/rast: make simd16 logicops avx512f safe
Express the simd16 logicops in terms of avx512f instructions.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:21:22 -05:00
Tim Rowley 7be26a2d35 swr/rast: SIMD16 FE - add SIMD16 types to jitter
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:21:18 -05:00
Tim Rowley e3c93d8ddf swr/rast: SIMD16 FE - fix PA_STATE_OP::Reset()
Fixes instanced GS.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:21:12 -05:00
Tim Rowley fd14c40734 swr/rast: SIMD16 FE - simplify/refactor StreamOut
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:21:07 -05:00
Tim Rowley a230af8b44 swr/rast: SIMD16 FE - fix conservative rasterization
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:21:02 -05:00
Tim Rowley f64aea0959 swr/rast: SIMD16 FE - interleaved simdvertex output in GS
Eliminates conversion copies on GS output from simdvertex to simd16vertex.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:20:56 -05:00
Tim Rowley cbd33e71f7 swr/rast: fix _simd16_movemask_(ps,pd) native AVX512 intrinsics
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:20:51 -05:00
Tim Rowley 9fd68be133 swr/rast: SIMD16 FE - primitive assembly simplification
Reduce/simplify vertex storage usage in PA_STATE_OPT, fix PA
GetNextVSOutput wrap-around behaviour and eliminate unnecessary
SIMDVERTEX copies/storage for tri fan in PA_STATE_OPT

Fixes the OpenGL tri fan test failure under SIMD16 -
triangle-rasterization-overdraw.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:20:44 -05:00
Tim Rowley 4c23523365 swr/rast: silence write of cfg graph
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:20:39 -05:00
Tim Rowley 7e35777624 swr/rast: add CreateDirectoryPath to recursively create directories
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:20:33 -05:00
Tim Rowley f094d582ec swr/rast: add support for DX1_RGB{_SRGB} formats
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:20:27 -05:00
Tim Rowley 42b4e7cb25 swr/rast: clean up whitespace
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:20:21 -05:00
Tim Rowley 5d542b3204 swr/rast: adjust BinPostSetupPoints* function signature
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:20:15 -05:00
Tim Rowley b714208415 swr/rast: remove extra pixel center adjustment in BinPostSetupPoints
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-05-30 17:19:51 -05:00
Kenneth Graunke 56535959fd anv: Port over CACHE_MODE_1 optimization fix enables from brw.
Ben and I haven't observed these to help anything, but they enable
hardware optimizations for particular cases.  It's probably best to
enable them ahead of time, before we run into such a case.

Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2017-05-30 14:59:31 -07:00
Kenneth Graunke 53368b008e genxml: Add Gen9 CACHE_MODE_1 definitons.
These were already in gen8.xml but not gen9.xml.  There are a few new
fields and a couple that have changed.  These are all documented in the
Skylake PRM, Volume 2c Command Reference: Registers, Part 1.

Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2017-05-30 14:59:31 -07:00
Kenneth Graunke a8fde221a8 i965: Set the "Float Blend Optimization Enable" bit on Gen9+.
This is woefully undocumented.  It's some kind of optimization that
avoids unnecessary render target reads when blending with a floating
point render target, using independent alpha blending modes.

The internal documentation indicates that this bit exists on Cherryview
as well, but the other driver doesn't appear to set it on that platform.
There's also some confusing wording that indicates that it may exist on
Broadwell, but the documentation says it's reserved, so who knows.

I was not able to find any workload that benefited from setting this
bit, but it seems like a good idea to set it nonetheless.

Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2017-05-30 14:59:31 -07:00
Chad Versace 9601b41a33 i965: Fix type of brw_context::render_target_format[]
It's an array of isl_format, not uint32_t. This patch updates every
reference to render_target_format[] git-grep.

Trivial cleanup. No change in behavior.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2017-05-30 12:01:38 -07:00
Chad Versace 6e325f1203 i965: Move func to right comment block in brw_context.h
brw_init_surface_formats() is defined in brw_surface_formats.c, not
brw_wm_surface_state.c.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2017-05-30 12:01:38 -07:00
Chad Versace f5702230e0 i965: Document type of GLuint __DRIimage::format
It's either a mesa_format or mesa_array_format.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2017-05-30 12:01:37 -07:00
Chad Versace da042d951c i965: Add whitespace in intel_update_image_buffers()
Improve readability.  Add an empty line between two large 'if' blocks.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2017-05-30 12:01:37 -07:00
Chad Versace b86e079ab7 i965: Move an 'i' declaration into its 'for' loop
In intel_update_dri2_buffers().
Trivial cleanup.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2017-05-30 12:01:37 -07:00
Chad Versace a90a15d638 i965: Fix type of intel_update_image_buffers::format
It's a mesa_format, not an unsigned int.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2017-05-30 12:01:37 -07:00
Chad Versace 77a1eefa3c i965: Rename intel_create_renderbuffer
The name is misleading because the function is unrelated to GL
renderbuffers. Rename it to intel_create_winsys_renderbuffer.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2017-05-30 12:01:37 -07:00
Chad Versace e8a0a5d7f9 i965/dri: Combine declaration and assignment in intelCreateBuffer
Trivial cleanup.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2017-05-30 12:01:37 -07:00
Chad Versace 85dd3e4de1 i965/dri: Rewrite comment for intelCreateBuffer
The old comment pinned this function to X11 windows. In reality, this
function serves more than X11 and more than just windows.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2017-05-30 12:01:37 -07:00
Bartosz Tomczyk fd6c2a3f3e mesa: Avoid leaking surface in st_renderbuffer_delete
v2: add comment in code

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100741
Fixes: a5e733c6b5 mesa: drop current draw/read buffer when ctx is released
Reviewed-by: Rob Clark <robdclark@gmail.com> (v1)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-05-30 14:48:32 +01:00
Varad Gautam 4c412293d0 egl: advertise EGL_EXT_image_dma_buf_import_modifiers
v2: check for DRIimageExtension version 15 (Jason Ekstrand)

Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-05-30 13:56:20 +01:00
Varad Gautam de3c459bbd egl: implement eglQueryDmaBufModifiersEXT
query and return supported dmabuf format modifiers for
EGL_EXT_image_dma_buf_import_modifiers.

v2: move format check to the driver instead of making format queries
   here and then checking.
v3: Check DRIimageExtension version before query (Daniel Stone)
v4:
- move to DRIimageExtension version 15, check queryDmaBufModifiers before
  calling (Jason Ekstrand)
- pass external_only to the driver instead of setting as EGL_TRUE here
  (Emil Velikov, Daniel Stone)

Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-05-30 13:56:20 +01:00
Varad Gautam 6719e058d6 egl: implement eglQueryDmaBufFormatsEXT
allow egl clients to query the dmabuf formats supported on this platform.

v2: return EGLBoolean.
v3: Check DRIimageExtension version before querying (Daniel Stone).
v4: move to DRIimageExtension version 15, error checking (Jason Ekstrand).

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-05-30 13:56:20 +01:00
Varad Gautam 6f10e7c37a egl/dri2: Create EGLImages with dmabuf modifiers
Allow creating EGLImages with dmabuf format modifiers when target is
EGL_LINUX_DMA_BUF_EXT for EGL_EXT_image_dma_buf_import_modifiers.

v2:
- clear modifier assembling and error label name (Eric Engestrom)
v3:
- remove goto jumps within switch-case (Emil Velikov)
- treat zero as valid modifier (Daniel Stone)
- ensure same modifier across all dmabuf planes (Emil Velikov)
v4:
- allow modifiers to add extra planes (Louis-Francis Ratté-Boulianne)
v5:
- fix error checking, some cleanups (Jason Ekstrand)
- pass single copy of the modifier to createImageFromDmaBufs2

Signed-off-by: Pekka Paalanen <pekka.paalanen@collabora.co.uk>
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-05-30 13:56:20 +01:00
Varad Gautam c5929634a0 dri: introduce dmabuf format modifier related handles
these allow dmabuf import with modifiers, and supported format and
modifier queries, which are used to implement
EGL_EXT_image_dma_buf_import_modifiers.

v2:
- squash dmabuf queries into DRIimage version 15 (Jason Ekstrand).
- add external_only param to queryDmaBufModifiers (Emil, Daniel Stone)
- pass a single modifier form createImageFromDmaBufs2 since all planes have
the same modifier (Jason Ekstrand)

Signed-off-by: Pekka Paalanen <pekka.paalanen@collabora.co.uk>
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-05-30 13:56:20 +01:00
Pekka Paalanen fb2a1c2327 egl/main: add support for fourth plane tokens
The EGL_EXT_dma_buf_import_modifiers extension adds support for a
fourth plane, just like DRM KMS API does.

Bump maximum dma_buf plane count to four.

v2: prevent attribute tokens from being parsed if
    EXT_image_dma_buf_import_modifiers is not suported. (Emil Velikov)

Signed-off-by: Pekka Paalanen <pekka.paalanen@collabora.co.uk>
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
2017-05-30 13:56:20 +01:00
Pekka Paalanen 9434f057c8 egl: introduce DMA_BUF_MAX_PLANES
Rather than hardcoding 3, use a #define. Makes it easier to bump this
later to 4.

Signed-off-by: Pekka Paalanen <pekka.paalanen@collabora.co.uk>
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
2017-05-30 13:56:20 +01:00
Alexandre Courbot 76aa1bbb89 nvc0: support for GP10B
GP10B uses the same 3D class as GP100.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-05-30 08:27:00 -04:00
Tomeu Vizoso 106b2786b6 etnaviv: Don't try to use the index buffer if size is zero
If info->index_size is zero, info->index will point to uninitialized
memory.

Fatal signal 11 (SIGSEGV), code 2, fault addr 0xab5d07a3 in tid 20456 (surfaceflinger)

lst: Remove useless indexbuf conditional in the index_size != 0 case.

Fixes: 330d0607ed ("gallium: remove pipe_index_buffer and set_index_buffer")
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2017-05-30 11:45:10 +02:00
Kenneth Graunke d529d5ff16 i965: Always scissor on Gen4-5 instead of disabling guardband.
See commit ece0e535a4.  This makes
Gen4-5 follow the behavior we use on Gen6+.  It seems to have
worked out there.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-05-29 21:46:48 -07:00
Kenneth Graunke 70be2a96a5 i965: Unify Gen4-5 and Gen6 SF_VIEWPORT/CLIP_VIEWPORT code.
This brings the improved guardbanding we implemented on Gen6+
back to the older Gen4-5 code.  It also deletes piles of code.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-05-29 21:46:46 -07:00
Kenneth Graunke 01cb6cd473 i965: Make a set_scissor_bits helper function.
Gen4-5 include a single SCISSOR_RECT in SF_VIEWPORT.

Making a helper function will allow us to reuse this code for Gen4-5.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-05-29 21:46:43 -07:00
Kenneth Graunke 55862ed477 i965: Use GENX(packet_length) rather than hardcoded dword counts.
This is clearer and less likely to break in the future.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-05-29 21:46:42 -07:00
Kenneth Graunke c6b623f601 i965: Move the scissoring code up near the viewport code.
These are fairly related.  Gen4-5 combine the scissor rectangle and
SF_VIEWPORT.  Co-locating them will allow me to avoid forward
declarations of helper functions in a few patches.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-05-29 21:46:40 -07:00
Kenneth Graunke 9afe5846d2 genxml: Make a SCISSOR_RECT structure on Gen4-5.
Gen6+ support multiple scissor rectangles, and define a SCISSOR_RECT
structure containing their dimensions.  On Gen4-5, those same fields
exist in SF_VIEWPORT.

This patch extracts the SF_VIEWPORT fields into a SCISSOR_RECT
structure.  Although not a named concept on Gen4-5, it works just
as well, and gives us a consistent SCISSOR_RECT structure across
all generations, making it easier to reuse code.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-05-29 21:46:37 -07:00
Kenneth Graunke 44309dcea3 i965: Replace brw->gen and devinfo->gen with GEN_GEN.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-05-29 21:46:36 -07:00
Kenneth Graunke 4ce103e01a i965: Rework Sandybridge 3DSTATE_VIEWPORT_STATE_POINTERS.
On Gen7+ we emit 3DSTATE_VIEWPORT_STATE_POINTERS_{SF_CL,CC} when
emitting a new viewport.

This patch makes us take the same approach on Sandybridge - but because
we have a combined command, we just set the appropriate "change" bits.
This eliminates an atom, some dirty flagging, and some brw->*.vp_offset
writes.  It does mean we'll emit two 3DSTATE_VIEWPORT_STATE_POINTERS
instead of one if both change, but that's probably fine.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-05-29 21:46:33 -07:00
Kenneth Graunke 7f4645e89c i965: Port CC_VIEWPORT to genxml.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-05-29 21:46:30 -07:00