Commit Graph

115534 Commits

Author SHA1 Message Date
Samuel Iglesias Gonsálvez cdace5b0c6 i965/fs/nir: add nir_op_unpack_half_2x16_split_*_flush_to_zero
The denorm mode is set in the control register, no need to do
something else.

v2:
- Add an assert to make sure that we realize if this assumption is
  broken in the future (Caio).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez 3c474f8513 intel/nir: do not apply the fsin and fcos trig workarounds for consts
If we have fsin or fcos trigonometric operations with constant values
as inputs, we will multiply the result by 0.99997 in
brw_nir_apply_trig_workarounds, making the result wrong.

Adjusting the rules so they do not apply to const values we let a
later constant fold to deal with it.

v2:
- Do not early constant fold but only apply the trig workaround for
  non constants (Caio).
- Add fixes tag to commit log (Caio).

Fixes: bfd17c76c1 "i965: Port INTEL_PRECISE_TRIG=1 to NIR."
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez dba4d0a319 nir: fix fmin/fmax support for doubles
Until now, it was using the floating point version of fmin/fmax,
instead of the double version.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez 2abc6299bf nir: fix denorm flush-to-zero in sqrt's lowering at nir_lower_double_ops
v2:
- Replace hard coded value with DBL_MIN (Connor).

v3:
- Have into account the FLOAT_CONTROLS_DENORM_PRESERVE_FP64
  flag (Caio).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com> [v2]
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez 1e0e3ed15a nir: fix denorms in unpack_half_1x16()
According to VK_KHR_shader_float_controls:

"Denormalized values obtained via unpacking an integer into a vector
 of values with smaller bit width and interpreting those values as
 floating-point numbers must: be flushed to zero, unless the entry
 point is declared with the code:DenormPreserve execution mode."

v2:
- Add nir_op_unpack_half_2x16_flush_to_zero opcode (Connor).

v3:
- Adapt to use the new NIR lowering framework (Andres).

v4:
- Updated to renamed shader info member and enum values (Andres).

v5:
- Simplify flags logic operations (Caio).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com> [v2]
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez f097247dd8 nir/algebraic: disable inexact optimizations depending on float controls execution mode
If FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE or
FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO are enabled, do not apply the
inexact optimizations so the VK_KHR_shader_float_controls execution
mode is respected.

v2:
- Do not apply inexact optimizations if SHADER_DENORM_FLUSH_TO_ZERO is
  enabled (Andres).

v3:
- Updated to renamed shader info member (Andres).

v4:
- Directly access execution mode instead of dragging it by parameter (Caio).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com> [v1]
2019-09-17 23:39:18 +03:00
Andres Gomez 3f782cdd25 nir/algebraic: mark float optimizations returning one parameter as inexact
With the arrival of VK_KHR_shader_float_controls algebraic
optimizations for float types of the form (('fop', a, b), a) become
inexact depending on the execution mode.

For example, if we have activated SHADER_DENORM_FLUSH_TO_ZERO, in case
of a denorm value for the "a" parameter, we cannot return it still as
a denorm, it needs to be flushed to zero. Therefore, we mark now all
those operations as inexact.

Suggested-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez 5e22f3e29a nir/constant_expressions: mind rounding mode converting from float to float16 destinations
v2:
- Move the op-code specific knowledge to nir_opcodes.py even if it
  means a rount trip conversion (Connor).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez ef681cf971 nir/opcodes: make sure f2f16_rtz and f2f16_rtne behavior is not overriden by the float controls execution mode
Suggested-by: Connor Abbott <cwabbott0@gmail.com>
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez 7580707345 nir: mind rounding mode on fadd, fsub, fmul and fma opcodes
According to Vulkan spec, the new execution modes affect only
correctly rounded SPIR-V instructions, which includes fadd, fsub and
fmul.

v2:
- Fix fmul, fsub and fadd round-to-zero definitions, they should use
  auxiliary functions to calculate the proper value because Mesa uses
  round-to-nearest-even rounding mode by default (Connor).

v3:
- Do an actual fused multiply-add at ffma (Connor).

v4:
- Simplify fadd and fmul for bit sizes < 64 (Connor).
- Do not use double ffma for 32 bits float (Connor).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com> [v3]
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez 0ac07c7ca7 nir: add support for round to zero rounding mode to nir_op_f2f32
f2f16's rounding modes are already handled and f2f64 don't need it
as there is not a floating point type with higher bit size than 64 for
now.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez 5308333e78 util: add fp64 -> fp32 conversion support for RTNE and RTZ rounding modes
In order to be coherent with the pre-existent API for half floats,
this new API for double is the one meant to be used when doing double
to float conversions. It is no more than a wrapper for the softfloat.h
API but we meant to keep that one private.

v2:
- Fix bug in _mesa_double_to_float_rtz() in the inf/nan detection
  using the exponent value.

v3:
- Replace custom f64 -> f32 implementations with the softfloat
  one (Andres).

v4:
- Added API usage clarifying comments (Caio).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez 733ede8ff6 util: add float to float16 conversions with RTZ and RTNE
In order to be coherent with the pre-existent functions, this new API
is the one meant to be used when doing half float to float
conversions. It is no more than a wrapper for the softfloat.h API but
we meant to keep that one private.

v2:
- Replace custom f32 -> f16 RTZ implementation with the softfloat
  one (Andres).

v3:
- Added API usage clarifying comments (Caio).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez 153c714f2a util: add softfloat functions to operate with doubles and floats
Implemented fadd, fsub, fmul and ffma for doubles and ffma for floats,
rounding to zero, using a modified implementation from Berkely
Softfloat 3e Library.

Their implementation correctness has been checked with the Berkeley
TestFloat Release 3e tool for x86_64.

v2:
- Reuse util_last_bit64() in _mesa_count_leading_zeros64()
  implementation (Connor).

v3:
- Add a specific ffma for floats version (Connor).
- Implement the ffma for doubles version (Andres).
- Lots of fixes in fadd, fsub and fmul (Andres).
- Improved documentation (Andres).

v4:
- Added f64 -> f32 conversion function (Andres).
- Added f32 -> f16 RTZ conversion function (Andres).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Tested-by: Andres Gomez <agomez@igalia.com>
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez f7d73db353 nir: add support for flushing to zero denorm constants
v2:
- Refactor conditions and shared function (Connor).
- Move code to nir_eval_const_opcode() (Connor).
- Don't flush to zero on fquantize2f16
  From Vulkan spec, VK_KHR_shader_float_controls section:

  "3) Do denorm and rounding mode controls apply to OpSpecConstantOp?

  RESOLVED: Yes, except when the opcode is OpQuantizeToF16."

v3:
- Fix bit size (Connor).
- Fix execution mode on nir_loop_analize (Connor).

v4:
- Adapt after API changes to nir_eval_const_opcode (Andres).

v5:
- Simplify constant_denorm_flush_to_zero (Caio).

v6:
- Adapt after API changes and to use the new constant
  constructors (Andres).
- Replace MAYBE_UNUSED with UNUSED as the first is going
  away (Andres).

v7:
- Adapt to newly added calls (Andres).
- Simplified the auxiliary to flush denorms to zero (Caio).
- Updated to renamed supported capabilities member (Andres).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com> [v4]
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez 45668a8be1 nir: add auxiliary functions to detect if a mode is enabled
v2:
- Added more functions.

v3:
- Simplify most of the functions (Caio).

v4:
- Updated to renamed enum values (Andres).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com> [v2]
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> [v3]
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez 84781e1f1d spirv/nir: keep track of SPV_KHR_float_controls execution modes
v2:
- Add support for rounding modes for each floating point bit size.

v3:
- Commit e68871f6a4 ("spirv: Handle constants and types before
  execution modes") changed when the execution modes are handled,
  which affects the result of the floating point constants when the
  rounding mode is set in the execution mode. Moved the handling of
  the rounding modes before we handle the constants.

v4:
- Rename vtn_decoration "literals" to "operands" (Andres).
- Simplify execution mode parsing util function (Caio).
- Extend the comment about the timing of the handling of the rounding
  modes (Caio).

v5:
- Correct extension name (Caio).
- Rename shader info member (Andres).
- Rename float controls enum (Andres).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com> [v3]
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-09-17 23:39:18 +03:00
Samuel Iglesias Gonsálvez 420ad0a1a3 spirv: check support for SPV_KHR_float_controls capabilities
v2:
- Correct extension name (Caio).
- Rename supported capabilities member (Andres).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com> [v1]
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-09-17 23:39:18 +03:00
Adam Jackson 320c36ed3a gallium/xlib: Fix glXMakeCurrent(dpy, None, None, ctx)
This is entirely legal in GL 3.0+. I wonder how many more times I'll
need to fix this specific bug.
2019-09-17 20:16:00 +00:00
Adam Jackson a693f98e17 gallium/xlib: Remove MakeCurrent_PrevContext
As the comment notes, this is not thread-safe. You can just as easily
use GetCurrentContext instead, so, do that.
2019-09-17 20:16:00 +00:00
Adam Jackson db8be355d1 gallium/xlib: Remove drawable caching from the MakeCurrent path
AFAICT this only exists to avoid hitting XMesaFindBuffer, which is a
linear search. But you don't have that many GLX drawables, so whatever.
2019-09-17 20:16:00 +00:00
Marek Olšák 83f195414a radeonsi: add Navi12 PCI ID
trivial and urgent

Cc: 19.2 <mesa-stable@lists.freedesktop.org>
2019-09-17 16:00:33 -04:00
Adam Jackson 6ec1259423 ci: Run tests on i386 cross builds
Yes, some tests fail, but we can turn those into XFAILs at meson time.
Better to keep the things that work working than not cover them at all.
Unfortunately XPASS results will not cause the build to fail until we
update CI to meson 0.51 or newer.

Reviewed-by: Daniel Stone <daniels@collabora.com>
2019-09-17 14:53:57 -04:00
Jon Turney dd1dba80b9 Fix timespec_from_nsec test for 32-bit time_t
Since struct timespec's tv_sec member is of type time_t, adjust the
expected value to allow for the truncation which will occur with 32-bit
time_t.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2019-09-17 12:17:53 -04:00
Tapani Pälli 631255387f iris: close screen fd on iris_destroy_screen
Otherwise it never gets closed, this fixes errors seen with deqp-egl
where we end up opening 1024 files.

Fixes: 2dce0e94 ("iris: Initial commit of a new 'iris' driver for Intel Gen8+ GPUs.")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-09-17 14:46:45 +03:00
Juan A. Suarez Romero 34d51f931b docs: update calendar, add news item and link release notes for 19.1.7
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2019-09-17 12:55:41 +02:00
Juan A. Suarez Romero a216395831 docs: add sha256 checksums for 19.1.7
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit b9d7244035ce2da5bd93c984e30944b3730b219e)
2019-09-17 12:53:24 +02:00
Juan A. Suarez Romero d9d4c1be62 docs: add release notes for 19.1.7
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit f632aac9385cfe02f5bfe762d93e60b5b46f2c77)
2019-09-17 12:53:23 +02:00
Michel Dänzer aed3babef7 ac: Remove DEBUG workaround
As of version 7, LLVM uses LLVM_DEBUG instead of just DEBUG.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-09-17 10:24:29 +00:00
Michel Dänzer 2c278602d8 swr: Limit DEBUG workaround to LLVM < 7
As of version 7, LLVM uses LLVM_DEBUG instead of just DEBUG.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-09-17 10:24:29 +00:00
Michel Dänzer 8218f6e22d gallivm: Limit DEBUG workaround to LLVM < 7
As of version 7, LLVM uses LLVM_DEBUG instead of just DEBUG.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-09-17 10:24:29 +00:00
Erik Faye-Lund 26351f1ee3 st/mesa: remove always-true expression
In case the GLSL version is 130 or higher, we've already enabled
ARB_shader_bit_encoding a bit earlier in this same function. So this
condition will always be true.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-09-17 07:26:42 +00:00
Christian Gmeiner 1c34d19f90 etnaviv: a bit of micro-optimization
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
2019-09-17 05:50:37 +00:00
Icenowy Zheng d61b67b41d lima: reset scissor state if scissor test is disabled
The PLBU seems to preserve scissor state between draws, and since lima doesn't
emit PLBU_CMD_SCISSORS() if scissor test is disabled, it uses state from previous draw.

Fix it by emitting PLBU_CMD_SCISSORS() for full fb if scissor test is disabled.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
2019-09-17 04:13:24 +00:00
Jason Ekstrand 533987b5f4 vulkan: Update the XML and headers to 1.1.123
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-09-17 04:11:05 +00:00
Caio Marcelo de Oliveira Filho 9cf1bfcdd7 spirv: Handle ShaderLayer and ShaderViewportIndex capabilities
SPIR-V 1.5 incorported the SPV_EXT_shader_viewport_index_layer but
splitting into the two capabilities above.  Just handle them as we
support the extension already.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-09-16 19:18:01 -07:00
Caio Marcelo de Oliveira Filho f6392e38d8 spirv: Update JSON and headers to 1.5
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2019-09-16 19:17:26 -07:00
Eric Anholt eea6f21cbd freedreno: Fix invalid read when a block has no instructions.
We can't deref list_(first/last)_entries unless we know we have at least
one.  Instead, just use our IP we've been tracking as we go to set up the
start ip, and fill in the end IP as we walk instructions.

Fixes a complaint in valgrind on
dEQP-GLES3.functional.transform_feedback.* which sometimes has an
empty main (non-END) block when the VS inputs are just directly mapped
to outputs without any ALU ops.

Reviewed-by: Rob Clark <robdclark@chromium.org>
2019-09-16 22:02:43 +00:00
Kenneth Graunke d9d6305b80 st/mesa: Increase GL_POINT_SIZE_RANGE minimum to 1.0
Table 23.54 of the OpenGL 4.5 spec lists the minimum values for
GL_POINT_SIZE_RANGE as [1, 1].  So zero is not allowed (even though
arguably this could be useful for MSAA rendering, where a sub-1px
point might cover only some samples...)

This fixes the WebGL 2.0 conformance suite's state.gl-get-calls test
on Chromium on Linux, which uses desktop OpenGL.  The test checks that
the minimum value of GL_ALIASED_POINT_SIZE_RANGE is 1.  Unfortunately,
that query doesn't exist in desktop GL, so it checks POINT_SIZE_RANGE,
which is the anti-aliased value.  There's not really anything better
for Chromium to do here, unfortunately.  When running Chromium with
--api=es3, it maps it to the correct query and the test already works.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-09-16 13:40:41 -07:00
Kenneth Graunke fbad42bbb9 st/mesa: Prefer 5551 formats for GL_UNSIGNED_SHORT_5_5_5_1.
Previously, internalformat GL_RGBA and type GL_UNSIGNED_SHORT_5_5_5_1
was promoted to RGBA8888 as the table entry with the 5551 formats
is listed below the 8888 entry, and it also doesn't have GL_RGBA as
a possible internalformat.

Using actual 5551 fixes the following dEQP-EGL test:
- dEQP-EGL.functional.image.modify.tex_rgb5_a1_tex_subimage_rgba8

Reviewed-by: Eric Anholt <eric@anholt.net>
2019-09-16 13:17:23 -07:00
Rhys Perry ffabcbba60 radv: always emit a position export in gs copy shaders
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: f8d0337299 ('radv: add multiple streams support for the GS copy shader')
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-09-16 19:42:30 +00:00
Rhys Perry 0f29c9df31 radv: keep GS threads with excessive emissions which could write to memory
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-09-16 19:42:30 +00:00
Lionel Landwerlin dcf13fbac9 drirc: include unreal engine version 0 to 23
This was meant to include up to version 23.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0616b7ac90 ("vulkan: add vk_x11_strict_image_count option")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111522
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-09-16 21:47:21 +03:00
Lionel Landwerlin 10206ba17b util/xmlconfig: fix regexp compile failure check
This is embarrasing...

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 04dc6074cf ("driconfig: add a new engine name/version parameter")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-09-16 21:47:21 +03:00
Erik Faye-Lund 9c57b54994 gallium/gdi: use GALLIUM_FOO rather than HAVE_FOO
This matches what other targets do, and makes it easier to port to
meson.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-09-16 17:54:00 +00:00
Dylan Baker 9e1f49aae1 scons: Make scons and meson agree about path to glapi generated headers
Currently scons puts them in src/mapi/glapi, meosn puts them in
src/mapi/glapi/gen. This results in some things being compilable only by
one or the other, put them in the same places so that everyone is happy.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-09-16 17:54:00 +00:00
Vasily Khoruzhick ca5782f0ee lima: add standalone disassembler with primitive MBS parser
It's useful for analyzing shader binaries produced by ARM mali offline
compiler which outputs files in MBS format. MBS is mali binary shader,
currently parser just extracts shader binary and ignores everything else.

Reviewed-and-tested-by: Connor Abbott<cwabbott0@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2019-09-16 09:29:55 -07:00
Heinrich Fink df8602f4b5 mesa/gl: Sync with Khronos registry
Update GL headers and xml API from upstream Khronos registry (commit
3d0c3eb). Keep `BUILDING_MESA` quirk in glext.h.

mesa/extensions: Expose EXT_EGL_sync instead of MESA_EGL_sync to reflect
Khronos request of changing this extension's scope from MESA to EXT.
EGL_EGL_sync is also the name of the extension that has been merged into
the upstream Khronos GL registry.

Remove MESA_EGL_sync spec txt from Mesa tree as it is now published as
EXT by Khronos.

v1: Remove MESA_EGL_sync spec and squash commits (Eric E)

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
2019-09-16 16:50:43 +01:00
Sergii Romantsov 2bfcf04345 nir/large_constants: pass after lowering copy_deref
v2: by J.Ekstrand suggestion moved lowering of large
    constants after lowering of copy_deref is done.

CC: Jason Ekstrand <jason@jlekstrand.net>
CC: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111450
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
2019-09-16 11:23:48 +00:00
Michel Dänzer e536446b60 gitlab-ci: Move up meson-arm64 job definition
This might allow the arm64 tests to start running earlier.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-09-16 12:51:35 +02:00