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nir/opcodes: make sure f2f16_rtz and f2f16_rtne behavior is not overriden by the float controls execution mode 

Suggested-by: Connor Abbott <cwabbott0@gmail.com>
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
This commit is contained in:
Samuel Iglesias Gonsálvez 2019-04-21 12:35:17 +02:00 committed by Andres Gomez
parent 7580707345
commit ef681cf971
1 changed files with 20 additions and 1 deletions
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21
src/compiler/nir/nir_opcodes.py
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@ -221,9 +221,28 @@ for src_t in [tint, tuint, tfloat, tbool]:
if bit_size == 16 and dst_t == tfloat and src_t == tfloat:
rnd_modes = ['_rtne', '_rtz', '']
for rnd_mode in rnd_modes:
if rnd_mode == '_rtne':
conv_expr = """
if (bit_size > 16) {
dst = _mesa_half_to_float(_mesa_float_to_float16_rtne(src0));
} else {
dst = src0;
}
"""
elif rnd_mode == '_rtz':
conv_expr = """
if (bit_size > 16) {
dst = _mesa_half_to_float(_mesa_float_to_float16_rtz(src0));
} else {
dst = src0;
}
"""
else:
conv_expr = "src0"
unop_numeric_convert("{0}2{1}{2}{3}".format(src_t[0], dst_t[0],
bit_size, rnd_mode),
dst_t + str(bit_size), src_t, "src0")
dst_t + str(bit_size), src_t, conv_expr)
elif bit_size == 32 and dst_t == tfloat and src_t == tfloat:
conv_expr = """
if (bit_size > 32 && nir_is_rounding_mode_rtz(execution_mode, 32)) {