Commit Graph

136705 Commits

Author SHA1 Message Date
Alejandro Piñeiro ec4c79c2b0 v3dv: avoid some maybe-uninitialized warnings
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9640>
2021-03-17 10:05:07 +00:00
Alejandro Piñeiro c373b24369 v3dv/descriptor_set: don't free individual set if not allowed
If we have a host_memory_base pointer it means that we are handling
the pool memory as a whole, so each set is a sub-slice of the memory
pool. In this case we can't just free the individual set. In other
words, VK_DESCRIPTOR_POOL_CREATE_FREE_DESCRIPTOR_SET_BIT is not set.

Note tha at that point we were able to sub-allocate an set, and we are
failing to sub-allocate the pool bo for the descripto bo. So
technically we could try to return that set to the pool (so undo the
change on host_memory_ptr before), that I assume was my intention when
(wrongly) calling vk_free there. But in practice, at that point we are
already on a out of descriptor pool situation, so in the end it
doesn't even matter.

This fixes a double free crash with the UE4 VehicleGame demo.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9640>
2021-03-17 10:05:07 +00:00
Iago Toral Quiroga aefac60741 broadcom/compiler: use nir_lower_wrmasks to simplify TMU general stores
This pass splits writemaks with non-consecutive bits into multiple
store operations ensuring that each store only has consecutive
writemask bits set.

We can use this to simplify writemask handling in our backend removing
a loop solely intended to handle this case.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9619>
2021-03-17 09:35:19 +00:00
Iago Toral Quiroga 51a263530f broadcom/compiler: use nir_opt_load_store_vectorize
This will make it so we pack consecutive scalar operations into a vector
operation, reducing the amount of load/store operations in the NIR program.
Our backend can handle vector load/stores, and doing so may be more efficient
since we don't need to setup individual load/stores all the time.

A pathological case is:
dEQP-VK.spirv_assembly.instruction.compute.opcopymemory.array
which goes from 862 instructions to only 573 by converting
all scalar SSBO load/store operations to vec4 operations.

total instructions in shared programs: 13752607 -> 13733627 (-0.14%)
instructions in affected programs: 367117 -> 348137 (-5.17%)
helped: 1168
HURT: 371
Instructions are helped.

total threads in shared programs: 412230 -> 412272 (0.01%)
threads in affected programs: 54 -> 96 (77.78%)
helped: 23
HURT: 2
Threads are helped.

total uniforms in shared programs: 3790248 -> 3784601 (-0.15%)
uniforms in affected programs: 57417 -> 51770 (-9.84%)
helped: 1420
HURT: 19
Uniforms are helped.

total max-temps in shared programs: 2322170 -> 2322714 (0.02%)
max-temps in affected programs: 14353 -> 14897 (3.79%)
helped: 185
HURT: 306
Max-temps are HURT.

total spills in shared programs: 5940 -> 6010 (1.18%)
spills in affected programs: 65 -> 135 (107.69%)
helped: 0
HURT: 11

total fills in shared programs: 13372 -> 13494 (0.91%)
fills in affected programs: 75 -> 197 (162.67%)
helped: 0
HURT: 11

total sfu-stalls in shared programs: 31505 -> 31521 (0.05%)
sfu-stalls in affected programs: 751 -> 767 (2.13%)
helped: 210
HURT: 246
Inconclusive result (value mean confidence interval includes 0).

total inst-and-stalls in shared programs: 13784112 -> 13765148 (-0.14%)
inst-and-stalls in affected programs: 360283 -> 341319 (-5.26%)
helped: 1125
HURT: 366
Inst-and-stalls are helped.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9619>
2021-03-17 09:35:19 +00:00
Iago Toral Quiroga 3db322f305 broadcom/compiler: fix end of tmu sequence detection
TMUWT always terminates a TMU sequence.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9619>
2021-03-17 09:35:19 +00:00
Samuel Pitoiset 7bdd569d7e radv: extend the dirty bits to 64-bit
For future work.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9603>
2021-03-17 09:21:38 +00:00
Samuel Iglesias Gonsálvez 0acd7df67b turnip: set depth plane control zmode to A6XX_LATE_Z when sample mask is written
Otherwise, gl_SampleMask[] writes are ignored and the stencil test works like
if all samples were enabled.

Fixes: dEQP-VK.renderpass.suballocation.multisample.*s8*

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9478>
2021-03-17 09:05:33 +00:00
Samuel Pitoiset 9d42e71505 radv: add notccompatcmask debug option
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9415>
2021-03-17 08:55:16 +00:00
Samuel Pitoiset f810d8cd50 radv: enable TC-compat CMASK on GFX10+
Untested on older chips. Should help MSAA games by 1-2%.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9415>
2021-03-17 08:55:16 +00:00
Samuel Pitoiset 72b58c4a5e radv: initialize TC-compat CMASK images with the DCC clear code
0xff is for fast-clears without MSAA.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9415>
2021-03-17 08:55:16 +00:00
Samuel Pitoiset a3835964ce radv: only configure the CMASK tiling for TC-compat on GFX8
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9415>
2021-03-17 08:55:15 +00:00
Samuel Pitoiset b9222cc906 radv: make sure FMASK is enabled for TC-compat CMASK
Otherwise it makes no sense at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9415>
2021-03-17 08:55:15 +00:00
Samuel Pitoiset 0c281283d8 radv: remove redundant check when enabling TC-compat CMASK
We already check that the image has CMASK.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9415>
2021-03-17 08:55:15 +00:00
Samuel Pitoiset d173ed2e9c radv: do not enable TC-compat CMASK if the image isn't readable by a shader
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9415>
2021-03-17 08:55:15 +00:00
Samuel Pitoiset fb648634b0 radv: use common entrypoints for VK_KHR_copy_commands2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9600>
2021-03-17 07:43:36 +00:00
Iago Toral Quiroga f29de817eb compiler/glsl: call util_cpu_detect from glsl_type_singleton_init_or_ref
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Closes: #4393
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9457>
2021-03-17 08:15:36 +01:00
Iago Toral Quiroga 1e4abf1fe3 vulkan/util: call glsl_type_singleton_init_or_ref from vk_instance_init
v2: link libvulkan_util with libglsl so it can find the glsl singleton symbols.
v3: link with libcompiler instead of libglsl (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> for the v3dv bits.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> for the turnip bits.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> for the radv bits.
Acked-by: Dave Airlie <airlied@redhat.com> for the lvp bits.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9457>
2021-03-17 08:15:36 +01:00
Lukas Feller 164a51c80f v3dv: fix stride in buffer copy
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9402>
2021-03-17 06:42:34 +00:00
Lukas Feller 99a11f25b2 v3dv: fix assertion in job_compute_frame_tiling
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9402>
2021-03-17 06:42:34 +00:00
Timur Kristóf d70e017c17 anv: Use ASSERTED for results that are only used in asserts.
This gets rid of unused variable warnings for these results.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9634>
2021-03-17 03:47:23 +00:00
Timur Kristóf d7a94cae18 anv: Use unreachable() in anv_genX.
This gets rid of unused variable warnings on genX_thing, because
now the compiler will think that the unknown hardware generation
case is unreachable.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9634>
2021-03-17 03:47:23 +00:00
Timur Kristóf 17bc587f88 intel/compiler: Make room for maximum dest size in nir_emit_texture.
The maximum dest_size is 5, not 4.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9634>
2021-03-17 03:47:23 +00:00
Timur Kristóf eb378e4cd0 intel/compiler: Use assume() instead of assert() for array bounds.
This should make both GCC and clang happy and make them believe that
the array bounds are not exceeded.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9634>
2021-03-17 03:47:23 +00:00
Daniel Stone 84f91dfea5 CI: Change LAVA job visibility
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9635>
2021-03-17 01:50:37 +00:00
Mike Blumenkrantz 62d6ec083b zink: enable PIPE_CAP_INVALIDATE_BUFFER
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9546>
2021-03-17 01:40:55 +00:00
Mike Blumenkrantz d5367cee09 zink: invalidate resources on map when discarding range
we can dump the whole vulkan object here for this case, which ends up being
much neater

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9546>
2021-03-17 01:40:55 +00:00
Mike Blumenkrantz cfa361e6cd zink: handle streamout buffer rebinds
this really just means to nuke the counter buffer, and this can be done
by using a special bind_history bit that can be unset when the buffer has
been rebound

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9546>
2021-03-17 01:40:55 +00:00
Mike Blumenkrantz a00f10207c zink: set valid region for streamout buffers on bind
this catches rebinds and is more accurate about the state of the region

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9546>
2021-03-17 01:40:55 +00:00
Mike Blumenkrantz 8c1422dca5 zink: add a pipe_context::invalidate_resource hook
this creates new backing objects for the invalidated resource and, if
needed, rebinds it to any descriptor sets it might be used in by invalidating
the descriptor state and creating new view objects

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9546>
2021-03-17 01:40:55 +00:00
Mike Blumenkrantz d84c7c2a85 zink: remove direct samplerview batch-tracking
this moves tracking onto the surface/bufferview, which is more accurate
and allows the removal of a temporary hack in resource invalidation

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9546>
2021-03-17 01:40:55 +00:00
Mike Blumenkrantz 2729513d29 zink: hook up resource bind history
seems like this should be a gallium thing with how many drivers copy/paste it

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9546>
2021-03-17 01:40:55 +00:00
Mike Blumenkrantz 806c612131 ci/panfrost: disable the rest of these jobs temporarily
runners having a hard time right now

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9639>
2021-03-17 01:34:49 +00:00
Mike Blumenkrantz 08d8aee222 zink: ci updates
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9624>
2021-03-17 01:27:00 +00:00
Mike Blumenkrantz 2f3b09e422 zink: set ntv variable descriptor sets during compile phase
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9624>
2021-03-17 01:27:00 +00:00
Mike Blumenkrantz c1cdf30a11 zink: apply Delete All The Code methodology to the ubo/ssbo variables
gallium rewrites all the ubo/ssbo instructions to use the buffer index as
the instruction src. the nir variables which are passed to zink after that
point are completely worthless, and it's impossible to accurately determine
which one corresponds to which buffer

thus, deleting all the variables and creating new ones based on the buffers
that are used is the best option, and it also enables simplifying a ton
of code as well as doing even better improvements in the future

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9624>
2021-03-17 01:27:00 +00:00
Mike Blumenkrantz 769c6dce23 zink: move zink_binding() to compiler.c
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9624>
2021-03-17 01:27:00 +00:00
Mike Blumenkrantz dbbcf4e780 zink: directly set nir variable bindings for reuse during ntv
this lets us prepopulate the binding values without "fetching" them
twice

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9624>
2021-03-17 01:27:00 +00:00
Mike Blumenkrantz 84293f5395 zink: flatten binding numbers a bit
now that descriptor types are split, we can just use the type-max values
per stage as the increment instead of all type max values

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9624>
2021-03-17 01:27:00 +00:00
Mike Blumenkrantz eeb23b15eb zink: break out sized uint array construction into util function
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9624>
2021-03-17 01:27:00 +00:00
Mike Blumenkrantz 1950f8ec0c zink: add ntv util function for checking if a glsl type is an atomic counter
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9624>
2021-03-17 01:27:00 +00:00
Mike Blumenkrantz 90a1aaf956 zink: add debug info about missing atomic ops
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9624>
2021-03-17 01:27:00 +00:00
Mike Blumenkrantz 5783298027 zink: add unsized array type to get_glsl_type_element() handling
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9624>
2021-03-17 01:27:00 +00:00
Mike Blumenkrantz 6399906843 zink: also break out whole ntv bo struct pointer construction
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9624>
2021-03-17 01:27:00 +00:00
Mike Blumenkrantz 99a87a283a zink: break out bo array type construction into ntv util function
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9624>
2021-03-17 01:27:00 +00:00
Mike Blumenkrantz 10bfe8759b zink: use intermediate var for glsl non-array type during shader create
minor readability change

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9624>
2021-03-17 01:27:00 +00:00
Mike Blumenkrantz 2b4609b66c zink: run nir_convert_from_ssa last during compile
running this too early breaks other passes

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9624>
2021-03-17 01:27:00 +00:00
Hyunjun Ko d9fcf5de55 turnip: Enable nonuniform descriptor indexing
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9125>
2021-03-17 01:09:30 +00:00
Hyunjun Ko e9fd2a2a58 ir3: Add nonuniform encodings to ir3 encoder and parser
By keeping track of nonuniform access from nir and storing it to ir3.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9125>
2021-03-17 01:09:30 +00:00
Hyunjun Ko 433cdd1cff ir3: fix has_src() to return correctly in ir3_nir_lower_tex_prefetch
This seems to be originally introduced from 2a0d45ae6c, and 562aaea07c
misused the method.

Fixes: 2a0d45ae6c "freedreno/ir3: Add a NIR pass to select tex instructions eligible for pre-fetch"
Fixes: 562aaea07c "freedreno/ir3: respect tex prefetch limits"

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9125>
2021-03-17 01:09:30 +00:00
Hyunjun Ko d82b58c03e nir: Set access at lower_ubo_vec4
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>

Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9125>
2021-03-17 01:09:30 +00:00