This change is required to avoid a filename conflict due to
next patch in this series to rename gen_device_info.c
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10241>
This fixes the
dEQP-GLES3.functional.shaders.invariance.{low,medium,high}p.loop_4 tests when
run in a VM with virgl on a host with iris. virgl mangles the GLSL shaders and
emits shader code for the host driver that contains vec4 arrays. As such, the
test did not fail when running directly on the host.
The test also did not fail if the host was using i965. Disabling
PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY in iris was sufficient to work around it,
so I believe that i965 didn't show the problem because after arrays were split
by optimize_split_arrays(), even though the invariant/precise qualifiers were
lost, do_common_optimization() would be called again and thus
propagate_invariance() would propagate the qualifiers to the new variables
produced by optimize_split_arrays().
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10292>
Doing so allow you to easily tell what the pass did using the existing
infrastructure in the OPT macro.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10292>
This reverts commit cd12fcff96.
The terrain looks fine now that TRUNC_COORD=0 for textureGather().
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10036>
We can just check whether tex_instr is NULL instead.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10036>
The claim that we require vulkan memory model's MakeAvailable and
MakeVisible semantics for image writes isn't accurate. This would be
required *if* we were already using the Vulkan memory model.
But we're using the GLSL450 memory model in those cases, which has no
such requirements.
This means that any problems on RADV due to the lack of these semantics
are RADV bugs, and should be fixed in RADV instead.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10345>
this is just for unit tests where the scanout object is redundant and
the only time a flush occurs is from stalling on readback
Fixes: 104603fa76 ("zink: create separate linear tiling image for scanout")
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10239>
This is enabled by enabling gallium's memobj capability.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4337>
v2:
* Fixed indentation in iris_resource_from_memobj
v3:
* Removed the call to iris_resource_configure_aux, as we don't
have any auxiliary buffer support.
v4:
* Added a comment about the assertion that there's no aux buffer
in case we add them later.
v5:
* Changed the logic of iris_resource_from_memobj. When the user doesn't
explicitly set the tiling to linear, we use a similar logic with the
anv driver's logic to calculate it instead of querying the kernel.
This is because the Vulkan driver doesn't perform ioctls to update the
kernel when it suballocates buffers.
v6:
* Removed the line that sets the modifier info in the resource. We
shouldn't need it.
v7, v8:
* Removed left over code related to modifiers.
v9:
* Replaced FORCE_LINEAR_TILING flag with PIPE_BIND_LINEAR where
necessary.
v10: rebase, use iris_resource_configure_main (Tapani)
v11:
* isl surfaces should be created only for textures and not for
buffers (fixes: pixel buffer tests assertion failure on BDW).
v12:
* fix in return type is required after rebasing to master.
Signed-off--by: Juan A. Suarez Romero <jasuarez@igalia.com>
Signed-off-by: Eleni Maria Stea <estea@igalia.com>
Co-authored-by: Eleni Maria Stea <estea@igalia.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com> (v9)
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (v12)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4337>
v2: use iris_bo_import_dmabuf (Tapani)
v3: included "util/u_memory.h" to fixed compilation errors caused by
using the CALLOC_STRUCT macro
v4: implemented iris_memobj_destroy (pscreen->memobj_destroy) callback
v5: removed iris_bo_from_handle and changed the approach for setting the
tiling: Instead of querying the kernel and call
iris_bo_import_dmabuf to create the bo, we call
iris_bo_import_dmabuf_no_mods that imports the bo but without
setting the tiling mode. We are going to update it when we create
the resource. Also: implemented the iris_bo_import_dmabuf_no_mods.
v6: rebase to iris_bo_import_dmabuf changes and take a reference
to memobj->bo (Tapani Pälli)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Signed-off-by: Eleni Maria Stea <estea@igalia.com>
Co-authored-by: Eleni Maria Stea <estea@igalia.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4337>
Export/import with iris does not work properly so disable it for now.
v2: Added a vk_errorfi and assigned to a result (Lionel Landwerlin)
v3: Changed the type of error to be VK_ERROR_FORMAT_NOT_SUPPORTED
(Lionel Landwerlin)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Eleni Maria Stea <elene.mst@gmail.com> (v2, v3)
Reviewed-by: Eleni Maria Stea <elene.mst@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4337>
Turns out both kernel v5.10 and v5.11 have the same amdgpu driver
version and only one has modifiers ... In addition the version check
is kinda annoying for backports.
So lets use the cap. Since the cap is technically about ADDFB2 I
tested that this works on rendernodes (and reading the code there
is no distinction from what kind of node this is called).
Fixes: 9a937330ef ("radeonsi: Only set modifier creation function for GFX9+ & with kernel support.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10337>
If we don't do that the compute batch is left with an empty thread
storage descriptor, and panfrost_batch_submit() tries to emit an FB
descriptors using invalid FB information.
Reported-by: Italo Nicola <italonicola@collabora.com>
Fixes: ff3eada7eb ("panfrost: Use the generic preload and FB helpers in the gallium driver")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Tested-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10312>
There are some LRZ compare op switches that are not supported by
the HW, like GREATER* <-> LESS* ones.
This patch tracks the direction of the switch and disables LRZ
if needed.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7186>
If depth bias is enabled but zero values used, they were never
emitted to the command buffer because they are equal to the default
values.
Previously, they were always emitted when the bound DS attachment
changed.
This should fix some sort of Z fighting with Dota2 on all GPUs.
This also fixes a different issue (ie. some occlusion queries failures)
on GFX6 because CLEAR_STATE is not used on that chip.
Fixes: 8a47422d97 ("radv: do not scale the depth bias for D16_UNORM depth surfaces")
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10310>
Anuj Phogat
Mike Blumenkrantz
Matt Turner
Rhys Perry
Erik Faye-Lund
Juan A. Suarez Romero
Tapani Pälli
Boris Brezillon
Samuel Pitoiset
Bas Nieuwenhuizen
Samuel Iglesias Gonsálvez