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intel: Rename GEN_DEVICE prefix in macros to INTEL_DEVICE 

export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "GEN_DEVICE" -rIl $SEARCH_PATH | xargs sed -ie "s/GEN_DEVICE/INTEL_DEVICE/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10241>
This commit is contained in:
Anuj Phogat 2021-04-05 14:29:06 -07:00 committed by Marge Bot
parent 4c535cbf99
commit 4507e6674e
2 changed files with 12 additions and 12 deletions
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2
src/intel/dev/intel_device_info.c
View File

@ -1113,7 +1113,7 @@ update_from_topology(struct intel_device_info *devinfo,
* 4 subslices.
*/
const unsigned ppipe_bits = devinfo->ver >= 12 ? 2 : 4;
for (unsigned p = 0; p < GEN_DEVICE_MAX_PIXEL_PIPES; p++) {
for (unsigned p = 0; p < INTEL_DEVICE_MAX_PIXEL_PIPES; p++) {
const unsigned ppipe_mask = BITFIELD_RANGE(p * ppipe_bits, ppipe_bits);
devinfo->ppipe_subslices[p] =
__builtin_popcount(devinfo->subslice_masks[0] & ppipe_mask);

22
src/intel/dev/intel_device_info.h
View File

@ -36,10 +36,10 @@ extern "C" {
struct drm_i915_query_topology_info;
#define GEN_DEVICE_MAX_SLICES (6) /* Maximum on gfx10 */
#define GEN_DEVICE_MAX_SUBSLICES (8) /* Maximum on gfx11 */
#define GEN_DEVICE_MAX_EUS_PER_SUBSLICE (16) /* Maximum on gfx12 */
#define GEN_DEVICE_MAX_PIXEL_PIPES (3) /* Maximum on gfx12 */
#define INTEL_DEVICE_MAX_SLICES (6) /* Maximum on gfx10 */
#define INTEL_DEVICE_MAX_SUBSLICES (8) /* Maximum on gfx11 */
#define INTEL_DEVICE_MAX_EUS_PER_SUBSLICE (16) /* Maximum on gfx12 */
#define INTEL_DEVICE_MAX_PIXEL_PIPES (3) /* Maximum on gfx12 */
/**
* Intel hardware information and quirks
@ -132,12 +132,12 @@ struct intel_device_info
/**
* Number of subslices for each slice (used to be uniform until CNL).
*/
unsigned num_subslices[GEN_DEVICE_MAX_SUBSLICES];
unsigned num_subslices[INTEL_DEVICE_MAX_SUBSLICES];
/**
* Number of subslices on each pixel pipe (ICL).
*/
unsigned ppipe_subslices[GEN_DEVICE_MAX_PIXEL_PIPES];
unsigned ppipe_subslices[INTEL_DEVICE_MAX_PIXEL_PIPES];
/**
* Upper bound of number of EU per subslice (some SKUs might have just 1 EU
@ -160,16 +160,16 @@ struct intel_device_info
* An array of bit mask of the subslices available, use subslice_slice_stride
* to access this array.
*/
uint8_t subslice_masks[GEN_DEVICE_MAX_SLICES *
DIV_ROUND_UP(GEN_DEVICE_MAX_SUBSLICES, 8)];
uint8_t subslice_masks[INTEL_DEVICE_MAX_SLICES *
DIV_ROUND_UP(INTEL_DEVICE_MAX_SUBSLICES, 8)];
/**
* An array of bit mask of EUs available, use eu_slice_stride &
* eu_subslice_stride to access this array.
*/
uint8_t eu_masks[GEN_DEVICE_MAX_SLICES *
GEN_DEVICE_MAX_SUBSLICES *
DIV_ROUND_UP(GEN_DEVICE_MAX_EUS_PER_SUBSLICE, 8)];
uint8_t eu_masks[INTEL_DEVICE_MAX_SLICES *
INTEL_DEVICE_MAX_SUBSLICES *
DIV_ROUND_UP(INTEL_DEVICE_MAX_EUS_PER_SUBSLICE, 8)];
/**
* Stride to access subslice_masks[].