GFX6 has no CLEAR_STATE.
One step towards Vulkan conformance on these old chips.
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10347>
resetting a query pool+qbo dumpsters the existing qbo results,
so these need to be copied to the new qbo if they exist, and then the query
id needs to be updated to match the expected result offset so everything
keeps working as expected
Fixes: 00fc85a011 ("zink: reset queries when suspending if >50% of total pool is used")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10268>
if the query has never been stopped, then doing an implicit reset here does
nothing except give the gpu more work
Fixes: 00fc85a011 ("zink: reset queries when suspending if >50% of total pool is used")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10268>
I think at one point before staging resource flagging was less reliable
this method made sense, but now it's worse
Fixes: 6ff6d01c37 ("zink: don't use cached mem for staging resources")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10363>
this is broken after the backing object split because resources themselves
no longer have guaranteed lifetimes
Fixes: 616720d6ae ("zink: track resource_object usage instead of resource usage")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10270>
always casting this to a u64 is invalid if the value is just a bool,
and it even generates ASAN/valgrind errors about uninitialized reads
Fixes: 41450b03a8 ("softpipe: implement conditional rendering")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10398>
Otherwise the dual-source input load is moved further down in the
shader, so the registers can get clobbered before then.
Fixes text not being visible in Alacritty.
Fixes: 52863f2e60 ("pan/bi: Enable all nir_opt_move/sink optimizations")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10089>
Needed for dEQP-GLES31.functional.draw_indirect, otherwise we end up
with GPU faults.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10375>
The indirect draw implementation uses a HEAP pool to allocate varyings.
Don't advertise INDIRECT_DRAW if the kernel doesn't support allocating
HEAP BOs.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10375>
Chrome browser has been calling this attribute to give driver the surface
usage hint. The hints include:
VA_SURFACE_ATTRIB_USAGE_HINT_GENERIC
VA_SURFACE_ATTRIB_USAGE_HINT_DECODER
VA_SURFACE_ATTRIB_USAGE_HINT_ENCODER
VA_SURFACE_ATTRIB_USAGE_HINT_VPP_READ
VA_SURFACE_ATTRIB_USAGE_HINT_VPP_WRITE
VA_SURFACE_ATTRIB_USAGE_HINT_DISPLAY
VA_SURFACE_ATTRIB_USAGE_HINT_EXPORT
The surface allocation are generic for us, and we don't need to specify
it. To add the attribute here is because we don't want application which
is calling this attribute to end up returning error and getting no surface
allocated.
Fixes: ebab310987 ("frontends/va: improve surface attribs processing")
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10353>
The bug #4657 mixed up which commit was actually responsible for
the regression, so re-apply this patch.
The indirect draw call already encodes the index bias so that no
additional encoding in the hardware is needed in this case.
This fixes a regression with a number of tests from
dEQP-GLES31.functional.draw_indirect.random.*
Fixes: c6c532faa8
"gallium/u_vbuf: use updated pipe_draw_start_count while using draw_vbo"
Closes#4671
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10388>
This code would work for GLXWindows but not for bare Windows, which I
guess you could argue is a server bug but which we can fix on the client
side with a little effort. We change __glXGetDrawableAttribute to
additionally return false if we failed to find the requested attribute
(which is safe, all the other callers discard the return value). Then
when inferring the fbconfig, if the attribute wasn't found, we ask for
the window attributes to find the visual ID and use that to find the
fbconfig.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10381>
Normally, we never see NULL in a source. However, starting with
eab1c55590, we can with a SHADER_OPCODE_SEND if it only has the first
payload. We were inserting barriers which adds unnecessary scheduling
dependencies and takes a lot of compile time because inserting a single
barrier is an O(n) operation.
All the extra O(n) can have a surprisingly large effect. This cuts the
runtime of dEQP-VK.binding_model.buffer_device_address.set3.depth3.
basessbo.convertcheckuv2.store.single.std140.frag by a factor of 20x for
a debug build.
Shader-db results on ICL:
total instructions in shared programs: 19918983 -> 19921610 (0.01%)
instructions in affected programs: 884074 -> 886701 (0.30%)
helped: 1688
HURT: 817
helped stats (abs) min: 1 max: 163 x̄: 4.23 x̃: 1
helped stats (rel) min: 0.02% max: 12.50% x̄: 1.08% x̃: 0.61%
HURT stats (abs) min: 1 max: 2674 x̄: 11.95 x̃: 2
HURT stats (rel) min: 0.11% max: 70.22% x̄: 1.71% x̃: 1.03%
95% mean confidence interval for instructions value: -1.97 4.06
95% mean confidence interval for instructions %-change: -0.28% -0.06%
Inconclusive result (value mean confidence interval includes 0).
total cycles in shared programs: 976503324 -> 975884809 (-0.06%)
cycles in affected programs: 82581703 -> 81963188 (-0.75%)
helped: 4144
HURT: 5010
helped stats (abs) min: 1 max: 79294 x̄: 311.31 x̃: 8
helped stats (rel) min: <.01% max: 53.69% x̄: 2.00% x̃: 0.51%
HURT stats (abs) min: 1 max: 92266 x̄: 134.04 x̃: 8
HURT stats (rel) min: <.01% max: 218.09% x̄: 3.25% x̃: 0.53%
95% mean confidence interval for cycles value: -119.85 -15.29
95% mean confidence interval for cycles %-change: 0.68% 1.07%
Inconclusive result (value mean confidence interval and %-change mean confidence interval disagree).
total spills in shared programs: 10659 -> 12014 (12.71%)
spills in affected programs: 441 -> 1796 (307.26%)
helped: 7
HURT: 12
total fills in shared programs: 11551 -> 14429 (24.92%)
fills in affected programs: 993 -> 3871 (289.83%)
helped: 8
HURT: 11
total sends in shared programs: 1025832 -> 1025353 (-0.05%)
sends in affected programs: 2241 -> 1762 (-21.37%)
helped: 105
HURT: 1
helped stats (abs) min: 1 max: 87 x̄: 4.57 x̃: 2
helped stats (rel) min: 5.56% max: 54.72% x̄: 11.37% x̃: 10.00%
HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
95% mean confidence interval for sends value: -7.39 -1.65
95% mean confidence interval for sends %-change: -12.95% -7.70%
Sends are helped.
LOST: 93
GAINED: 109
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4648
Fixes: eab1c55590 "intel/fs: Support SENDS in SHADER_OPCODE_SEND"
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10412>
We need to bounds-check *before* we index the array, otherwise we peek
beyond the end of it.
Caught by Valgrind.
Fixes: dd29a7e5b0 ("zink: move descriptor barrier handling to main update function")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10367>
Indirect dispatch is implemented using an extra compute job patching
the compute job header to apply the final num_workgroup values. Add
helpers to simplify emission of the such jobs.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10332>
Make sure size_{x,y,z} and num_{x,y,s} are positive, otherwise we end
up with an integer underflow.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10332>
The offset field is an 18-bit signed integer, if the offset is bigger
than that we can get rid of the intermediate iadd.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10332>
Pseudo instruction might expend to 2 instructions (one in the FMA slot
and one in the ADD slot), we need to expand those even if nosched is
set.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10332>
This accidentally collided with PIPE_BIND_SCANOUT.
Fixes: 59ad872458 gallium: add PIPE_BIND_SAMPLER_REDUCTION_MINMAX
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10397>
All the rest of the filters here are written as "if asking for this
feature and it's not there, return false", with an implicit fallthrough
to the next test. There's no good reason to treat minmax differently.
Fixes: 22e1ed5722 zink: support format queries for VK_EXT_sampler_filter_minmax
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10397>
Just pass down the modifier list to vl_video_buffer_create_as_resource,
filtering out DCC modifiers because we don't support these for now.
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10237>
This new surface attribute can be supplied by the client to indicate
a list of modifiers that the driver can choose from for buffer
allocation. This is useful to make sure the buffers allocated via libva
are compatible with the intended usage (e.g. can be scanned out via KMS
or can be imported to EGL).
Introduce a new Gallium pipe_context.create_video_buffer_with_modifiers
hook that drivers can implement if they are modifiers-aware. Add a
modifiers argument to vlVaHandleSurfaceAllocate so that the
user-supplied list of modifiers can be passed down from vaCreateSurfaces
to the Gallium driver.
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10237>
Namely we want to be able to emit the following dynamically :
* On Gfx 7/7.5 : 3DSTATE_VM, 3DSTATE_BLEND_STATE_POINTERS
* On Gfx 8+ : 3DSTATE_VM, 3DSTATE_BLEND_STATE_POINTERS,
3DSTATE_PS_BLEND
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10206>
Following 505d176a8e ("anv: disable baked in pipeline bits from
dynamic emission path") dynamic bits of extensions that are not
enabled should not be there.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10206>
The ssa_constants hash table and its elements are leaked. Pass the
context to the allocator to avoid that.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10408>
On GFX6-7, the 8 and 16-bit integer add reductions use the 32-bit v_add
instruction, which clobbers the VCC register.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10346>