Commit Graph

60 Commits

Author SHA1 Message Date
Christian König 4bc0059229 radeon/video: use more of the common buffer code v2
In preparation to using buffers clears with the hw engine(s).

v2: split out flipping to using hw buffer clears.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-11 15:05:55 +02:00
Emil Velikov a131263a2f gallium/radeon: cleanup header inclusion
- Add top_srcdir/src/gallium/winsys to GALLIUM_DRIVER_C{XXFLAGS}.
 - Remove top_srcdir/src/gallium/drivers/radeon from the includes.

As a result:
 - Common radeon headers are prefixed with 'radeon/'
 - Winsys header inclusion is prefixed 'radeon/drm'

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-08-28 21:24:37 +01:00
Alex Deucher 6b48c18b03 radeon/uvd: remove comment about RV770
It doesn't seem to support field based decode after testing.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-08-27 10:04:13 -04:00
Christian König 80771e47b6 radeon/uvd: fix field handling on R6XX style UVD
The first UVD generation can only do frame based output.

Signed-off-by: Christian König <christian.koenig@amd.com>
2014-08-26 17:56:57 +02:00
Michel Dänzer 07c65b85ea r600g/radeonsi: Use write-combined CPU mappings of some BOs in GTT
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-07-23 18:55:50 +09:00
Grigori Goronzy 6cd30f5d73 radeon/uvd: disable VC-1 simple/main on UVD 2.x
It's about as broken as on later UVD revisions.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66452
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>

Reviewed-by: Christian König <christian.koenig@amd.com>
2014-06-18 13:58:52 +02:00
Christian König 9ff0cf903d radeon/vce: initial VCE support v8
v2 (chk): revert feedback buffer hack
v3 (slava): fixed bitstream size calculation
v4 (chk): always create buffers in the right domain
v5 (chk): flush async
v6 (chk): rework fw interface add version check
v7 (leo): implement cropping support
v8 (chk): add hw checks

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
2014-02-13 11:11:24 +01:00
Christian König ee978aee94 vl: add H264 encoding interface
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
2014-02-11 13:26:13 +01:00
Christian König 9b218dcdd7 radeon/video: directly create buffers in the right domain
Avoid moving things around on start of stream.

Signed-off-by: Christian König <christian.koenig@amd.com>
2014-02-06 15:54:14 +01:00
Christian König 7bcfb0bc8f radeon/video: seperate common video functions
Signed-off-by: Christian König <christian.koenig@amd.com>
2014-02-06 15:54:13 +01:00