Commit Graph

77417 Commits

Author SHA1 Message Date
Frank Binns d6f669ba83 egl: only store device name when Wayland support is built
The device name is only needed for WL_bind_wayland_display so make this clear
by only storing the device name when Wayland support is built.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-01 15:47:58 +01:00
Lionel Landwerlin 2dc6930a5a isl: round format alignment to nearest power of 2
A few inline asserts in anv assume alignments are power of 2, but with
formats like R8G8B8 we have odd alignments.

v2: round up to power of 2 (Ilia)

v3: reuse util_next_power_of_two() from gallium/aux/util/u_math.h (Ilia)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-01 11:36:09 +01:00
Thomas Hellstrom fc6be40011 gallium/postprocess: Fix resource freeing
The code was triggering asserts in DEBUG builds of the SVGA driver since
the reference count of the resource was never decremented before destroy.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-01 07:59:49 +02:00
Ilia Mirkin e3db415456 st/mesa: expose OES_geometry_shader and OES_texture_cube_map_array
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-08-31 20:12:55 -04:00
Eric Engestrom 3bd885d09c Introduce .editorconfig
A few weeks ago, Jose Fonseca suggested [0] we use .editorconfig files
to try and enforce the formatting of the code, to which Michel Dänzer
suggested [1] we start by importing the existing .dir-locals.el
settings. The first draft was discussed in the RFC [2].

These .editorconfig are a first step, one that has the advantage of
requiring little to no intervention from the devs once the settings
files are in place, but the settings are very limited. This does have
the advantage of applying while the code is being written.
This doesn't replace the need for more comprehensive formatting tools
such as clang-format & clang-tidy, but those reformat the code after
the fact.

[0] https://lists.freedesktop.org/archives/mesa-dev/2016-June/121545.html
[1] https://lists.freedesktop.org/archives/mesa-dev/2016-June/121639.html
[2] https://lists.freedesktop.org/archives/mesa-dev/2016-July/123431.html

Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-08-31 17:06:54 -07:00
Eric Anholt 509e2dbc10 vc4: Add missing break statement.
This opcode isn't used yet, so it didn't affect anything.  Caught by
Coverity, reported to me by imirkin.
2016-08-31 17:06:54 -07:00
Brian Paul c87e8c8515 gallium/docs: clarify render_condition_enabled parameter to clear functions
If false, it means do the clear unconditionally.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-08-31 15:51:06 -06:00
Jason Ekstrand b8bff0823b mesa: Add some more .gitignore 2016-08-31 13:45:27 -07:00
Matt Turner 90eaf01616 i965: Pass start_offset to brw_set_uip_jip().
Without this, we would pass over the instructions in the SIMD8 program
(which is located earlier in the buffer) when brw_set_uip_jip() is
called to handle the SIMD16 program.

The assertion about compacted control flow was bogus: halt, cont, break
cannot be compacted because they have both JIP and UIP. Instead, we
should never see a compacted instruction in this code at all.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-08-31 13:11:27 -07:00
Kenneth Graunke bea048752e i965: Merge gen7_clip_state atom into gen6_clip_state atom.
The original motivation was that gen6_clip_state ignored _NEW_POLYGON
as it didn't care about early culling.  The only other change was that
Gen6 ignored BRW_NEW_TES_PROG_DATA as it doesn't have tessellation
shaders, but listening to this is harmless as it'll never be signalled.

Now that we've added _NEW_POLYGON for is_drawing_lines/points, we can
merge the two as the distinction is meaningless.

This actually fixes a bug, though: Gen8+ was using the gen6_clip_state
atom because it doesn't care about early culling, but it also needs
BRW_NEW_TES_PROG_DATA, which was missing.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-08-31 12:42:09 -07:00
Kenneth Graunke 4c116cbafb i965: Use gs_prog_data in is_drawing_points/lines().
State upload code should use prog_data rather than poking at core
Mesa shader data structures wherever possible.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-08-31 11:50:15 -07:00
Kenneth Graunke cd19db4ee6 i965: Fix missing dirty bits related to is_drawing_points/lines.
calculate_attr_overrides() uses is_drawing_points(), which depends
on tessellation and geometry program state, as well as polygon state.

v2: Add missing _NEW_POLYGON as well.  Caught by Iago Toral.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-08-31 11:50:15 -07:00
Samuel Pitoiset 3df8615dcd nvc0: remove an attempt at uploading all IMMD into a CB
This has never been used because info->immd.bufSize is always 0
and anyways this is an experimental code which has never been
completed.

This gets rid of some unused code in the program validation process.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-08-31 19:05:16 +02:00
Samuel Pitoiset b2f3d50ca7 nv50: remove unused nv50_program::immd_size field
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-08-31 19:05:13 +02:00
Ilia Mirkin 6118bcab4e nv30: set usage to staging so that the buffer is allocated in GART
The code a few lines below expects to migrate the bo in question to
VRAM. Since we're filling the initial data via CPU, it's more efficient
to create the temporary buffer in GART. There is no "push" method
implemented, otherwise we'd use that instead.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2016-08-31 10:28:33 -04:00
Frank Binns 5505845945 egl/x11_dri3: provide an authentication function
To support WL_bind_wayland_display an authentication function needs to be
provided but this was not being done for this platform as it's not strictly
necessary. However, as this isn't an optional function there's the potential
for a segfault to occur if authentication is mistakenly performed. Protect
against this by providing a function that prints an error.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
2016-08-31 15:10:14 +02:00
Frank Binns 4c28c916ef egl/x11_dri3: disable WL_bind_wayland_display for devices without render nodes
Up until now, DRI3 was only used for devices that have render nodes, unless
overridden via an environment variable, with it falling back to DRI2 otherwise.
This limitation was there in order to support WL_bind_wayland_display as it
requires client opened device node fds to be authenticated, which isn't possible
when using DRI3. This is an unfortunate compromise as DRI3 provides security
benefits over DRI2.

Instead, allow DRI3 to be used for devices without render nodes but don't
advertise WL_bind_wayland_display in this case. Applications that need this
extension can still be run by disabling DRI3 support via the LIBGL_DRI3_DISABLE
environment variable.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
2016-08-31 15:09:12 +02:00
Jose Fonseca 55e417222f scons: Fix MinGW cross compilation.
The generated GLSL header files were only being built for the host
platform, and not the target platform.

Trivial.
2016-08-31 12:18:34 +01:00
Ilia Mirkin 8caf2cb0c0 nv30: only bail on color/depth bpp mismatch when surfaces are swizzled
The actual restriction is a little weaker than I originally thought. See
https://bugs.freedesktop.org/show_bug.cgi?id=92306#c17 for the
suggestion. This also explain why things weren't *always* failing
before, only sometimes. We will allocate a non-swizzled depth buffer for
NPOT winsys buffer sizes, which they almost always are.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2016-08-31 01:17:55 -04:00
Kenneth Graunke d82f8d9772 glsl: Handle patch qualifier on interface blocks.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-08-30 22:09:36 -07:00
Ilia Mirkin a0b1260fe0 i965: enable OES_primitive_bounding_box with the no-op implementation
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-08-30 21:31:30 -04:00
Ilia Mirkin bf47b2bf88 st/mesa: provide the null implementation of bounding box outputs in tcs
Until hardware appears (in a gallium driver) that can make use of the
TCS-outputted gl_BoundingBox, we just request that the variable gets
assigned as a regular patch variable.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-08-30 20:25:15 -04:00
Ilia Mirkin 891d7e3c9e glsl: add gl_BoundingBox and associated varying slots
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-08-30 20:25:15 -04:00
Ilia Mirkin 10663c648e mesa: add support for GL_PRIMITIVE_BOUNDING_BOX storage and query
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-08-30 20:25:15 -04:00
Ilia Mirkin 3b81c998a2 mesa: add scaffolding for OES/EXT_primitive_bounding_box
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-08-30 20:25:15 -04:00
Timothy Arceri 64a48efb9e aubinator: fix if indentation and add brackets to multiline body
Fixes misleading indentation warning in gcc.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-08-31 10:19:45 +10:00
Francisco Jerez 6df215d97e i965/fs: Assert that the number of color targets is one when dual-source blend is enabled.
Requested by Anuj during review of
4a87e4ade7, adding as follow-up since it
led to assertion failures due to various GLSL bugs that should be
fixed now.
2016-08-30 16:54:19 -07:00
Francisco Jerez fd04d048ae glsl: Fix gl_program::OutputsWritten computation for dual-source blending.
In the fragment shader OutputsWritten is a bitset of FRAG_RESULT_*
enumerants, which represent the location of each color output written
by the shader.  The secondary and primary color outputs of a given
render target using dual-source blending have the same location, so
the 'idx' computation below will give the wrong bit as result if the
'var->data.index' term is non-zero -- E.g. if the shader writes the
primary and secondary colors of the FRAG_RESULT_COLOR output,
ir_set_program_inouts will think that the shader writes both
FRAG_RESULT_COLOR and FRAG_RESULT_SAMPLE_MASK, which is just bogus.

That would cause the brw_wm_prog_key::nr_color_regions computation
done in the i965 driver during fragment shader precompilation to be
wrong, which currently leads to unnecessary recompilation of shaders
that use dual-source blending, and triggers an assertion failure in
fs_visitor::emit_fb_writes() on my i965-fb-fetch branch.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-08-30 16:54:19 -07:00
Francisco Jerez 965934f38a glsl: Fix incorrect hard-coded location of the gl_SecondaryFragColorEXT built-in.
gl_SecondaryFragColorEXT should have the same location as gl_FragColor
for the secondary fragment color to be replicated to all fragment
outputs.  The incorrect location of gl_SecondaryFragColorEXT would
cause the linker to mark both FRAG_RESULT_COLOR and FRAG_RESULT_DATA0
as being written to, which isn't allowed by the spec and would
ultimately lead to an assertion failure in
fs_visitor::emit_fb_writes() on my i965-fb-fetch branch.

This should also fix the code below for multiple dual-source-blended
render targets, which no driver currently supports but we have plans
to enable eventually in the i965 driver (the comment saying that no
hardware will ever support it seems rather hilarious).

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-08-30 16:54:19 -07:00
Francisco Jerez 342f945b13 st/glsl_to_tgsi: Use SecondaryOutputsWritten to determine dual-source fragment outputs.
Currently the mesa state tracker relies on there being two bits set
per dual-source output in the gl_program::OutputsWritten bitset, but
that only worked due to a GLSL front-end bug that caused it to set the
OutputsWritten bit for both location and location+1 even though at the
GLSL level the primary and secondary color outputs used for
dual-source blending have the same location.  Fix it by extending
outputMapping[] to 2*FRAG_RESULT_MAX elements in order to represent a
mapping from a (location, index) pair to its TGSI output, which should
also make it slightly easier to add support for dual-source blending
in combination with multiple render targets in the long run.

No Piglit regressions on llvmpipe.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-08-30 16:54:19 -07:00
Francisco Jerez cb4b38af41 glsl: Calculate bitset of secondary outputs written in ir_set_program_inouts.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-08-30 16:54:18 -07:00
Ian Romanick c011d7d900 glsl: Fix typo in comment
Trivial.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
2016-08-30 16:28:03 -07:00
Ian Romanick aee9ab7de7 glsl: Replace most assertions with unreachable()
text	   data	    bss	    dec	    hex	filename
7669233	 277176	  28624	7975033	 79b079	i965_dri.so before generated code
7647081	 277176	  28624	7952881	 7959f1	i965_dri.so before this commit
7669289	 277176	  28624	7975089	 79b0b1	i965_dri.so with this commit

Looking at the generated assembly, it appears that some of changes made
in the generated code prevent some loops from being unrolled.  Removing
the default cases (via unreachable()) allows these loops to unroll again.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-08-30 16:28:03 -07:00
Ian Romanick dd574be54c glsl: Refactor handling of horizontal operations
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
2016-08-30 16:28:03 -07:00
Ian Romanick d6e73150a4 glsl: Use constant_template_horizontal instead of constant_template_horizontal_single_implementation for unops
This changes the "shape" of all the pack and unpack operators, but they
should function the same.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
2016-08-30 16:28:03 -07:00
Ian Romanick 822b5c5eb2 glsl: Eliminate constant_template2
constant_template_common can now handle the case where the result type
is different from the input type by using type_signature_iter.  This
changes the "shape" of all the cast-style operators, but they should
function the same.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
2016-08-30 16:28:03 -07:00
Ian Romanick abc81f7883 glsl: Eliminate constant_template5
constant_template_common can now handle the case where the result type
is different from the input type by using type_signature_iter.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-08-30 16:28:03 -07:00
Ian Romanick 53c54a6c73 glsl: Eliminate constant_template0
This template is mostly an artefact of the development of the original
patch series and to minimize the differences between the original code
and the generated code.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-08-30 16:28:03 -07:00
Ian Romanick ddb4b53de3 glsl: Eliminate one of the templates for simpler operations
The difference between these two templates were mostly an artefact of
the development of the original patch series and to minimize the
differences between the original code and the generated code.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
2016-08-30 16:28:03 -07:00
Ian Romanick ee3cdac785 glsl: Use the generated constant expression code
Immediately previous to this patch,

    diff -wud src/glsl/ir_constant_expression.cpp \
              src/glsl/ir_expression_operation_constant.h

should be "minimal."

v3: With much help from José Fonseca, fix the SCons build.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-08-30 16:28:03 -07:00
Ian Romanick f3fcfe001f glsl: Generate code for constant ir_triop_csel expressions
v2: 'for (a, b) in d' => 'for a, b in d'.  Suggested by Dylan.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
2016-08-30 16:28:03 -07:00
Ian Romanick 2761190baa glsl: Generate code for constant ir_triop_lrp expressions
v2: 'for (a, b) in d' => 'for a, b in d'.  Suggested by Dylan.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
2016-08-30 16:28:02 -07:00
Ian Romanick 6e09c8715d glsl: Generate code for constant ir_quadop_vector expressions
v2: 'for (a, b) in d' => 'for a, b in d'.  Suggested by Dylan.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
2016-08-30 16:28:02 -07:00
Ian Romanick f8e185a65f glsl: Generate code for constant ir_quadop_bitfield_insert expressions
v2: 'for (a, b) in d' => 'for a, b in d'.  Suggested by Dylan.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
2016-08-30 16:28:02 -07:00
Ian Romanick 4d8ac28b20 glsl: Generate code for constant ir_triop_vector_insert expressions
v2: 'for (a, b) in d' => 'for a, b in d'.  Suggested by Dylan.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
2016-08-30 16:28:02 -07:00
Ian Romanick 9f1d7c5235 glsl: Generate code for constant ir_binop_vector_extract expressions
v2: 'for (a, b) in d' => 'for a, b in d'.  Suggested by Dylan.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
2016-08-30 16:28:02 -07:00
Ian Romanick d8dd49419a glsl: Generate code for constant ir_binop_mul expressions
v2: 'for (a, b) in d' => 'for a, b in d'.  Suggested by Dylan.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
2016-08-30 16:28:02 -07:00
Ian Romanick 8954a019f7 glsl: Generate code for constant ir_triop_fma and ir_triop_bitfield_extract expressions
ir_triop_bitfield_extract is a little weird because the second and third
operand and aways int, so they may differ in type from the first
operand.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
2016-08-30 16:28:02 -07:00
Ian Romanick da61c94db8 glsl: Generate code for constant ir_binop_dot expressions
v2: 'for (a, b) in d' => 'for a, b in d'.  Suggested by Dylan.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
2016-08-30 16:28:02 -07:00
Ian Romanick 13106e1041 glsl: Generate code for constant ir_binop_lshift and ir_binop_rshift expressions
The code generated is quite different from what was previously used.  I
believe that it is still correct by the GLSL spec, and I believe, due to
C rules about shifts, the behavior will be the same.

Section 5.9 (Expressions) of the GLSL 4.50 spec says:

    The result is undefined if the right operand is negative, or greater
    than or equal to the number of bits in the left expression's base
    type.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
2016-08-30 16:28:02 -07:00