Commit Graph

78286 Commits

Author SHA1 Message Date
Brian Paul 42246ab1f5 tgsi: s/true/TRUE/ in tgsi_scan.c
Just to be consistent.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-02-08 09:29:38 -07:00
Brian Paul da6e879a6c tgsi: use switches instead of big if/else ifs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-02-08 09:29:38 -07:00
Brian Paul 37eb3f0400 tgsi: break gigantic tgsi_scan_shader() function into pieces
New functions for examining instructions, declarations, etc.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-02-08 09:29:38 -07:00
Brian Paul 3c3ef69696 st/mesa: minor formatting fixes in st_cb_bitmap.c 2016-02-08 09:29:38 -07:00
Brian Paul 5fdbfb8d6f mesa: move GL_ARB_debug_output code into new debug_output.c file
The errors.c file had grown quite large so split off this extension
code into its own file.  This involved making a handful of functions
non-static.

Acked-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-02-08 09:29:38 -07:00
Brian Paul 6691ba1fe8 gallium/util: whitespace, formatting fixes in u_debug_stack.c 2016-02-08 09:29:38 -07:00
Brian Paul 5d2539cb49 gallium/util: whitespace, formatting fixes in u_staging.[ch] files
Still some nonsensical comments.
2016-02-08 09:29:38 -07:00
Brian Paul c84a8911fc gallium/util: switch over to new u_debug_image.[ch] code
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-08 09:29:38 -07:00
Brian Paul 3917c8f3f9 gallium/util: put image dumping functions into separate file
To try to reduce the clutter in u_debug.[ch]

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-08 09:29:38 -07:00
Brian Paul 6c7d4a7173 gallium/util: whitespace, formatting fixes in u_debug.c
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-08 09:29:38 -07:00
Samuel Pitoiset efe5829578 trace: add missing pipe_context::clear_texture()
This fixes a crash with bin/arb_clear_texture-base-formats and
probably some other tests which use clear_texture().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-08 00:06:32 +01:00
Samuel Pitoiset 1dacbb7b46 trace: remove useless MALLOC() in trace_context_draw_vbo()
There is no need to allocate memory when unwrapping the indirect buf.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-08 00:06:22 +01:00
Vinson Lee ccaf734275 mesa/extensions: Fix NVX_gpu_memory_info lexicographical order.
Fixes MesaExtensionsTest.AlphabeticallySorted.

Fixes: 1d79b99580 ("mesa: implement GL_NVX_gpu_memory_info (v2)")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94016
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-07 14:42:00 -08:00
Ilia Mirkin 88519c6087 glsl: return cloned signature, not the builtin one
The builtin data can get released with a glReleaseShaderCompiler call.
We're careful everywhere to clone everything that comes out of builtins
except here, where we accidentally return the signature belonging to the
builtin version, rather than the locally-cloned one.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Tested-by: Rob Herring <robh@kernel.org>
Cc: mesa-stable@lists.freedesktop.org
2016-02-07 17:23:58 -05:00
Ilia Mirkin ac57577e29 glsl: make sure builtins are initialized before getting the shader
The builtin function shader is part of the builtin state, released
when glReleaseShaderCompiler is called. We must ensure that the
builtins have been (re)initialized before attempting to link with the
builtin shader.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Tested-by: Rob Herring <robh@kernel.org>
Cc: mesa-stable@lists.freedesktop.org
2016-02-07 17:23:57 -05:00
Samuel Pitoiset 04c2ca5038 tgsi: use TGSI_WRITEMASK_XYZW instead of hardcoding the mask
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
2016-02-06 20:24:41 +01:00
Kristian Høgsberg Kristensen 6c4c04690f anv: Deduplicate dispatch calls
This can all be shared between gen8+ and pre-gen8.
2016-02-05 22:36:53 -08:00
Timothy Arceri ea7f64f74d glsl: don't generate transform feedback candidate when not required
If we are not even looking for one don't bother generating a candidate
list.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-02-06 14:34:43 +11:00
Timothy Arceri c1bbaff1e8 glsl: replace unreachable code with an assert()
All interface blocks will have been lowered by this point so just
use an assert. Returning false would have caused all sorts of
problems if they were not lowered yet and there is an assert to
catch this later anyway.

We also update the tests to reflect this change.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-02-06 14:34:35 +11:00
Jan Vesely e377037bef r600, compute: Do not overwrite pipe_resource.screen
found by inspection.

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-05 21:17:15 -05:00
Kristian Høgsberg Kristensen bdefaae2b9 anv: Deduplicate anv_CmdDraw calls
These were all duplicated between gen7_cmd_buffer.c and
gen8_cmd_buffer.c. This commit consolidates both copies in
genX_cmd_buffer.c.
2016-02-05 16:41:56 -08:00
Kristian Høgsberg Kristensen 6cdada0360 anv: Move invariant state to small initial batch
We use the simple batch helper to submit a batch at driver startup time
which holds all the state that never changes.  We don't have a whole lot
and once we enable tesselation there'll be even less. Even so, it's a
simple mechanism and reduces our steady state batch sizes a bit.
2016-02-05 16:13:53 -08:00
Kristian Høgsberg Kristensen c9c3344c4f anv: Split out batch submit helper from anv_DeviceWaitIdle
We'll reuse this mechanism in the next commit.
2016-02-05 16:13:52 -08:00
Kristian Høgsberg Kristensen 381d85545a anv: Share scratch_space helper between gen7 and gen8+
The gen7 pipeline has a useful helper function for this, let's use it in
gen8_pipeline.c too.  The gen7 function has an off-by-one bug though: we
have to compute log2(size / 1024) - 1, but we divide by 2048 instead so
as to avoid the case where size is less than 1024 and we'd return -1.
2016-02-05 16:13:52 -08:00
Kristian Høgsberg Kristensen d1617dbec3 anv: Share URB setup between gen7 and gen8+ 2016-02-05 16:13:52 -08:00
Jason Ekstrand 9401516113 Merge remote-tracking branch 'mesa-public/master' into vulkan 2016-02-05 15:21:11 -08:00
Jason Ekstrand 741744f691 Merge commit mesa-public/master into vulkan
This pulls in the patches that move all of the compiler stuff around
2016-02-05 15:03:44 -08:00
Jason Ekstrand 9645b8eb1f Merge branch mesa-public/master into vulkan 2016-02-05 14:21:13 -08:00
Jan Vesely 5b51b2e000 r600g: Ignore format for PIPE_BUFFER targets
Fixes compute since 7dd31b81fe
gallium/radeon: support PIPE_CAP_SURFACE_REINTERPRET_BLOCKS

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2016-02-05 20:23:56 +01:00
Marek Olšák d8e4908b63 mesa/get: fix a breakage after rebase
trivial.
2016-02-05 19:39:13 +01:00
Matt Turner 9f2e22bf34 i965/vec4: don't copy ATTR into 3src instructions with complex swizzles
The vec4 backend, at the end, does this:

    if (inst->is_3src()) {
       for (int i = 0; i < 3; i++) {
          if (inst->src[i].vstride == BRW_VERTICAL_STRIDE_0)
             assert(brw_is_single_value_swizzle(inst->src[i].swizzle));

So make sure that we use the same conditions when trying to
copy-propagate. UNIFORMs will be converted to vstride 0 in
convert_to_hw_regs, but so will ATTRs when interleaved (as will happen
in a GS with multiple attributes). Since the vstride is not set at
copy-prop time, infer it by inspecting dispatch_mode and reject ATTRs if
they have non-scalar swizzles and are interleaved.

Fixes assertion errors in dolphin-generated geometry shaders (or
misrendering on opt builds) on Sandybridge or on IVB/HSW with
INTEL_DEBUG=nodualobj.

Co-authored-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93418
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
2016-02-05 09:33:19 -08:00
Marek Olšák 1106e79ed9 docs/relnotes: document memory info extensions 2016-02-05 17:47:59 +01:00
Marek Olšák 635555af6a gallium/radeon: implement query_memory_info (v2)
v2: don't use DIV_ROUND_UP (no so useful)
    also return eviction stats

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-05 17:31:58 +01:00
Marek Olšák 5f51a24a77 st/mesa: implement and enable memory info extensions (v2)
v2: assert and return if query_memory_info is not set
    rebase

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-05 17:31:53 +01:00
Marek Olšák 837f74aa51 mesa: implement GL_ATI_meminfo (v2)
v2: rebase

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-05 17:31:20 +01:00
Marek Olšák 1d79b99580 mesa: implement GL_NVX_gpu_memory_info (v2)
v2: implement eviction queries properly
    add gl_memory_info structure

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-05 17:30:07 +01:00
Marek Olšák d2e4c9e737 gallium: add interface for querying memory usage and sizes (v2)
If you're worried about the duplication of some CAPs, we can remove them
later.

v2: add fields for memory eviction stats

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-05 17:29:38 +01:00
Marek Olšák c577f2843a gallium/radeon: remove radeon_info::r600_tiling_config
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-02-05 17:29:19 +01:00
Marek Olšák 4f96846d9d gallium/radeon: get pipe_interleave_bytes AKA group_bytes from the winsys
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-02-05 17:28:59 +01:00
Marek Olšák 276621da45 gallium/radeon: set num_banks in the winsys
amdgpu doesn't have to set this, because radeonsi gets it from tile mode
arrays by default.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-02-05 17:28:40 +01:00
Marek Olšák 294ec530c9 gallium/radeon: just get num_tile_pipes from the winsys
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-02-05 17:28:24 +01:00
Marek Olšák 0f3556d308 winsys/amdgpu: add an assertion to cik_get_num_tile_pipes (v2)
v2: print an error to stderr

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-02-05 17:28:18 +01:00
Marek Olšák a2291f7b57 winsys/amdgpu: remove an r600-only setting
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-02-05 17:28:12 +01:00
Marek Olšák 1e864d7379 gallium/radeon: rename & reorder members of radeon_info
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-02-05 17:28:00 +01:00
Steinar H. Gunderson feb53912f8 mesa: Fix locking of GLsync objects.
GLsync objects had a race condition when used from multiple threads
(which is the main point of the extension, really); it could be
validated as a sync object at the beginning of the function, and then
deleted by another thread before use, causing crashes. Fix this by
changing all casts from GLsync to struct gl_sync_object to a new
function _mesa_get_and_ref_sync() that validates and increases
the refcount.

In a similar vein, validation itself uses _mesa_set_search(), which
requires synchronization -- it was called without a mutex held, causing
spurious error returns and other issues. Since _mesa_get_and_ref_sync()
now takes the shared context mutex, this problem is also resolved.

Fixes bug #92757, found while developing Nageru, my live video mixer
(due for release at FOSDEM 2016).

v2: Marek: silence warnings, fix declaration after code

Signed-off-by: Steinar H. Gunderson <sesse@google.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2016-02-05 17:18:17 +01:00
Nicolai Hähnle 156e81f305 radeonsi: add placeholder MC and SRBM performance counter groups
Yet another change motivated by AMD GPUPerfStudio compatibility. These groups
are not directly accessible from userspace, and AMD GPUPerfStudio does not
actually query them - it just requires them to be there. Hence, adding
a placeholder for now.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
2016-02-05 09:25:33 -05:00
Nicolai Hähnle 988f4b31f3 radeonsi: re-order the SQ_xx performance counter blocks
This is yet another change motivated by appeasing AMD GPUPerfStudio's
hardcoding of performance counter group numbers.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
2016-02-05 09:25:30 -05:00
Nicolai Hähnle 75affd73b0 radeonsi: re-order the perfcounter hardware blocks
As documented in the comment, AMD GPUPerfStudio unfortunately hardcodes the
order of performance counter groups. Let's do the pragmatic thing and present
the same order as Catalyst/Crimson.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
2016-02-05 09:25:27 -05:00
Nicolai Hähnle b0e32548c8 gallium/radeon: add GPIN driver query group
This group was used by older versions of AMD GPUPerfStudio (via
AMD_performance_monitor) to identify the GPU family, and GPUPerfStudio
still complains when it isn't available.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
2016-02-05 09:24:59 -05:00
Nicolai Hähnle 4b672b8310 radeonsi: Allow dumping LLVM IR before optimization passes
Set R600_DEBUG=preoptir to dump the LLVM IR before optimization passes,
to allow diagnosing problems caused by optimization passes.

Note that in order to compile the resulting IR with llc, you will first
have to run at least the mem2reg pass, e.g.

opt -mem2reg -S < shader.ll | llc -march=amdgcn -mcpu=bonaire

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> (original patch)
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (w/ debug flag)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-05 09:22:04 -05:00