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137 Commits

Author SHA1 Message Date
Dave Airlie 8198900071 ac/radv: drop info pointer from the ac and radv shader structs 
This was being used for one bool, just pass the bool.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16521>
 2022-05-17 06:15:25 +00:00
Marek Olšák 39800f0fa3 amd: change chip_class naming to "enum amd_gfx_level gfx_level" 
This aligns the naming with PAL.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pellou-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16469>
 2022-05-13 14:56:22 -04:00
Marek Olšák 20bb85e2ec ac/llvm: fix the remaining s_barriers for LLVM 15 
LLVM 15 doesn't insert s_waitcnt before barriers.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304>
 2022-05-13 09:15:20 +00:00
Marek Olšák b48d183633 ac/llvm: move the gfx6 optimization for TCS barriers into ac_build_s_barrier 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304>
 2022-05-13 09:15:20 +00:00
Marek Olšák e4882d6b7e ac/llvm: add gl_shader_stage parameter into ac_build_s_barrier 
this will be used later

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304>
 2022-05-13 09:15:20 +00:00
Pierre-Eric Pelloux-Prayer db2fd0ca83 amd: fix ac_build_mbcnt_add in wave32 mode 
add_src was ignored and i32_0 was always used.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 1e49018ced ("amd: Add extra source to the mbcnt_amd NIR intrinsic.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16427>
 2022-05-12 07:46:04 +00:00
Yogesh mohan marimuthu 6531ec8922 ac,radeonsi/gfx11: swizzle MRT0/1 for dual source blending 
If dual source blending is enabled, use export targets 21 and 22.
Also we have to swap odd/even lanes between export target 21 and 22.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Yogesh Mohan Marimuthu 12a606c1bd radeonsi/gfx11: export alpha through mrtz for alpha-to-coverage if mrtz is there 
If both mrtz and alpha-to-coverage are enabled, the alpha channel must
be exported through mrtz.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák 91a7f43f0b radeonsi/gfx11: don't set COMPR for exports, use 0x3 channel mask instead 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Yogesh mohan marimuthu b07204d780 radeonsi/gfx11: interp changes for 16bit 
make interp 16bit changes for gfx11

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Yogesh mohan marimuthu 0a54fbb5b4 radeonsi/gfx11: interp changes for 32bit 
make interp 32bit changes for gfx11

v2: fix coding indentation issue (Pierre-Eric)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 7d6e3397dc ac/llvm: don't set GLC for stores on gfx11 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 61b6e05118 ac/llvm: update pknorm and waitcnt for gfx11 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák ab284b2571 ac/llvm: don't set DLC on gfx11 because it means something else there 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 3d70cc90b7 ac/llvm: export mrt0 instead of null on gfx11 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 0cd59c7cb0 ac/llvm: set the correct cache policy for sparse buffer loads 
The DLC bit was missing on gfx10.

Fixes: 6d5e26752c "ac/nir: implement sparse image/texture loads"
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16215>
 2022-05-03 11:11:08 -04:00
Marek Olšák 159b28ad36 ac/llvm: rename tbuffer -> buffer where tbuffer instructions are not generated 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák 6698753cdb ac/llvm: don't use tbuffer_store as a fallback for swizzled stores 
This depends on the offset computation fix from:
   "ac/llvm: remove inst_offset parameter from ac_build_buffer_store_dword"

v2: The instruction type is changed to MUBUF, which requires us to clear
    DATA_FORMAT with ADD_TID_ENABLE.

Reviewed-by: Mihai Preda <mhpreda@gmail.com> (v1)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák 4b63b5caa2 ac/llvm: remove unused code from ac_llvm_build.c/h 
One forward declaration didn't have an implementation.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák 99356c597f ac/llvm: remove immoffset parameter from ac_build_tbuffer_load_byte/short 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák c888e77dfc ac/llvm: remove inst_offset parameter from ac_build_buffer_load 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák e3421ae8ff ac/llvm: use soffset correctly in ac_build_buffer_load 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák f68aeaa2c2 ac/llvm: remove inst_offset parameter from ac_build_buffer_store_dword 
There was a bug that inst_offset was added to soffset in one codepath and
to voffset in all other codepaths. The correct behavior is to add it
to voffset.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák 8abb612cba ac/llvm: remove immoffset parameter from ac_build_tbuffer_load 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák 6234d92073 ac/llvm: remove immoffset parameter from ac_build_tbuffer_store 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák a3e777a89a ac/llvm: add AC_WAIT_EXP for ac_build_waitcnt 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák 5af4d0c2dc ac/llvm: remove LLVM pass ac_optimize_vs_outputs 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
 2022-04-22 22:21:11 +00:00
Mihai Preda 279eea5bda amd/llvm: Transition to LLVM "opaque pointers" 
For context, see LLVM opaque pointers:
https://llvm.org/docs/OpaquePointers.html
https://llvm.org/devmtg/2015-10/slides/Blaikie-OpaquePointerTypes.pdf

This fixes the deprecation warnings in src/amd/llvm only.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15572>
 2022-04-09 05:20:29 +00:00
Marek Olšák c740fd18ba ac/llvm: replace structured by vindex != NULL in ac_build_buffer_store_common 
"raw" (IDXEN=0) and "structured" (IDXEN=1) do bounds checking differently.
From `si_make_buffer_descriptor`:
    * - For VMEM and inst.IDXEN == 0 or STRIDE == 0, it's in byte units.
    * - For VMEM and inst.IDXEN == 1 and STRIDE != 0, it's in units of STRIDE.

so there is a difference between setting vindex = i32_0 and vindex = NULL.
Instead of having the `structured` flag, we can just check if vindex is NULL.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098>
 2022-02-22 11:41:04 +00:00
Marek Olšák 1038382baf ac/llvm: replace structured by vindex != NULL in ac_build_tbuffer_store 
"raw" (IDXEN=0) and "structured" (IDXEN=1) do bounds checking differently.
From `si_make_buffer_descriptor`:
    * - For VMEM and inst.IDXEN == 0 or STRIDE == 0, it's in byte units.
    * - For VMEM and inst.IDXEN == 1 and STRIDE != 0, it's in units of STRIDE.

so there is a difference between setting vindex = i32_0 and vindex = NULL.
Instead of having the `structured` flag, we can just check if vindex is NULL.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098>
 2022-02-22 11:41:04 +00:00
Marek Olšák bf7d25cd1b ac/llvm: remove unused function dpp_row_sl 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098>
 2022-02-22 11:41:04 +00:00
Marek Olšák 116a05c721 ac: move ac_exp_param.h to ac_nir.h 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14266>
 2022-01-05 12:46:31 +00:00
Marek Olšák fd14e0afb1 radeonsi: set done=1 for PS exports at the end of si_llvm_build_ps_epilog 
so that we can reorder the exports

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14266>
 2022-01-05 12:46:30 +00:00
Marek Olšák d382ceea2b ac/llvm: remove the num_channels parameter from ac_build_buffer_store_dword 
It was used when LLVM didn't support vec3 and we had to pass vec4
with num_channels=3. We no longer need to do that.

This also removes the vec3 splitting or conversion to vec4 in callers.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14266>
 2022-01-05 12:46:30 +00:00
Marek Olšák e6aac44051 ac/llvm: add vindex into ac_build_buffer_store_dword 
for future work

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14266>
 2022-01-05 12:46:30 +00:00
Marek Olšák efaab0ec50 ac/llvm: add helper ac_build_is_inf_or_nan 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13380>
 2021-10-19 12:49:06 +00:00
Rhys Perry 91a5c9fdf2 ac/nir: return 0x76543210 for NULL FMASK fetch 
This can replace several v_cndmask_b32 with a single v_cndmask_b32.

fossil-db (Sienna Cichlid):
Totals from 1169 (0.78% of 150170) affected shaders:
SGPRs: 82032 -> 81984 (-0.06%); split: -0.19%, +0.13%
VGPRs: 68368 -> 68280 (-0.13%); split: -0.30%, +0.18%
SpillSGPRs: 8754 -> 8609 (-1.66%); split: -4.06%, +2.40%
CodeSize: 5460132 -> 5446308 (-0.25%); split: -0.42%, +0.17%
MaxWaves: 24456 -> 24462 (+0.02%); split: +0.03%, -0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12214>
 2021-10-07 15:36:39 +00:00
Samuel Pitoiset cf3e31fd11 ac/llvm: implement nir_intrinsic_image_deref_atomic_{fmin,fmax} 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12716>
 2021-09-15 14:10:42 +00:00
Marek Olšák b330c7cb2a radeonsi: use a trick to extract and pack edgeflags using fewer instructions 
This removes 4 instructions from the prim export packing.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
 2021-09-14 15:24:11 +00:00
Marek Olšák 2e95ad1433 ac/llvm: implement a bunch of NIR AMD intrinsics for NGG 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
 2021-09-07 17:51:41 +00:00
Rhys Perry 0460f01fdc ac/llvm: implement v2f16 fsat 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12143>
 2021-08-02 10:02:51 +00:00
Timur Kristóf 1e49018ced amd: Add extra source to the mbcnt_amd NIR intrinsic. 
The v_mbcnt instructions can take an extra source that they add to
the result. This is not exposed in SPIR-V but we now expose it in NIR.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11072>
 2021-06-09 16:48:51 +00:00
Marek Olšák 13acbaecd8 radeonsi: rewrite the prefix sum computation for shader culling 
Instead of storing the vertex mask per wave into LDS and then computing
the prefix sum, store 8-bit bitcounts (vertex counts) of the vertex masks
into LDS. This allows us to compute the sum using v_sad_u8, which computes
a sum of 4 i8vec4 components in one instruction.

Each i8vec4 of vertex counts is loaded in parallel threads (one dword
per thread) instead of all being loaded in thread 0, and readlane copies
them to SGPRs instead of readfirstlane.

LDS is no longer initialized before culling. Instead, the counts for
inactive waves are masked with AND later.

Incorrect old comments are also fixed.

This change removes 80 bytes from the code size, and it allows increasing
the workgroup size from 128 to 256. (which is the main motivation for this)

Now changing the workgroup size with wave64 has no effect on the code size.
Switching to wave32 with 8 waves even generates slightly smaller code than
wave64 with 4 waves.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák 4602147561 ac/llvm: don't draw the primitive for the dummy export workaround for Navi1x 
for conservative rasterization

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák f33500b187 ac/llvm: set range metadata on mbcnt and deduplicate get_thread_id 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák 57e182c75b ac/llvm: allow ac_build_optimization_barrier with SGPRs, pointers, and metadata 
sgpr=true prevents moving the value to a VGPR.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák 5f33f80dc7 ac/llvm: expose set_range_metadata to more users 
I sometimes use it for experiments. It will be used later.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák 94a1f45e15 ac/llvm: set target features per function instead of per target machine 
This is a cleanup that allows the removal of the wave32 target machine and
the wave32 pass manager.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Rhys Perry d918a59d15 radv,ac/llvm: use a dword alignment for descriptor loads 
RADV doesn't try to keep anything 16 or 32 byte aligned. RADV also seems
to create better code for some reason.

fossil-db (Sienna Cichlid):
Totals from 37693 (30.93% of 121873) affected shaders:
SGPRs: 1762792 -> 1785504 (+1.29%); split: -1.01%, +2.30%
VGPRs: 1761032 -> 1760808 (-0.01%); split: -0.09%, +0.07%
SpillSGPRs: 55793 -> 56011 (+0.39%); split: -3.49%, +3.88%
SpillVGPRs: 16766 -> 16387 (-2.26%); split: -3.99%, +1.73%
CodeSize: 82902228 -> 82781608 (-0.15%); split: -0.29%, +0.14%
Scratch: 3024896 -> 2987008 (-1.25%); split: -3.08%, +1.83%
MaxWaves: 919794 -> 920302 (+0.06%); split: +0.09%, -0.03%

shader-db (Sienna Cichlid):
Totals from affected shaders:
SGPRS: 3976 -> 3976 (0.00 %)
VGPRS: 3392 -> 3392 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 178792 -> 178980 (0.11 %) bytes
Max Waves: 1389 -> 1389 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4715
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10543>
 2021-05-03 14:52:40 +00:00
James Park 1351fcf3c3 amd: Fix warnings around variable sizes 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6162>
 2021-04-23 10:37:22 +00:00