Commit Graph

136479 Commits

Author SHA1 Message Date
Connor Abbott ee1f140fd9 freedreno/a6xx: Cleanup SP_XS_CTRL_REG0 definitions
The registers were actually different per-stage even though we used the
same type, which resulted in a bunch of incorrectly programmed fields
and confusion. Move the stage-specific values to the registers
themselves, which makes things much less confusing and makes it possible
to set "mergedregs" correctly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9493>
2021-03-11 20:58:39 +00:00
Connor Abbott 9a5596d679 freedreno/registers: Handle typed registers with fields
When a bitset is "inline" it should act as-if the its fields were
inserted into the register itself. However when initializing the
register's bitfield we weren't doing a deep copy of the inline bitfield,
so if the register defined additional fields then they would get added
to the original inline bitfield and any further registers with the same
type would get them. Fix this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9493>
2021-03-11 20:58:39 +00:00
Connor Abbott 8d55a1e112 freedreno/a6xx: Fix compute threadsize type
And use the variable for the other threadsize field.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9493>
2021-03-11 20:58:39 +00:00
Connor Abbott 1d8bf2d0bf freedreno/computerator: Fix thrsz type
And use it for the other thread size field, too

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9493>
2021-03-11 20:58:39 +00:00
Lionel Landwerlin f3cf70dc8d intel/tools: fix meson warning
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4434
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9524>
2021-03-11 20:52:20 +00:00
Pierre Moreau 4a408ff7ea spirv: Ignore WorkgroupSize in non-compute stages
If a SPIR-V module contains for example both a geometry and a compute
shader, when processing the geometry shader its vertices out, input
primitive and output primitive attributes would get overwritten by the
value of the WorkgroupSize.

```
; SPIR-V
; Version: 1.5
; Generator: Khronos; 17
; Bound: 12
; Schema: 0
               OpCapability Geometry
               OpCapability Shader
          %1 = OpExtInstImport "GLSL.std.450"
               OpMemoryModel Logical GLSL450
               OpEntryPoint Geometry %main "main"
               OpEntryPoint GLCompute %main_0 "main"
               OpExecutionMode %main InputPoints
               OpExecutionMode %main Invocations 1
               OpExecutionMode %main OutputTriangleStrip
               OpExecutionMode %main OutputVertices 4
               OpExecutionMode %main_0 LocalSize 1 1 1
               OpSource GLSL 460
               OpSource GLSL 460
               OpName %main "main"
               OpName %main_0 "main"
               OpModuleProcessed "Linked by SPIR-V Tools Linker"
               OpDecorate %gl_WorkGroupSize BuiltIn WorkgroupSize
       %void = OpTypeVoid
          %6 = OpTypeFunction %void
       %uint = OpTypeInt 32 0
     %v3uint = OpTypeVector %uint 3
     %uint_1 = OpConstant %uint 1
%gl_WorkGroupSize = OpConstantComposite %v3uint %uint_1 %uint_1 %uint_1
       %main = OpFunction %void None %6
         %10 = OpLabel
               OpReturn
               OpFunctionEnd
     %main_0 = OpFunction %void None %6
         %11 = OpLabel
               OpReturn
               OpFunctionEnd
```

Running spirv_to_nir on the SPIR-V sample above and for the geometry
entry point would say that (among others):

* vertices out: 1
* input primitive: LINES
* output primitive: LINES

By removing any reference to `%gl_WorkGroupSize`, the output would
change to (among others):

* vertices out: 4
* input primitive: POINTS
* output primitive: TRIANGLE_STRIP

Fixes: 7d862ef530 ("spirv: Rework handling of spec constant workgroup size built-ins")

v2:
* Move the check from inside `handle_workgroup_size_decoration_cb()` to
  its caller (Caio Marcelo de Oliveira Filho )
* Add an assert on the shader stage before using
  `workgroup_size_builtin` (Caio Marcelo de Oliveira Filho )

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9418>
2021-03-11 20:30:38 +00:00
Dylan Baker 5fee362fba docs: Remove 21.0 features from features_new.txt
I forgot to do this at branchpoint time.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9529>
2021-03-11 20:27:14 +00:00
Anuj Phogat 9d95e1bd79 i965: Rename files with "intel_" prefix to "brw_"
v2: Rename intel_batchbuffer.c to intel_batch.c and
    intel_batchbuffer.h to intel_batch.h

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9510>
2021-03-11 10:14:33 -08:00
Anuj Phogat 3096788e5c i965: Remove blank line at EOF
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9510>
2021-03-11 09:43:03 -08:00
Rhys Perry 38b2e13766 aco: remove vmem/smem score statistics
Replaced by the Latency statistic.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
2021-03-11 16:31:19 +00:00
Rhys Perry a0243f5c47 aco: add ACO_DEBUG=perfinfo
This prints the program with each instruction's contribution to it's
latency and various factors for the calculation of the Inverse Throughput
statistic.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
2021-03-11 16:31:19 +00:00
Rhys Perry 5d6a1095bf aco: add print option to print program without temporary IDs
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
2021-03-11 16:31:19 +00:00
Rhys Perry 23ecceb160 aco: add latency and inverse throughput statistics
Latency is estimanted duration of a single wave, ignoring others in the
CU. It is similar to the old cycles statistic except it it's more accurate
and considers memory operations.

The InvThroughput statistic is a combination of MaxWaves, Latency and the
portion of the wave's execution which does not use various resources.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
2021-03-11 16:31:19 +00:00
Rhys Perry 83ce9407f2 aco: add instruction classes
These should mostly match LLVM.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
2021-03-11 16:31:19 +00:00
Rhys Perry 0af7ff49fd aco: lower p_constaddr into separate instructions earlier
This allows them to be scheduled properly and simplifies the assembler a
little.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
2021-03-11 16:31:19 +00:00
Rhys Perry ab957bb899 aco: move wait_imm to aco_ir.h
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
2021-03-11 15:35:34 +00:00
Rhys Perry 7d5643c0fe aco: track divergent and uniform branch depth
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
2021-03-11 15:35:30 +00:00
Rhys Perry 8f71be0a7b aco: simplify loop_nest_depth tracking in isel
Keep track of the current loop depth in Program and set the depth inside
Program::insert_block() instead of repeating it every time we insert one.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
2021-03-11 15:35:24 +00:00
Boris Brezillon 442fbcdb47 panfrost: Expose panfrost_modifier_to_layout()
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9517>
2021-03-11 15:10:58 +00:00
Boris Brezillon 825b1f9446 panfrost: Split the sampler and texture count
The texture and sampler descriptors are well separated in Vulkan,
let's add a new field to allow mixing sampler and texture descs.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9517>
2021-03-11 15:10:58 +00:00
Boris Brezillon b0f968cf5c panfrost: Don't count the special vertex/instance ID attributes on Bifrost
On Bifrost the vertex/instance ID are preloaded in special registers,
no need to add special attribute entries.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9517>
2021-03-11 15:10:58 +00:00
Boris Brezillon 7b9dfc502a panfrost: Print the correct UBO size when dumping UBO information
There's a minus(1) modifier on the entries field. Take it into account.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9517>
2021-03-11 15:10:58 +00:00
Boris Brezillon 3559efb9bf panfrost: Allow passing an explicit UBO index for the sysval UBO
UBO index assignment is a bit special in Vulkan, it's based on the
descriptor set layout, which doesn't know about shaders' internal UBOs
(our sysval UBOs). Extend the backend compilers so we can place sysval
UBOs where we want: after all explicit UBOs.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9517>
2021-03-11 15:10:58 +00:00
Boris Brezillon 92d9f090d9 panfrost: Add a knob to disable the UBO -> push constants optimization
I'm just too lazy to implement the logic to prepare push constant
buffers in the Vulkan driver. Besides, Vulkan has explicit push
constants, which AFAIK is not handled in the compiler backends yet,
and that will probably conflict with the UBO -> push constant
promotion.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9517>
2021-03-11 15:10:57 +00:00
Lucas Stach 2229328cf9 renderonly: close the gpu fd when destroying renderonly
Currently the screen destruction closes the dup'ed fd, but not the
original renderonly gpu fd, which is kept around for the lifetime of
the renderonly.

Squashed revert of "vc4: Don't leak the GPU fd for renderonly usage."
(commit 99ef66c325) as requested by Eric.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6983>
2021-03-11 14:41:48 +00:00
Lucas Stach 187218395d renderonly: remove layering violations
The renderonly object is something the winsys creates, so the pipe
driver has no business in memcpying or freeing it. Move those bits
to the winsys.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6983>
2021-03-11 14:41:48 +00:00
Alyssa Rosenzweig 5487847d8c pan/bi: Implement u{add, sub}_sat
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>
2021-03-11 14:30:19 +00:00
Boris Brezillon 3c7634f7d2 pan/bi: Extend the bi_builder to support type variants correctly
Some opcodes come with both type and size variants. Right now, only the
size is taken into account. Extend the builder to provide wrappers that
take a nir_type in addition to the bitsize.

While at it, fix wrappers taking a compare operator to use the proper
.{i,s,u} variant based on the comparison (equal and non-equal should
use .i, other comparisons should use .{u,s}).

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>
2021-03-11 14:30:19 +00:00
Boris Brezillon 0113a0a1ee panfrost: Move pan_special_varying definition to pan_encoder.h
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>
2021-03-11 14:30:19 +00:00
Boris Brezillon 1f99bba06e panfrost: Add a pan_section_offset() helper
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>
2021-03-11 14:30:19 +00:00
Boris Brezillon 1758da0a7e panfrost: Allow passing an explicit global dependency when queuing a job
We will have 2 compute jobs per indexed indirect draw, one doing the
min-max index search and one patching the cmdstream. The second compute
job needs to depend on the first one, as well as the previous indirect
draw job to avoid corrupting the indirect draw context which is shared
at the batch level (global dependency).

Instead of handling that case in panfrost_add_job(), extend
panfrost_add_job() to accept an explicit global dependency.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>
2021-03-11 14:30:19 +00:00
Boris Brezillon 0bb091fd7c panfrost: Add a parameter to suppress next job prefetching
This is needed for indirect draws so the compute job can patch the
vertex/tiler jobs which are following in the chain.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>
2021-03-11 14:30:19 +00:00
Boris Brezillon 00b85a0aaf panfrost: Split the direct and indirect draw logic
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>
2021-03-11 14:30:19 +00:00
Boris Brezillon 691c47dd6c pan/bi: Move int64 lowering before idiv lowering
Otherwise all 64 divisions will be skipped.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>
2021-03-11 14:30:19 +00:00
Boris Brezillon f7bbfbaeb5 Revert "pan/bi: Optimize out redundant jumps to #0x0"
A block that has all its successors empty is not necessarily a leaf
block in the CFG, and removing the JUMP in that causes the shader
to continue executing code from another block instead of exiting.

This reverts commit a496b41d50.

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9520>
2021-03-11 14:30:19 +00:00
Rhys Perry 35fe62dad1 radv/llvm: fix enabled_channels for compressed exports
The old values seemed to work fine, but the ISA docs recommend 0x0,0x3,0xc
and 0xf:

COMPR==1: export half-dword enable. Valid values are: 0x0,3,c,f
[0] enables VSRC0 : R,G from one VGPR (R in low bits, G high)
[2] enables VSRC1 : B,A from one VGPR (B in low bits, A high)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9459>
2021-03-11 13:54:18 +00:00
Rhys Perry 341dd9d834 aco: set compr for fp16 exports
Obviously this didn't affect correctness. Not sure about performance.

It also changes enabled_channels to match radeonsi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: f29c81f863 ("aco: use VOP2 for v_cvt_pkrtz_f16_f32 if possible")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9459>
2021-03-11 13:54:18 +00:00
Michel Zou 73a48600b4 meson: detect winflex/bison only on native win32
we want to detect the native bison when cross-compiling

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9375>
2021-03-11 10:38:36 +00:00
Marek Olšák e6a0f243ea radeonsi: update pipe_screen::num_contexts
This allows skipping mutex locking. Don't take the aux context into account.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9356>
2021-03-11 05:05:39 +00:00
Marek Olšák 981e55d530 gallium: add pipe_screen::num_contexts for skipping mutex locking in util_range
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9356>
2021-03-11 05:05:39 +00:00
Marek Olšák 728aa749ea gallium/u_threaded: don't sync in create_stream_output_target
Manhattan needs this.

radeonsi can handle it since https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9028/diffs?commit_id=33ac9dec91d07ef353e110ac376842d84ec539b4.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9356>
2021-03-11 05:05:39 +00:00
Rob Clark c4e5beef07 freedreno: threaded_context async flush support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>
2021-03-11 04:42:16 +00:00
Rob Clark 9dbe2405a3 freedreno: threaded_context support
Currently only initialized for a6xx, mostly because that is the easiest
setup for me to test and debug at the moment.  But the couple a6xx changes
should not require counterparts in older gens.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>
2021-03-11 04:42:16 +00:00
Rob Clark 1a12d682a6 freedreno: Check cb0 in rebind_resource()
Previously we were expecting cb0 to be user_buffer.  (We did in some
cases upload it to a gpu buffer, but this was an internally allocated
buffer and not something subject to rebind.)  But with TC it becomes
a gpu buffer.

(Technically, with pctx->const_uploader, we shouldn't hit the rebind
path for cb0, but better to not try to be overly clever.. sooner or
later that would bite us.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>
2021-03-11 04:42:16 +00:00
Rob Clark 00eb60ee59 freedreno/a6xx: Move UBWC demotion to first sampler view bind
With threaded_context, CSO creation happens in the frontend thread,
which means it is no longer safe to do blits (if needed, for sampler
views with format that cannot be UBWC).  So move this to the first
time that the sampler view is bound.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>
2021-03-11 04:42:16 +00:00
Rob Clark acc2c015b3 freedreno: Add transfer_pool_unsync
With threaded_context, in the TC_TRANSFER_MAP_UNSYNC case, we are
getting called from the frontend thread, rather than driver thread.
So we need a different slab_child_pool for that.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>
2021-03-11 04:42:16 +00:00
Rob Clark 0c163e0a45 freedreno: Add fd_replace_buffer_storage()
This will be used by threaded_context to avoid stalls in the
DISCARD_WHOLE_RESOURCE case (and DISCARD_RANGE cases that can
be promoted to DISCARD_WHOLE_RESOURCE).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>
2021-03-11 04:42:16 +00:00
Rob Clark 63649e4101 freedreno: Extract out helper for transfer-map flag munging
Split out the usage simplification from main part of transfer_map and
handle the threaded-context specific TC_TRANSFER_x flags.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>
2021-03-11 04:42:16 +00:00
Rob Clark 4f07a24e41 freedreno: Extend threaded_transfer
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>
2021-03-11 04:42:16 +00:00
Rob Clark 1017dc9f6e freedreno: Extend threaded_resource
No functional change, just big churny

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9323>
2021-03-11 04:42:16 +00:00