Commit Graph

43899 Commits

Author SHA1 Message Date
Kenneth Graunke 6b2010df7d i965: Initial Ivybridge VS state.
Copied from gen6_vs_state.c; reuses create_vs_constant_bo from there.

The 3DSTATE_VS command is identical but 3DSTATE_CONSTANT_VS is not.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:59 -07:00
Kenneth Graunke 18402fbf79 i965: Initial Ivybridge Viewport state setup.
SF and CLIP viewport state has been combined into SF_CLIP_VIEWPORT;
SF_CLIP and CC state pointers can now be uploaded independently.

Some portions of the hardware documentation refer to separate upload
commands for SF and CLIP; these are outdated and incorrect.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:59 -07:00
Kenneth Graunke 81fd03fe56 i965: Initial Ivybridge Clip state setup.
Copied from gen6_clip_state.c.

This enables early culling and sets the necessary fields.  Otherwise, it
is entirely the same, so I doubt this patch is strictly necessary for a
functional driver.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:59 -07:00
Kenneth Graunke 24d0ed72c1 i965: Initial Ivybridge CC state setup.
The state itself still seems to be the same; the only change is that
each part (CC, BLEND, DEPTH_STENCIL) can now be uploaded independently.
Thus, we still rely on the code in gen6_cc.c to set up the state.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:59 -07:00
Kenneth Graunke a924d69b57 i965: Initial Ivybridge WM/PS state setup.
Copied from gen6_wm_state.c.

The main change from Sandybridge seems to be that 3DSTATE_WM was split
into two separate state packet commands: 3DSTATE_WM and 3DSTATE_PS.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:59 -07:00
Kenneth Graunke 7d608d0c33 i965: Initial Ivybridge SF/SBE state setup.
Copied from gen6_sf_state.c.

The main change from Sandybridge seems to be that 3DSTATE_SF was split
into two separate state packet commands: 3DSTATE_SF and 3DSTATE_SBE
("setup backend").  The bit-offsets are even the same - only the DWords
numbers have shuffled around a bit.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:59 -07:00
Kenneth Graunke 3dc4bc1f78 i965: Make gen6_sf_state.c's get_attr_override non-static.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:59 -07:00
Kenneth Graunke 8832920c29 i965: Initial Ivybridge URB space partitioning, including push constants.
Currently this always reserves 16kB for push constants, regardless of
how much space is needed, and partitions it evenly betwen the VS and FS.
This is probably not ideal, but is straightforward.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:58 -07:00
Kenneth Graunke 477e2fe031 i965: Set maximum number of threads for Ivybridge.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:58 -07:00
Kenneth Graunke 235fa21a09 i965: Split out tracked state atoms for Ivybridge.
Currently, gen7_atoms is a verbatim copy of gen6_atoms; future commits
will update it to contain gen7-specific state.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:58 -07:00
Kenneth Graunke 89a82d72ca intel: Initial IS_GEN7 plumbing.
Currently, IS_GEN7, IS_IVYBRIDGE, IS_IVB_GT1, and IS_IVB_GT2 all return
false.  This allows me to write the code for them before actually adding
the PCI IDs and thus enabling the hardware.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:58 -07:00
Kenneth Graunke d55471768e i965: Rename max_vs_handles to max_vs_entries for consistency.
The documentation uses the term "vertex URB entries", the code talks
about "entry size", and so on.  Also, handles are just "pointers" to
entries (actually small integers).

Also rename max_gs_handles to max_gs_entries.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:58 -07:00
Kenneth Graunke d0f0d06482 i965: Convert BRW_NEW_* dirty bits to use an enum.
This will make it much easier to add new dirty bits.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2011-05-17 23:32:58 -07:00
Kenneth Graunke c638180fc7 i965: Rework IF/ELSE jump target back-patching.
The primary motivation for this is to better support Ivybridge control
flow.  Ivybridge IF instructions need to point to the first instruction
of the ELSE block -and- the ENDIF instruction; the existing code only
supported back-patching one instruction ago.

A second goal is to simplify and centralize the back-patching, hopefully
clarifying the code somewhat.

Previously, brw_ELSE back-patched the IF instruction, and brw_ENDIF
back-patched the previous instruction (IF or ELSE).  With this patch,
brw_ENDIF is responsible for patching both the IF and (optional) ELSE.

To support this, the control flow stack (if_stack) maintains pointers to
both the IF and ELSE instructions.  Unfortunately, in single program
flow (SPF) mode, both were emitted as ADD instructions, and thus
indistinguishable.

To remedy this, this patch simply emits IF and ELSE, rather than ADDs;
brw_ENDIF will convert them to ADDs (the SPF version of back-patching).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:58 -07:00
Kenneth Graunke 5936d96d33 i965: Move IF stack handling into the EU abstraction layer/brw_compile.
This hides the IF stack and back-patching of IF/ELSE instructions from
each of the code generators, greatly simplifying the interface.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:58 -07:00
Kenneth Graunke 774fb90db3 i965: Get a ralloc context into brw_compile.
This would be so much easier if we were using C++; we could simply use
constructors and destructors.  Instead, we have to update all the
callers.

While we're at it, ralloc various brw_wm_compile fields rather than
explicitly calloc/free'ing them.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:58 -07:00
Kenneth Graunke ebeea98573 i965/gs: Move generation check for bailing earlier.
On Sandybridge, we don't need to break down primitives.  There's no need
to bother setting up brw_compile and such if it's not going to be used;
bail as early as possible.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:32:57 -07:00
Kenneth Graunke c6175d7870 i965: Add _NEW_LIGHT to Gen6 clip state dirty bits.
ctx->Light.ProvokingVertex depends on _NEW_LIGHT.

Found by inspection.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-17 23:30:46 -07:00
Brian Paul 3559440873 mesa: add some missing GLAPIENTRY keywords
NOTE: this is a candidate for the 7.10 branch.
2011-05-17 21:24:05 -06:00
Tom Stellard 217cd216ea r300/compiler: Fix bug in rc_get_variables()
Variables that write to the same source select need to pe paired
together otherwise the register allocator might fail.

https://bugs.freedesktop.org/show_bug.cgi?id=36753
2011-05-17 19:13:47 -07:00
Marek Olšák 390196ecc7 u_vbuf_mgr: fix max_index computation when src_offset is abused as buffer_offset 2011-05-17 01:21:30 +02:00
Marek Olšák a3ac28a736 mesa: make RGB9_E5 non-renderable on swrast again
_BaseFormat for RGB9_E5 is GL_RGBA due to the previous revert.
2011-05-17 00:13:43 +02:00
Marek Olšák 947190ab4b Revert "mesa: set reasonable defaults in update_wrapper"
This reverts commit 1d5f16ff8f.

It breaks fbo-readpixels on swrast.
For some reason, swrast likes GL_RGBA and CHAN_TYPE.
2011-05-17 00:13:43 +02:00
Kenneth Graunke 1309d2ea72 i965: Pass brw_compile pointer to brw_set_src[01].
This makes it symmetric with brw_set_dest, which is convenient, and will
also allow for assertions to be made based off of intel->gen.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-16 13:30:16 -07:00
Kenneth Graunke 2b8e7215eb i965: Fix "Paramater" typo in gen6_wm_state.c.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2011-05-16 09:41:00 -07:00
Benjamin Franzke b8033a5651 egl: Compile wayland-drm.a into libEGL independent of egl_dri2
Fixes egl_gallium when egl_dri2 is not enabled.
2011-05-16 10:36:36 +02:00
Dave Airlie c9aa3bbda4 st/mesa: overhaul vertex/fragment sampler and sampler views.
This fixes piglits fragment-and-vertex-texturing test on llvmpipe for me.

I've no idea if someone had another plan for this that is smarter than what
I've done here, but what I've basically done is

split fragment and vertex sampler and sampler_view setup function, factor
out the common chunks of both.

side-cleanups:
drop st->state.sampler_list - unused
don't update border color if we have no border color.

should fix https://bugs.freedesktop.org/show_bug.cgi?id=35849

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2011-05-16 06:40:26 +10:00
Dave Airlie bc16c73407 gallium: block signals for new thread when spawning threads
I'm hard pressed to think of any reason a gallium thread would want to
receive a signal, especially considering its probably loaded as a library
and you don't want the threads interfering with the main threads signal
handling.

This solves a problem loading llvmpipe into the X server for AIGLX,
where the X server relies on the SIGIO signal going to the main thread,
but once llvmpipe loads the SIGIO can end up in any of its threads.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-05-16 06:40:26 +10:00
Dave Airlie bd5b7a6f71 r600g: reduce flushes so only when texture and CB overlap.
We only need to do this when the texture and CB are using the
same memory area.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-05-15 18:09:15 +10:00
Tom Stellard 6d539579ad r300/compiler: Use ALU Result for IF conditionals
This saves one instruction per IF.
2011-05-14 22:35:28 -07:00
Marek Olšák 8a4136f624 r300g: HiZ fixes
Nothing special, just changing conditions for when HiZ can be enabled and
when HiZ memory becomes invalid.

I was thinking about it again and realized it had not been quite right.
2011-05-15 03:28:32 +02:00
Marek Olšák 19f59dd413 r300g: don't set other HyperZ states if depth and stencil tests are disabled
Such as HiZ.
2011-05-15 03:28:32 +02:00
Marek Olšák fdd37af3f7 r300g: dynamically ask for and release Hyper-Z access
We ask for Hyper-Z access when clearing a zbuffer.
We release it if no zbuffer clear has been done for 2 seconds.
2011-05-15 03:28:32 +02:00
Marek Olšák 904f43f190 r300g: fix conversion from int to boolean 2011-05-15 03:26:29 +02:00
Marek Olšák 51095f74cf u_vbuf_mgr: fix max_index computation once again
See how I compute and use the 'unused' variable in the code.
It's crucial for getting max_index right.

Fixed with the help of apitrace.
(bisecting the problematic draw call manually was not fun though)

This should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=36268
https://bugs.freedesktop.org/show_bug.cgi?id=36609
2011-05-14 20:03:03 +02:00
Marek Olšák ad2999d211 st/mesa: set correct baseInternalFormat for _mesa_texstore in DrawPixels
GL_RGBA was always used for baseInternalFormat regardless of the chosen
texture internal format.

https://bugs.freedesktop.org/show_bug.cgi?id=37154

Reviewed-by: Brian Paul <brianp@vmware.com>
2011-05-14 01:53:30 +02:00
Kenneth Graunke 2bba244329 i965: Use BRW_DATAPORT_READ_TARGET_DATA_CACHE instead of 0.
Using the #define'd constant is better than 0 with a comment.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2011-05-13 15:20:52 -07:00
Kenneth Graunke c77855d64e i965: Rename dp_render_target struct to gen6_dp.
This is actually just the message descriptor for Gen6+ dataport access;
it has nothing to do with the render cache.  Access to the sampler cache
and constant cache also would use this struct; rename for clarity.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-13 15:20:45 -07:00
Kenneth Graunke 17eaff77b0 i965: Attempt to un-muddle Gen6 data port message target defines.
These are documented on page 245 of IHD_OS_Vol4_Part2.pdf (the public
Sandybridge documentation/SEND instruction description).

Somebody had the bright idea to reuse gen4/5 defines labelled READ/WRITE
which just happened to be the same values as Render Cache/Sampler Cache.
It turns out that this field has nothing to do with READ/WRITE on
Sandybridge, but rather represents which data port to direct it to.

This was especially confusing in brw_set_dp_read_message, which
used "BRW_MESSAGE_TARGET_DATAPORT_WRITE."  In a read function.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-05-13 15:19:31 -07:00
Christoph Bumiller 5f5d486717 nvc0: prevent overlap between load address and destination regs
For example, an indirect load like "ld b128 $r0q c0[$r0]" seems to
overwrite the address register before finishing the load, but only
if there are a lot of threads running.

Visible as displaced geoemtry in Unigine Heaven.
2011-05-13 18:47:54 +02:00
Marek Olšák dd445ae120 docs: update relnotes-7.11 2011-05-13 18:10:30 +02:00
Marek Olšák e28e3a774c st/mesa: expose ARB_shader_texture_lod if SM3 is supported
Reviewed-by: Brian Paul <brianp@vmware.com>
2011-05-13 17:57:56 +02:00
Matt Turner fae77579ad util_logbase2 takes and returns unsigned, not int
Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Brian Paul <brianp@vmware.com>
2011-05-12 16:37:50 -06:00
Matt Turner c5ac8a8aa2 Remove redundant util_unsigned_logbase2
util_logbase2 is exactly the same function.

Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Brian Paul <brianp@vmware.com>
2011-05-12 16:37:34 -06:00
Matt Turner 48a0a096f8 u_math.h: Remove redundant mingw32 ffs definition
Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Brian Paul <brianp@vmware.com>
2011-05-12 16:37:20 -06:00
Benjamin Franzke 184bb09ff5 st/egl: Implement EGL_WL_bind_wayland_display for x11,drm,wayland 2011-05-13 09:31:10 -04:00
Benjamin Franzke 83c68758be egl_dri2: Discard similar configs 2011-05-13 09:31:09 -04:00
Kristian Høgsberg 93aea63a33 egl_dri2: Make it possible to not compile in the X11 platform 2011-05-13 09:31:09 -04:00
Francesco Marella 64e3cd0c42 nvfx: fill some PIPE_CAPs
Signed-off-by: Francesco Marella <francesco.marella@gmail.com>
2011-05-13 14:56:40 +02:00
Kenneth Graunke f247b2d633 i965: Fix incorrectly named data port define.
According to my documentation this is actually "Media Block Write" on
Gen4-5; there has never been a "DWord Block Write."

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2011-05-13 08:36:07 -07:00