Commit Graph

86197 Commits

Author SHA1 Message Date
Adam Jackson afaaf623d4 glx/glvnd: Use bsearch() in FindGLXFunction instead of open-coding it
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2016-11-02 14:52:43 -04:00
Adam Jackson 8bca8d89ef glx/glvnd: Fix dispatch function names and indices
As this array was not actually sorted, FindGLXFunction's binary search
would only sometimes work.

Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2016-11-02 14:52:38 -04:00
Adam Jackson deb0eb1660 glx/glvnd: Don't modify the dummy slot in the dispatch table
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2016-11-02 14:52:31 -04:00
Jason Ekstrand 71cc1e188d anv/pipeline: Properly cache prog_data::param
Before we were caching the prog data but we weren't doing anything with
brw_stage_prog_data::param so anything with push constants wasn't getting
cached properly.  This commit fixes that.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
2016-11-02 09:32:28 -07:00
Jason Ekstrand ff3185e3ba anv/pipeline: Put actual pointers in anv_shader_bin
While we can simply calculate offsets to get to things such as the
prog_data and the key, it's much more user-friendly if there are just
pointers.  Also, it's a bit more fool-proof.

While we're at it, we rework the pipeline cache API to use the
brw_stage_prog_data type directly.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
2016-11-02 09:32:22 -07:00
Jason Ekstrand 4306c10a88 intel/blorp: Pass a brw_stage_prog_data to upload_shader
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
2016-11-02 09:32:19 -07:00
Jason Ekstrand 058304f081 intel/blorp: Use wm_prog_data instead of hand-rolling our own
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
2016-11-02 09:32:15 -07:00
Jason Ekstrand a5f8ff6ca1 anv: Better handle return codes from anv_physical_device_init
The case where we just want the loop to continue is INCOMPATIBLE_DRIVER
because that simply means that whatever FD we opened isn't a supported
Intel chip.  Other error codes such as OUT_OF_HOST_MEMORY are actual errors
and we should be returning early in that case.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
2016-11-02 09:26:41 -07:00
Jason Ekstrand daeb21e478 vulkan/wsi/x11: Clean up connections in finish_wsi
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
2016-11-02 09:26:36 -07:00
Jason Ekstrand fc0e9e3e40 vulkan/wsi/x11: Better handle wsi_x11_connection_create failure
Without this fix, the function would still end up returning NULL but it
would put that NULL connection in the hash table which would be bad.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
2016-11-02 09:25:57 -07:00
Chih-Wei Huang e3e5b1a488 android: avoid using libdrm with host modules
Note LOCAL_CFLAGS and LOCAL_SHARED_LIBRARIES in Android.common.mk
are used by both host and target modules. However, commit 112e988
moved libdrm related flags to common. It causes the errors like:

error: 'out/host/linux-x86/obj32/SHARED_LIBRARIES/libdrm_intermediates/export_includes',
needed by 'out/host/linux-x86/obj32/EXECUTABLES/mesa_gen_matypes_intermediates/import_includes',
missing and no known rule to make it

No reason to use libdrm with host modules.

Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Fixes: 112e988329 ("Android: move libdrm settings to top-level
Android.common.mk")
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-11-02 14:43:26 +00:00
Nicolai Hähnle 1ef505bb02 glsl: compute lvalues of [in]out parameters before inlined function body
This is required when an out argument involves an array index that is either
a global variable modified by the function or another out argument in the
same function call.

Fixes the shaders/out-parameter-indexing/vs-inout-index-inout-* tests.

v2:
- modify the ir_dereference_array nodes in place
- use ir_hierarchical_visitor
v3: use base_ir (Ian Romanick)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-11-02 12:32:47 +01:00
Nicolai Hähnle 5aef14932a radeonsi: fix BFE/BFI lowering for GLSL semantics
Fixes spec/arb_gpu_shader5/execution/built-in-functions/*-bitfield{Extract,Insert}

Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-11-02 12:30:11 +01:00
Nicolai Hähnle 6526977306 tgsi: align the definition of BFI & [UI]BFE with GLSL
As previously written, these opcodes use the SM5 semantics which is
incompatible with GLSL when bits == 0, offset == 32.

At some point we may want to add BFI_SM5 etc. opcodes, but all users
currently either want (and expect!) the GLSL semantics or don't care.

Bitfield inserts are generated by the GLSL lower_instructions and
lower_packing_builtins passes with constant bits and offset arguments,
so any workaround code that drivers may have to emit to follow GLSL
semantics should be optimized away easily for those uses.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-11-02 12:30:07 +01:00
Dave Airlie 9f0726f3e5 radv: expose xlib platform extension
I missed this when I added the xlib code, this allows
dolphin emu to start and crash later.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-11-02 10:00:38 +10:00
Lionel Landwerlin a28db12e21 intel: aubinator: print field values if available
Turning this :

sampler state 0
    Sampler Disable: false
    Texture Border Color Mode: 0
    LOD PreClamp Enable: 1
    Base Mip Level: 0.000000
    Mip Mode Filter: 0
    Mag Mode Filter: 1
    Min Mode Filter: 1
    Texture LOD Bias: foo
    Anisotropic Algorithm: 0

into this :

sampler state 0
    Sampler Disable: false
    Texture Border Color Mode: 0 (DX10/OGL)
    LOD PreClamp Enable: 1 (OGL)
    Base Mip Level: 0.000000
    Mip Mode Filter: 0 (NONE)
    Mag Mode Filter: 1 (LINEAR)
    Min Mode Filter: 1 (LINEAR)
    Texture LOD Bias: foo
    Anisotropic Algorithm: 0 (LEGACY)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sirisha Gandikota<sirisha.gandikota@intel.com>
2016-11-01 22:37:56 +00:00
Lionel Landwerlin 74c4c84482 intel: aubinator: load fields values from xml data
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sirisha Gandikota<sirisha.gandikota@intel.com>
2016-11-01 22:37:52 +00:00
Lionel Landwerlin c8806eeefc intel: aubinator: print boolean fields to true with colors
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sirisha Gandikota<sirisha.gandikota@intel.com>
2016-11-01 22:37:22 +00:00
Marek Olšák d3244c47ce amd: fix a typo in PIXEL_PIPE_STAT_RESET definition
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-01 22:33:13 +01:00
Marek Olšák 7786f8c635 gallium/radeon: add enum radeon_micro_mode
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-01 22:33:13 +01:00
Marek Olšák 1a4e0162fc gallium/radeon: make it clear that DRM 2.x.x fast clear constraint is CIK-only
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-01 22:33:13 +01:00
Marek Olšák e3697b4be6 gallium/radeon: remove r600_surface::level_info
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-01 22:33:13 +01:00
Marek Olšák bf4d102ea3 gallium/radeon: add radeon_surf::is_linear
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-01 22:33:13 +01:00
Marek Olšák e9c76eeeaa gallium/radeon: remove radeon_surf_level::pitch_bytes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-01 22:33:13 +01:00
Marek Olšák c66a550385 gallium/radeon: don't call u_format helpers if we have that info already
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-01 22:33:13 +01:00
Marek Olšák 692f2640ab gallium/radeon: replace radeon_surf_info::dcc_enabled with num_dcc_levels
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-01 22:33:13 +01:00
Marek Olšák 315eb0acb4 radeonsi: add a driver query for counting CP DMA calls
CP DMA calls are synchronous with regard to shaders, but can be made
asynchronous if needed.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-01 22:33:13 +01:00
Marek Olšák d268b7f95e radeonsi: add a driver query for shader cache hits
This is an 8-month old patch.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-01 22:33:13 +01:00
Marek Olšák 6b309f7368 gbm: set up the interop extension for egl/drm
breaking libgbm -> libEGL ABI?

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-11-01 22:33:13 +01:00
Samuel Pitoiset 8bfd65395e nvc0: do not duplicate similar performance metrics
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
2016-11-01 19:03:26 +01:00
Emil Velikov bc4c09dc99 docs: add news item and link release notes for 13.0.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-11-01 16:09:13 +00:00
Emil Velikov 631fa587e1 docs: add sha256 checksums for 13.0.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 405dd26860719d800ed6134f8f985f1525f25502)
2016-11-01 16:07:26 +00:00
Emil Velikov e205c265c8 docs: Update 13.0.0 release notes
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit df1b0a5a86bab8cd138f504942198a300753b005)
2016-11-01 16:07:24 +00:00
Jason Ekstrand c41ec1679f anv/device: Return DEVICE_LOST if execbuf2 fails
This makes more sense than OUT_OF_HOST_MEMORY.  Technically, you can
recover from a failed execbuf2 but the batch you just submitted didn't
fully execute so things are in an ill-defined state.  The app doesn't want
to continue from that point anyway.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-11-01 07:54:52 -07:00
Antia Puentes 61a8a55f55 i965/gen8: Fix vertex attrib upload for dvec3/4 shader inputs
The emission of vertex attributes corresponding to dvec3 and dvec4
vertex shader input variables was not correct when the <size> passed
to the VertexAttribL* commands was <= 2.

This was because we were using the vertex array size when emitting vertices
to decide if we uploaded a 64-bit floating point attribute as 1 slot (128-bits)
for sizes 1 and 2, or 2 slots (256-bits) for sizes 3 and 4. This caused problems
when mapping the input variables to registers because, for deciding which
registers contain the values uploaded for a certain variable, we use the size
and type given to the variable in the shader, so we will be assigning 256-bits
to dvec3/4 variables, even if we only uploaded 128-bits for them, which happened
when the vertex array size was <= 2.

The patch uses the shader information to only emit as 128-bits those 64-bit floating
point variables that were declared as double or dvec2 in the vertex shader. Dvec3 and
dvec4 variables will be always uploaded as 256-bits, independently of the <size> given
to the VertexAttribL* command.

From the ARB_vertex_attrib_64bit specification:

   "For the 64-bit double precision types listed in Table X.1, no default
    attribute values are provided if the values of the vertex attribute variable
    are specified with fewer components than required for the attribute
    variable. For example, the fourth component of a variable of type dvec4
    will be undefined if specified using VertexAttribL3dv or using a vertex
    array specified with VertexAttribLPointer and a size of three."

We are filling these unspecified components with zeros, which coincidentally is
also what the GL44-CTS.vertex_attrib_binding.basic-inputL-case1 expects.

v2: Do not use bitcount (Kenneth Graunke)

Fixes: GL44-CTS.vertex_attrib_binding.basic-inputL-case1 test

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97287
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-11-01 09:39:09 +01:00
Dave Airlie f88ea8c72a radv: drop some unused cmask info members.
These were assigned but never used.

Inspired by similiar patch in radeonsi.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-11-01 15:11:35 +10:00
Lionel Landwerlin 1b88760f85 intel: aubinator: fix printing missing gen option
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-10-31 22:03:13 +00:00
Lionel Landwerlin 46d67799a6 intel: aubinator: fix assumptions on amount of required data
We require 12 bytes of headers but in some cases we just need 4.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-10-31 22:03:09 +00:00
Lionel Landwerlin 6f05b69572 intel: aubinator: don't print out blocks twice
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-10-31 22:02:41 +00:00
Nanley Chery e9a25e0247 i965: Move gen8_disable_stages to brw_upload_initial_gpu_state
3DSTATE_WM_CHROMAKEY isn't programmed anywhere else.
3DSTATE_WM_HZ_OP is programmed, then cleared by blorp during a
HZ op, so repeatedly clearing it after every blorp execution is
redundant.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-10-31 13:20:05 -07:00
Nanley Chery 477ea60b68 i965: Program 3DSTATE_AA_LINE_PARAMETERS in upload_invariant_state
This packet is non-pipelined and doesn't ever change across emissions.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-10-31 13:20:00 -07:00
Leo Liu 06e3cd6a45 st/omx/dec: disable tunnel for size different case
When the video coded size is different from frame size, we need the result
buffers are same as coded size, which are not size compatible with encode
required size, so that simply use no tunnel for this case instead of frame
by frame converting.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
2016-10-31 11:45:29 -04:00
Leo Liu d9b2c4048d st/omx/dec: result buffers size should match codec decoder size
Otherwise fails the check of matching between decoder size and buffers
size in kernel.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
2016-10-31 11:45:14 -04:00
George Kyriazis 55fb874376 swr: [rasterizer] added EventHandlerFile contructor
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-10-31 09:06:29 -05:00
George Kyriazis 0a5811b0f3 swr: [rasterizer core] Frontend dependency work
Add frontend dependency concept in the DRAW_CONTEXT, which
allows serialization of frontend work if necessary.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-10-31 09:06:21 -05:00
George Kyriazis 06f93d0329 swr: [rasterizer core] Refactor/cleanup backends
Used for common code reuse and simplification

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-10-31 09:06:15 -05:00
George Kyriazis 78a0a09e48 swr: [rasterizer core] Remove deprecated simd intrinsics
Used in abandoned all-or-nothing approach to converting to AVX512

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-10-31 09:06:08 -05:00
George Kyriazis 1a3ed86348 swr: [rasterizer archrast] Add thread tags to event files.
This allows the post-processor to easily detect the API thread and to
process frame information. The frame information is needed to
optimized how data is processed from worker threads.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-10-31 09:05:25 -05:00
Marek Olšák 7a2387c3e0 glsl: use a non-malloc'd storage for short ir_variable names
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-31 11:53:38 +01:00
Marek Olšák 21e11b5282 glsl: use the linear allocator in opt_constant_propagation
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-31 11:53:38 +01:00