Commit Graph

95385 Commits

Author SHA1 Message Date
Jason Ekstrand ae8365a9eb vulkan/util: Add a vk_zalloc helper
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-08-28 18:35:33 -07:00
Jason Ekstrand caa71343c6 anv: Rename anv_fence_state to anv_bo_fence_state
It only applies to legacy BO fences.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-08-28 18:35:30 -07:00
Jason Ekstrand 92286dc08a anv: Pull the guts of anv_fence into anv_fence_impl
This is just a refactor, similar to what we did for semaphores, in
preparation for handling VK_KHR_external_fence.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-08-28 18:35:27 -07:00
Jason Ekstrand 738e5e3c1d anv/wsi: Use QueueSubmit to trigger the fence in AcquireNextImage
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-08-28 18:35:25 -07:00
Jason Ekstrand f992bb205c anv: Rework fences to work more like BO semaphores
This commit changes fences to work a bit more like BO semaphores.
Instead of the fence being a batch, it's simply a BO that gets added
to the validation list for the last execbuf call in the QueueSubmit
operation.  It's a bit annoying finding the last submit in the execbuf
but this allows us to avoid the dummy execbuf.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-08-28 18:35:22 -07:00
Jason Ekstrand 2eacfdeec9 anv/queue: Allow temporary import of SYNC_FD semaphores
We didn't allow them before because it didn't look like the spec allowed
it.  It certainly doesn't make much sense.  However, there are CTS tests
that apparently hit this.  What the spec actually says is:

    "Importing a payload using handle types with copy transference
    creates a duplicate copy of the payload at the time of import, but
    makes no further reference to it. Fence signaling, waiting, and
    resetting operations performed on the target of copy imports must
    not affect any other fence or payload."

A SYNC_FD has copy transference but the import may be temporary or
permanent.  If you do a permanent import of something with copy
transference, I guess it's supposed to work and end up resetting the
permanent state.  In any case, there seems to be no real harm in
allowing it, so why not.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-08-28 18:34:06 -07:00
Kenneth Graunke a106ae111c i965: Fix whitespace issues in intel_buffer_objects.c.
Convert tabs to spaces and rewrap one long line.
2017-08-28 17:11:02 -07:00
Timothy Arceri 0168d1f449 radeonsi: stop leaking nir
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-29 09:46:29 +10:00
Grazvydas Ignotas 29f46488cc ac/nir: remove misleading condition
location is never set to INTERP_SAMPLE, and Nicolai comments:
"... that part is misleading. location refers to the base location, not
the final location of the sample, and it can never be INTERP_SAMPLE."

Suggested-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
2017-08-29 01:36:57 +03:00
Grazvydas Ignotas 2b4e31bc9b ac/nir: silence maybe-uninitialized warnings
These are likely false positives, but are also annoying because they
show up on every "make install", which causes ac_nir_to_llvm to be
rebuilt here. Initializing those variables to NULL should be harmless
even when unnecessary.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-29 01:16:58 +03:00
Grazvydas Ignotas 7780374833 radv: clear dynamic_shader_stages on create
Valgrind reports it's being used uninitialized.

Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-08-29 01:11:02 +03:00
Grazvydas Ignotas 15800180f3 amd: add .editorconfig
amd/common/ and amd/vulkan/ are using tabs for indent, which doesn't
match the settings in root .editorconfig, so let's override.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-29 01:08:58 +03:00
Marek Olšák 9c92e82b32 radeonsi: rewrite late alloc VS limit computation
This is still very simple, but it's better than before.

Loosely ported from Vulkan.
2017-08-28 21:45:33 +02:00
Marek Olšák 39205f216e gallium/radeon: set EVENT_WRITE_EOP.INT_SEL = wait for write confirmation
Ported from Vulkan.
Not sure what this is good for.. maybe write confirmation from L2 flushes?

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-28 21:45:33 +02:00
Marek Olšák 61187c1689 gallium/u_threaded: rename IGNORE_VALID_RANGE -> NO_INFER_UNSYNCHRONIZED
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-28 21:45:33 +02:00
Marek Olšák 28c4c55810 gallium/u_threaded: disallow discard_range if map_buffer is unsynchronized
The discard range codepath takes precedence, so if we get both
unsynchronized and discard_range, choose unsynchronized.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-28 21:45:32 +02:00
Jason Ekstrand 63e79a8a77 nir: Fix system_value_from_intrinsic for subgroups
A couple of the cases were backwards

Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2017-08-28 08:57:52 -07:00
Jason Ekstrand 79d8d6b022 nir: Fix some whatespace
Somehow tabs got in there...

Reviewed-by: Matt Turner <mattst88@gmail.com>
2017-08-28 08:57:31 -07:00
Marek Olšák f173efe916 radeonsi: correct maximum wave count per SIMD
v2: don't special-case Tonga and Iceland.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-28 16:33:24 +02:00
Andres Gomez ff430ec4fd docs: update calendar, add news item and link release notes for 17.1.8
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-08-28 16:31:13 +03:00
Andres Gomez a26dccd131 docs: add sha256 checksums for 17.1.8
Signed-off-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 44e008e85efe141087d8ebe52e273e0020029481)
2017-08-28 16:29:00 +03:00
Andres Gomez 0444024556 docs: add release notes for 17.1.8
Signed-off-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit e644f9996b36598e4b24a359343096886b2333d0)
2017-08-28 16:28:59 +03:00
Ilia Mirkin ae53bff8b1 st/mesa: fix handling of vertex array double inputs
The is_double_vertex_input needs to be set for arrays of doubles as
well.

Fixes KHR-GL45.enhanced_layouts.varying_array_locations

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
2017-08-28 09:07:40 -04:00
Ilia Mirkin eefeff09a7 glsl: fix counting of vertex shader output slots used by explicit vars
The argument to count_attribute_slots should only be set to true for
vertex inputs, not for all vertex shader varyings.

Fixes KHR-GL45.enhanced_layouts.varying_locations

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Cc: mesa-stable@lists.freedesktop.org
2017-08-28 09:07:40 -04:00
Topi Pohjolainen 5dd072380a intel/compiler: Cast reg types explicitly
Makes coverity happier.

CID: 1416799
Fixes: c1ac1a3d25 (i965: Add a brw_hw_type_to_reg_type() function)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-08-28 14:43:39 +03:00
Gwan-gyeong Mun c261bc11e6 gallium/docs: Fix an inequality sign of TGSI_SEMANTIC_SUBGROUP_LT_MASK
A previous expression presents same as TGSI_SEMANTIC_SUBGROUP_GT_MASK.
It fixes a direction of an inequality for TGSI_SEMANTIC_SUBGROUP_LT_MASK.

before:
  bit index > TGSI_SEMANTIC_SUBGROUP_INVOCATION

after:
  bit index < TGSI_SEMANTIC_SUBGROUP_INVOCATION

Signed-off-by: Mun Gwan-gyeong <elongbug@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-28 12:05:44 +02:00
Samuel Pitoiset 5ba443b246 radv: propagate VK_ERROR_OUT_OF_HOST_MEMORY to vk{Begin,End}CommandBuffer()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-08-28 11:25:47 +02:00
Samuel Pitoiset 2bc3d65690 radv: rename record_fail to record_result and use VkResult
This will allow to propagate VK_ERROR_OUT_OF_HOST_MEMORY to
vkEndCommandBuffer() when necessary.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-08-28 11:25:44 +02:00
Gwan-gyeong Mun db91b8536e gallium/docs: fix a typo
Signed-off-by: Mun Gwan-gyeong <elongbug@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-28 10:33:42 +02:00
Eduardo Lima Mitev 1d8111ebac i915g: Remove a few unused variables
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-08-28 08:59:50 +02:00
Timothy Arceri 2422124f6e disk_cache: assert if a cache entries keys don't match mesa
In ef42423e7b I enabled the check for release builds however we
still want to assert in debug builds in case of collisions or
just general bugs with the key building/compare code. Otherwise
it will just fail silently effectively disabling the cache.

Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
2017-08-28 09:29:15 +10:00
Marek Olšák d500c9b060 Revert "radeonsi: get the raster config from AMDGPU on SI"
This reverts commit fc99cb3c9e.

"The performance went down from 64.7 to 51.4 fps in Valley and from 30.8 to
25.1 fps in Heaven on Radeon HD 7970. Other games seem to have also a 10-25%
performance decrease."

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102429

It looks like we can't use the raster config values from the kernel.
2017-08-27 22:27:23 +02:00
Dave Airlie 9573bd70e1 radv/wsi: Compute correct row_pitch for GFX9.
(commit split out by Bas Nieuwenhuizen)

Fixes: 65477bae9c "radv: enable GFX9 on radv"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-08-27 01:19:27 +02:00
Christian Gmeiner 67fc3e37a7 etnaviv: use correct param for etna_compatible_rs_format(..)
Found by code inspection.

Fixes: c9e8b49b88 ("etnaviv: gallium driver for Vivante GPUs")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-08-26 17:20:39 +02:00
Emil Velikov f0d053cb6d egl: don't NULL deref the .get_capabilities function pointer
One could easily introduce version 3 of the DRI2fenceExtension,
extending the struct, while not implementing the above function.

Thus we'll end up with NULL pointer, and dereferencing it won't fare
too well.

Fixes: 0201f01dc4 ("egl: add EGL_ANDROID_native_fence_sync")
Cc: Rob Clark <robclark@freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2017-08-26 11:22:17 +01:00
Emil Velikov 10524d105d mapi/gen: remove shebang from the marshal generator scripts
The scripts are invoked with the correct version of python and are
missing the execute bit.

Follow the rest of Mesa and drop the shebang line.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-26 11:20:08 +01:00
Emil Velikov e396265368 dri_interface.h: add missing stdint.h include
Required for uint32_t and friends.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-26 11:20:07 +01:00
Emil Velikov 98030f92e8 xmlconfig: use the portable __VA_ARGS__
Follow the example used through mesa and use "..." + "__VA_ARGS__".
The former tends to be more common and portable.

v2: use ##__VA_ARGS__ (Eric)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-26 11:20:06 +01:00
Brian Paul d819b1fcec gallium/vbuf: fix buffer reference bugs
In two places we called pipe_resource_reference() to remove a reference
to a vertex buffer resource.  But we neglected to check if the buffer was
a user buffer and not a pipe_resource.  This caused us to pass an invalid
pipe_resource pointer to pipe_resource_reference().

Instead of calling pipe_resource_reference(&vbuf->resource, NULL), use
pipe_vertex_buffer_unreference(&vbuf) which checks the is_user_buffer
field and does the right thing.

Also, explicity set the is_user_buffer field to false after setting the
vbuf->resource pointer to out_buffer.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102377
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-08-25 20:26:52 -06:00
Andres Gomez 42d62e61bc docs: add an additional final cycle for 17.1
Cc: Emil Velikov <emil.velikov@collabora.com>
Cc: Juan A. Suarez Romero <jasuarez@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-08-26 00:49:50 +03:00
Andres Gomez 8e07ad1e31 docs: remove released and extend the calendar until the end of 2017
Completed the 17.2 cycle and added the beginning of the 17.3 one.

v2: Add 17.2-rc6 as tentative final version to be promoted to 17.2.0
    final (Eric).

Cc: Emil Velikov <emil.velikov@collabora.com>
Cc: Juan A. Suarez Romero <jasuarez@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-08-26 00:47:40 +03:00
Bas Nieuwenhuizen 9b7e663da1 radv: Fix sparse BO mapping merging.
If we merge a mapping with the mapping before it, we also need
to not only change the offset, but also the bo offset.

Fixes: 715df30a4e "radv/amdgpu: Add winsys implementation of virtual buffers."
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-08-25 22:47:49 +02:00
Bas Nieuwenhuizen fba0e07869 radv: Fix off by one in MAX_VBS assert.
e.g. 0 + 32 <= 32 should be valid.

Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-08-25 22:47:49 +02:00
Bas Nieuwenhuizen bd81cb3206 radv: Don't set a new subpass on compute resolve.
We don't use the render path so totally unneeded.

Fixes: 19be95f71e "radv: add subpass resolve compute path"
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-08-25 22:47:49 +02:00
Bas Nieuwenhuizen e5c4e10769 radv: Remove some intel comments from the resolve code.
These are clearly not applicable to radv.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-08-25 22:47:49 +02:00
Adam Jackson cd8ab40cd4 egl/drm: Don't "fall back" to /dev/dri/card0 if the first open fails
The snprintf stuff here already constructs the right name for the device
node, and if it doesn't, you configured Mesa wrong, don't do that.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-08-25 16:21:43 -04:00
Kenneth Graunke e8378adc01 i965: Use GEN_GEN and GEN_IS_HASWELL in genX_state_upload.c code.
We were using brw->gen, brw->is_haswell, and devinfo->gen in a few
places, when we could just use GEN_GEN and GEN_IS_HASWELL, which are
evaluated at compile time.

Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
2017-08-25 11:40:43 -07:00
Rafael Antognolli 1eb58960bf i965: Do not store SRC after 0 on component control.
The PRM SKL-Vol 2b-05.16 says:

   "Within a VERTEX_ELEMENT_STATE structure, if a Component Control
   field is set to something other than VFCOMP_STORE_SRC, no
   higher-numbered Component Control fields may be set to
   VFCOMP_STORE_SRC. In other words, only trailing components can be set
   to something other than VFCOMP_STORE_SRC."

Since we set the component 1 to VFCOMP_STORE_0 on gen8+, and
VFCOMP_STORE_IID on gen5+, and we are not using components 2 and 3,
let's also set them to VFCOMP_STORE_0.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2017-08-25 10:02:09 -07:00
Adam Jackson 2bae451bd3 mesa: Implement GL_ARB_polygon_offset_clamp
Semantically identical to the EXT version (whose string is still valid
for GLES), so rename the bit but expose both extension strings.
(Suggested by Ilia Mirkin and Ian Romanick.)

v3: Fix the entrypoint alias in GL4x.xml (Ilia)

Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-08-25 12:38:14 -04:00
Adam Jackson 00caf2ab08 mesa: Implement GL_ARB_texture_filter_anisotropic
The only difference from the EXT version is bumping the minmax to 16, so
just hit all the drivers at once.

v2: Fix driver names, add to 17.3 release notes (Ilia Mirkin)

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-08-25 12:38:01 -04:00