Commit Graph

112150 Commits

Author SHA1 Message Date
Marek Olšák aa8d6e0507 radeonsi: fix AMD_DEBUG=nofmask
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-24 21:04:10 -04:00
Marek Olšák f46efacd01 radeonsi: flatten the switch for DPBB tunables
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2019-06-24 21:04:10 -04:00
Marek Olšák ac4b1e2f0a radeonsi: set the calling convention for inlined function calls
otherwise the behavior is undefined

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2019-06-24 21:04:10 -04:00
Nicolai Hähnle 610e1a81f7 radeonsi: refactor si_update_vgt_shader_config
We'll have to extend this at some point, and using a bitfield union in
this way makes it easier to get the right index without excessive
branching.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-24 21:04:10 -04:00
Nicolai Hähnle bd3a3fd25a amd/rtld: update the ELF representation of LDS symbols
The initial prototype used a processor-specific symbol type, but
feedback suggests that an approach using processor-specific section
name that encodes the alignment analogous to SHN_COMMON symbols is
preferred.

This patch keeps both variants around for now to reduce problems
with LLVM compatibility as we switch branches around.

This also cleans up the error reporting in this function.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-24 21:04:10 -04:00
Marek Olšák 0032f6b8a0 ac/surface: remove addrlib_family_rev_id
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-24 21:04:10 -04:00
Dylan Baker 032fe7d602 docs: update calendar, add news item and link release notes for 19.0.7 2019-06-24 16:24:05 -07:00
Dylan Baker 7badae431a docs: Add SHA256 sums for 19.0.7 2019-06-24 16:22:21 -07:00
Dylan Baker 8c0e5c4cfc Docs add 19.0.7 release notes 2019-06-24 16:22:20 -07:00
Ian Romanick ee1c69fadd glsl: Don't increase the iteration count when there are no terminators
Incrementing the iteration count was intended to fix an off-by-one error
when the first terminator was superseded by a later terminator.  If
there is no first terminator or later terminator, there is no off-by-one
error.  Incrementing the loop count creates one.  This can be seen in
loops like:

    do {
        if (something) {
            // No breaks or continues here.
        }
    } while (false);

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Abel Briggs <abelbriggs1@hotmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110953
Fixes: 646621c66d ("glsl: make loop unrolling more like the nir unrolling path")
2019-06-24 14:32:33 -07:00
Eric Anholt 5c4289dd4b freedreno: Only upload the used part of UBO0 to the constant buffer.
We were pessimistically uploading all of it in case of indirection,
but we can just bump that when we encounter indirection.

total constlen in shared programs: 2529623 -> 2485933 (-1.73%)

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2019-06-24 14:23:07 -07:00
Eric Anholt 852704976a freedreno: Stop treating UBO 0 specially in UBO uploading.
ir3_nir_analyze_ubo_ranges() has already told us how much of cb0 we
need to upload (all of it, since it will lower indirect UBO 0 accesses
from load_ubo back to indirection on the constant buffer).

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2019-06-24 14:23:07 -07:00
Rob Clark 572c76fd88 freedreno: Clamp UBO uploads to the constlen decided by the shader.
If the NIR-level analysis decided to move UBO loads to the constant
file, but the backend decided not to load those constants, we could
upload past the end of constlen.  This is particularly relevant for
pre-a6xx, where we emit a different constlen between bin and render
variants.

(Fix by Rob, commit message by anholt)

Reviewed-by: Eric Anholt <eric@anholt.net>
2019-06-24 14:23:07 -07:00
Alyssa Rosenzweig c1ca138475 panfrost: Allow up to 16 UBOs
This is the hardware max, as far as I can tell.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-24 12:57:40 -07:00
Alyssa Rosenzweig b670becb1e panfrost: DRY between shader stage setup
Just a little spring cleanup, extending UBOs to vertex shaders in the
process.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-24 12:57:40 -07:00
Alyssa Rosenzweig 5e2c3d40bd panfrost/midgard: Implement UBO reads
UBOs and uniforms now use a common code path with an explicit `index`
argument passed, enabling UBO reads.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-24 12:57:40 -07:00
Alyssa Rosenzweig f28e9e868b panfrost: Handle disabled/empty UBOs
Prevents an assert(0) later in this (not so edge) case. We still have to
have a dummy there.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-24 12:57:40 -07:00
Alyssa Rosenzweig bd2fc60a8a panfrost: Identify "uniform buffer count" bits
We've known about this for a while, but it was never formally in the
machine header files / decoder, so let's add them in.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-24 12:57:40 -07:00
Alyssa Rosenzweig 856e03902b panfrost: Upload UBOs
Now that all the counting is sorted, it's a matter of passing along a
GPU address and going.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-24 12:57:40 -07:00
Alyssa Rosenzweig 4c6d751274 panfrost: Allow for dynamic UBO count
We already uploaded UBOs, but only a fixed number (1) for uniforms;
let's upload as many as we compute we need.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-24 12:57:40 -07:00
Alyssa Rosenzweig 5d60be4e24 panfrost: Report UBO count
We look at the highest set bit in the UBO enable mask to work out the
maximum indexable UBO, i.e. the UBO count as we need to report to the
hardware.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-24 12:57:40 -07:00
Alyssa Rosenzweig ca2caf01df panfrost: Constant buffer refactor
We refactor panfrost_constant_buffer to mirror v3d's constant buffer
handling, to enable UBOs as well as a single set of uniforms.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-24 12:57:40 -07:00
Alyssa Rosenzweig f35f373850 panfrost: Replace varyings for point sprites
This doesn't handle Y-flipping, but it's good enough to render the stars
in Neverball.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-24 12:56:22 -07:00
Alyssa Rosenzweig be03060066 panfrost: Track point sprites in fragment shader key
In preparation for lowering point sprites, track them like we track
alpha testing state.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-24 12:56:16 -07:00
Caio Marcelo de Oliveira Filho 7fc907118e i965: Move resources lowering after NIR linking
Those either depend on information filled by the NIR linking steps OR
are restricted by those:

- gl_nir_lower_samplers: depends on UniformStorage being set by the
  linker.

- brw_nir_lower_image_load_store: After 6981069fc8 "i965: Ignore
  uniform storage for samplers or images, use binding info" we want
  this pass to happen after gl_nir_lower_samplers.

- gl_nir_lower_buffers: depends on UniformBlocks and
  SharedStorageBlocks being set by the linker.

For the regular GLSL code path, those datastructures are filled
earlier.  For NIR linking code path we need to generate the nir_shader
first then process it -- and currently the processing works with all
shaders together.  So move the passes out of brw_create_nir into its
own function, called by the brwProgramStringNotify and
brw_link_shader().

This patch prepares ground for ARB_gl_spirv, that will make use of NIR
linker.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-06-24 11:44:03 -07:00
Caio Marcelo de Oliveira Filho 6e2ff10886 glsl/nir: Fix copying 64-bit values in uniform storage
The iterator `i` already walks the right amount now that is
incremented by `dmul`, so no need to `* 2`.  Fixes invalid memory
access in upcoming ARB_gl_spirv tests.

Failure bisected by Arcady Goldmints-Orlov.

Fixes: b019fe8a5b "glsl/nir: Fix handling of 64-bit values in uniform storage"
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-06-24 11:32:14 -07:00
Caio Marcelo de Oliveira Filho 390ff8ac54 glsl/nir: Fix copying vector constant values
For n_columns == 1, we have a vector which is handled by the else
case.  Fixes invalid memory access in upcoming ARB_gl_spirv tests.

Failure bisected by Arcady Goldmints-Orlov.

Fixes: 81e51b412e "nir: Make nir_constant a vector rather than a matrix"
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-06-24 11:32:14 -07:00
Daniel Schürmann 0daeb1d127 amd/common: lower bitfield_extract to ubfe/ibfe.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-06-24 18:42:20 +02:00
Daniel Schürmann 48a75e7af0 amd/common: lower bitfield_insert to bfm & bitfield_select
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-06-24 18:42:20 +02:00
Daniel Schürmann a8b0b6e52b nir: introduce lowering of bitfield_insert to bfm and a new opcode bitfield_select.
bitfield_select is defined as:
bitfield_select(mask, base, insert) = (mask & base) | (~mask & insert)
matching the behavior of AMD's BFI instruction.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-06-24 18:42:20 +02:00
Daniel Schürmann 1403c3a7bf nir/algebraic: Use unsigned comparison when lowering bitfield insert/extract
This lets us use the optimization pattern
(('ult', 31, ('iand', b, 31)), False) to remove the
bcsel instruction for code originating in D3D shaders.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-06-24 18:42:20 +02:00
Daniel Schürmann 4eeb49ea71 nir/algebraic: Remove unnecessary iand of [iu]bfe and bfm sources
The [iu]bfe and bfm instructions are defined to only use the five
least significant bits.
This optimizes a common pattern from D3D -> SPIR-V translation.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-06-24 18:42:20 +02:00
Daniel Schürmann 165b7f3a44 nir: define behavior of nir_op_bfm and nir_op_u/ibfe according to SM5 spec.
That is: the five least significant bits provide the values of
'bits' and 'offset' which is the case for all hardware currently
supported by NIR and using the bfm/bfe instructions.
This patch also changes the lowering of bitfield_insert/extract
using shifts to not use bfm and removes the flag 'lower_bfm'.

Tested-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-06-24 18:42:20 +02:00
Daniel Schürmann a74f256c58 nir/algebraic: add optimization pattern for ('ult', a, ('and', b, a)) and friends.
These optimizations are based on the fact that
'and(a,b) <= umin(a,b)'.
For AMD, this series moves the optimization from LLVM to NIR,
so currently no vkpipeline-db changes here.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2019-06-24 18:42:20 +02:00
Andreas Baierl fa6ea16a8d lima/ppir: Add fsat op
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
2019-06-24 16:41:33 +02:00
Andreas Baierl f1d89bbc2f lima/ppir: Add fneg op
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
2019-06-24 16:41:33 +02:00
Andreas Baierl 512397058d lima/ppir: Add fabs op
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
2019-06-24 16:41:33 +02:00
Eric Engestrom 2d2e824fae util: support "y" and "n" in env_var_as_boolean()
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2019-06-24 12:49:13 +00:00
Andreas Baierl 0cb9ce12fd lima/ppir: lower ffma in ppir
Since we cannot handle ffma in ppir, lower it on nir level already.

Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
2019-06-24 11:57:57 +00:00
Samuel Pitoiset 946193ae00 radv: add support for VK_AMD_buffer_marker
This simple extension might be useful for debugging purposes.
GAPID has support for it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-24 10:50:54 +02:00
Tapani Pälli ff77b0415b meson: error out if platforms contains empty string
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110939
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-06-24 08:40:18 +03:00
Nataraj Deshpande d94fca5420 anv: Add HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED in vk_format
When HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED is used, then the platform
gralloc module will select a format based on the usage flags provided by
the camera device and the other endpoint of the stream.

The patch fixes crash in vulkan when the test is run with camera stream
set to HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED.

Test: android.graphics.cts.CameraVulkanGpuTest#testCameraImportAndRendering
on chromebook with camera HAL3.

v2: use AHARDWAREBUFFER_FORMAT_IMPLEMENTATION_DEFINED and take
    AHARDWAREBUFFER_USAGE_CAMERA_MASK in to account (Gurchetan)

Fixes: f1654fa7e3 "anv/android: support creating images from external format"
Signed-off-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
Signed-off-by: Gurchetan Singh <gurchetansingh@chromium.org>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2019-06-24 08:28:18 +03:00
Timur Kristóf 3b6d787e40 iris: move sysvals to their own constant buffer
This commit moves the sysvals to a separate, new constant buffer
at the end (before the shader constants). It also allows us to
remove the special handling we had for cbuf0, and enables all
constant buffers to support user-specified resources and user
buffers.

v2: (by Kenneth Graunke)
- Rebase on the previous patch to fix system value uploading.
- Fix disk cache num_cbufs calculation
- Fix passthrough TCS to report num_cbufs = 1 so upload actually occurs
- Change upload_sysvals to assert that num_cbufs > 0 when
  num_system_values > 0.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-06-23 18:33:23 +02:00
Kenneth Graunke ebc8c20b3e iris: Mark cbuf0 as not needing uploading every single time
I neglected to mark cbuf0_needs_upload = false after uploading it.
The obvious fix regressed user clip plane tests, because of a second
bug: we also forgot to mark that they may need re-uploading when
changing shader programs (which may have more or less system values).

Thanks to Timur Kristóf for catching the original issue.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
2019-06-23 18:32:11 +02:00
Eric Engestrom 188dbb1679 Revert "egl: drop empty eglfallbacks.c" and "egl: move fallback calls to eglapi.c"
This reverts commits cc4b68a801 and
b27fb3eaca.

These caused a bunch of EGLSync tests to crash when they were previously
failing.

I have a hunch the tests are doing something wrong, like using
extensions without checking for they support, but until the issue is
investigated I'm just reverting these commits.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-06-22 21:59:06 +01:00
Eric Engestrom cc4b68a801 egl: drop empty eglfallbacks.c
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-22 15:17:42 +00:00
Eric Engestrom b27fb3eaca egl: move fallback calls to eglapi.c
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-22 15:17:42 +00:00
Eric Engestrom 262b767023 egl: drop `_eglReturnFalse()` fallbacks
v2: drop them altogether, they should never get called in the
    first place (Emil)

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-06-22 15:17:42 +00:00
Eric Engestrom 82487ede62 egl: remove unnecessary eglGetProcAddress() fallback
No need to add a function that returns `false` only to be cast into
a pointer, we can just use the existing `return NULL` :)

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-22 15:17:42 +00:00
Eric Engestrom 30ecd86947 egl: remove NULL assignments after calloc()
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-06-22 15:17:42 +00:00