Commit Graph

122857 Commits

Author SHA1 Message Date
Connor Abbott cc530858c1 freedreno/a6xx: Document PrimID passthrough registers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4704>
2020-04-25 01:06:21 +00:00
Joshua Ashton 0b44582394 radv: Pass logical device to si_emit_graphics
We'll need this in order to retrieve the va of a bo for a future ext.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4728>
2020-04-25 00:32:20 +00:00
Kristian H. Kristensen bf542484ea freedreno/ir3: Print @tex write mask using 0x%x
That way we can parse it again with the assembler.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Kristian H. Kristensen c801228f0d freedreno/ir3: Reset lex line number when we start parsing
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Kristian H. Kristensen 34e7179dfa freedreno/ir3: Parse, but ignore @in, @out and @tex headers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Kristian H. Kristensen da467817e3 freedreno/ir3: Move ir3 assembler to backend compiler
For easier reuse.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Kristian H. Kristensen 869d86e664 freedreno/computerator: Decouple ir3 assembler
Specifically, don't include ir3_asm.h in the parser as that's
computerator specific.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Andres Gomez 375c7a3863 Revert "meson,ci: Disable sparse_array tests on windows"
The Wine version in the build image has been upgraded.

This reverts commit 6be65b0777.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4678>
2020-04-24 20:01:31 +00:00
Andres Gomez cb055c6ca4 gitlab-ci: install winehq-stable to get 5.0 instead of 4.0
Additionally, purge the winehq-stable package and its dependencies to
avoid crashing when building for s390x.

v2:
  - Remove winehq-stable and dependencies for s390x.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2657
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Daniel Stone <daniels@collabora.com> [v1]
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4678>
2020-04-24 20:01:31 +00:00
Marek Vasut c8ccd63911 etnaviv: Fix depth stencil ops on GC880/GC2000
This patch fixes depth stencil ops on MX6S GC880 and MX6Q GC2000.
The following dEQPs now pass:
  dEQP-GLES2.functional.fragment_ops.depth_stencil.stencil_depth_funcs.*
  dEQP-GLES2.functional.fragment_ops.depth_stencil.stencil_ops.*
which is roughly 600 fixed dEQP tests.

The problem is that if the front-facing stencil has a value mask 0x00 and
the back-facing stencil has some non-zero value mask, then the stencil part
of the depth stencil buffer is written with 0x00 unconditionally. The blob
replicates the value mask of the back-facing stencil to the value mask of
the front-facing stencil to achieve correct rendering, replicate the same
behavior here.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4275>
2020-04-24 21:22:55 +02:00
Rhys Perry 5c5c2dd48f radv/aco: enable 8/16-bit storage and int8/int16 on GFX8+
With this, Doom Eternal should now run with ACO on GFX8+.

The generated 8/16-bit storage code is okay but the generated int8/int16
code is currently pretty bad but it works and apparently Doom Eternal
doesn't actually use it (even though it requires it).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4707>
2020-04-24 20:04:39 +01:00
Rhys Perry eeccb1a941 aco: lower 8/16-bit integer arithmetic
dEQP-VK.spirv_assembly.type.* passes with the features and extensions
enabled.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4707>
2020-04-24 20:03:59 +01:00
Rhys Perry bcd9467d5c aco: improve sub-dword emit_split_vector() with sgprs
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry a3dc1441f0 aco: clobber scc in s_bfe_u32 in get_alu_src()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry 78389f4cbc aco: handle undef p_create_vector operands in the optimizer
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry deea4b7c5a aco: vectorize global loads/stores
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry 7db7206631 aco: allow 8/16-bit shared loads
These should work now

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry 48b7beb7b0 aco: add and use get_buffer_store_op() helper
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry 936b70c8cf aco: refactor visit_store_scratch() to use new helpers
Should support 8/16-bit stores now

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry 18817041f7 aco: refactor visit_store_global() to use new helpers
Should support 8/16-bit stores now

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry c7bd69b3ae aco: refactor visit_store_ssbo() to use new helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry f75c830433 aco: refactor store_vmem_mubuf() to use new helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry 98b4cc7110 aco: refactor store_lds() to use new helpers
It should also work correctly for 8/16-bit stores

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry 562353e1f1 aco: add helpers for splitting stores
split_store_data() splits a vector and p_as_uniforms it if needed.

scan_write_mask()/advance_write_mask() are similar to
u_bit_scan_consecutive_range(), but makes it easier to only clear part of
the range and will also give ranges for zero'd bits.

split_buffer_store() is a helper for splitting VMEM/SMEM stores.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry 211a9f2057 aco: use emit_load helper for VMEM/SMEM loads
Also implements 8/16-bit loads for scratch/global.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry 57e6886f98 aco: refactor load_lds to use new helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry 542733dbbf aco: add emit_load helper
This helper is used for recombining split loads, passing the result to
p_as_uniform, aligning the offset down and shifting it right if needed and
handling large constant offsets.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry b77d638e1b aco: add and use RegClass::get() helper
Eventually, we'll probably want to replace the current
RegClass(type, size) constructor with this.

This has a functional change in that get_reg_class() now creates v1/v2
instead of v4b/v8b.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry 69b92db131 aco: be more careful about using SMEM for load_global
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry 03568249f9 radv: allocate larger shader memory slabs if needed
Fixes dEQP-VK.ssbo.phys.layout.random.16bit.scalar.13 hang with ACO
(features needed for the test are implemented in a later commit)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry 51363bd475 radv: align buffer descriptor sizes to dword
This is needed to prevent bounds checking issues when load 8/16-bit values
with dword loads.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Timur Kristóf 62ff2ff808 aco: Move s_setprio to correct place after the gs_alloc_req.
Previously the setprio was inside the branch, so it would only reset
the priority on the first wave, but not the others.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf 277f37d036 aco: Use 24-bit multiplication for NGG wave id and thread id.
Both of them should always fit 24 bits anyway.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf eafc1e7365 aco: Use 24-bit multiplication in TCS I/O
The TCS inputs and outputs must always fit into the LDS,
which implies that their addresses also always fit 24 bits.

On AMD GPUs, 24-bit multiplication is much faster than 32-bit
multiplication, so we can take the opportunity to use that
for TCS I/O instead.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf 64332a0937 aco: Const correctness for aco_print_ir.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf 0c0691d43e aco: Const correctness for get_barrier_interaction.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf f321dc33c8 aco: Abort when RA can't find a register.
Previously, it was just unreachable, which means it will generate
invalid shaders when it encounters a situation when it can't allocate
registers for eg. a large load.

This commit makes it slightly easier to notice such problems without
triggering a GPU hang.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf f2e7aee244 aco: Increase barrier_count to 7 to include barrier_barrier.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf 25775d346c aco: Only store TCS outputs to VMEM when they are read by TES.
Totals from affected shaders (GFX10):
Code Size: 10832 -> 10736 (-0.89 %) bytes

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf b779d05d71 radv: Add inputs read by TES to radv_shader_info.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Jonathan Marek c3ef0275c4 turnip: add adreno 650
Tile alignment is 96, with gmem alignment of 0x6000

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4608>
2020-04-24 17:42:01 +00:00
Jonathan Marek aa3624b8ab turnip: use RESOLVE_TS event
This is required on a650 to flush the GMEM store.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4608>
2020-04-24 17:42:01 +00:00
Jonathan Marek f81e56c9a0 turnip: remove unused RB_UNKNOWN_8E04_blit
New blit code doesn't change this value, and different values seem to be
related to the driver version and not the GPU version.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4608>
2020-04-24 17:42:01 +00:00
Mike Blumenkrantz c683138689 zink: set UBO alignments in nir_intrinsic_load_uniform lowering
resolves this error
  error: nir_intrinsic_align_offset(instr) < nir_intrinsic_align_mul(instr) (../src/compiler/nir/nir_validate.c:582)
in ext_packed_depth_stencil-readdrawpixels piglit test

port of f5b14d983e

Fixes: fb64954d9d ("nir: Validate that memory load/store ops work on whole bytes")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4711>
2020-04-24 17:27:30 +00:00
Fritz Koenig 155033bbb3 freedreno: allow FMT6_8_UNORM as a UBWC format
FMT6_8_UNORM is necessary for NV12 textures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4722>
2020-04-24 17:10:39 +00:00
Jason Ekstrand 9c2a11430e spirv: Rewrite CFG construction
This commit completely rewrites the way we extract a structured CFG from
SPIR-V.  The new approach is different in a few ways:

 1. It does a breadth-first search instead of depth-first.  This means
    that we've visited the merge node for a construct before we visit
    any of the nodes inside the construct.  This makes it easier to
    validate things like loop and switch nesting.

 2. We record more information in the CFG.  Earlier commits added a
    parent pointer to vtn_cf_node but we now record all of the merge and
    other special blocks for each CFG node.  This lets us validate
    things more precisely.

 3. It makes heavy use of merge blocks for walking the CFG.  Previously,
    we sort of used them as hints for trying to guess the CFG structure
    but things got dicey whenever a merge was missing.  We had some
    heuristics for how to handle short-circuiting if statements but it
    was a bunch of special cases.

    Now, we make them a fundamental part of walking the CFG.  When we
    encounter a control-flow construct, we add the body components of
    the construct to the BFS work list and then jump to the merge block
    if one exists to continue scanning the current CFG nesting level.
    If no merge block exists, we assume that means that control-flow
    never re-converges in a normal way and that the only way to get back
    to normality is with a direct jump such as a loop break or continue.
    This should make things far more robust when trying to deal with the
    more creative placement (or lack thereof) of merge instructions.

Reviewed-by: Alan Baker <alanbaker@google.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
Closes: #2760
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4446>
2020-04-24 16:29:24 +00:00
Jason Ekstrand 80ffbe915f anv: Add support for HiZ+CCS
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand 752eefdb3d intel/isl: Refactor isl_surf_get_ccs_surf
This refactor breaks out a new isl_surf_supports_ccs function which does
most of the validity checking.  The isl_surf_get_ccs_surf function calls
this function and then dives right into constructing the CCS aux_surf.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand 3eb1993625 intel/isl: Delete a misleading comment
Untyped messages are only use on Gen9+ for UBOs and SSBOs.  They will
never be used on anything using an isl_surf.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand 483a1d5e6c anv/cmd_buffer: Move anv_image_init_aux_tt higher
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00