Commit Graph

76151 Commits

Author SHA1 Message Date
Jason Ekstrand 9a999ceab8 genxml: Add enough XML for gens 4, 4.5, and 5 to get SURFACE_STATE
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Chad Versace <chad.versace@intel.com>
2016-07-15 15:53:47 -07:00
Jason Ekstrand 0f6eb5dea0 isl/state: Divide the aux qpitch by 4
The field is in multiples of 4 like regular QPitch.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-15 15:53:47 -07:00
Jason Ekstrand 2c6ca658e7 isl: Fix the bs assertion in isl_tiling_get_info
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-15 15:53:47 -07:00
Jason Ekstrand 593731ea3c anv: Handle VK_WHOLE_SIZE properly for buffer views
The old calculation, which used view->offset, encorporated buffer->offset
into the size calculation where it doesn't belong.  This meant that, if
buffer->offset > buffer->size, you would always get a negative size.  This
fixes 170 dEQP-VK.renderpass.attachment.* Vulkan CTS tests on Haswell.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-07-15 15:48:21 -07:00
Jason Ekstrand 827405f072 anv: Add an align_down_npot_u32 helper
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-07-15 15:48:21 -07:00
Jason Ekstrand f124f4a394 anv: Enable independentBlend on gen7
We can totally do it, we were just only setting up one BLEND_STATE and, now
that the code is unified with gen8, we should be handling it correctly.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-07-15 15:48:21 -07:00
Jason Ekstrand a2e7b2e653 anv/pipeline: Unify blend state setup between gen7 and gen8
This fixes all 674 broken dEQP-VK.pipeline.blend Vulkan CTS tests on
Haswell.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-07-15 15:48:21 -07:00
Jason Ekstrand aaa202ebe7 genxml: Make gen6-7 blending look more like gen8
This renames BLEND_STATE to BLEND_STATE_ENTRY and adds an new struct
BLEND_STATE which is just an array of 8 BLEND_STATE_ENTRYs.  This will make
it much easier to write gen-agnostic blend handling code.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-07-15 15:48:21 -07:00
Eric Anholt 3bcd0f1912 vc4: Speed up glGenerateMipmaps by avoiding shadow baselevel.
To support general GL_TEXTURE_BASE_LEVEL we have to copy to a temporary
miptree.  However, if a single level is being selected, we can use the
existing miptree and force all the sampling to be from that particular
level.

This avoids a ton of software fallbacks in glGenerateMipmaps(), which uses
base levels in the blit implementation in gallium.  Improves "glmark2 -b
terrain" from 2 fps to 3 (perhaps some more precision would be useful?),
and cuts its CPU usage during the benchmarking from ~30% to ~10% (total
CPU time from 8.8s to 7.6s).
2016-07-15 13:54:00 -07:00
Eric Anholt 88152d7dc0 vc4: Drop VC4_DIRTY_TEXSTATE in favor of the per-stage flags.
The compiler uses the per-stage flags already, so it didn't need this.
vc4_uniforms was using it, so just replace it with both of the stage flags
for now.
2016-07-15 13:54:00 -07:00
Eric Anholt 5db82e0c89 vc4: Remove dead dirty_samplers field.
We use a big VC4_DIRTY_FRAGTEX/VC4_DIRTY_VERTEX on the stage, instead.
2016-07-15 13:54:00 -07:00
Eric Anholt 219b75deb9 vc4: Turn on control flow support in the simulator environment.
We can't merge the non-simulator support until we merge the kernel side and
get a new libdrm release.
2016-07-15 13:54:00 -07:00
Brian Paul 9a23a177b9 mesa: handle numLevels, numSamples in _mesa_test_proxy_teximage()
If numSamples > 0, we can compute the size of the whole mipmapped texture.
That's the case for glTexStorage(GL_PROXY_TEXTURE_x).

Also, multiply the texture size by numSamples for MSAA textures.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-07-15 14:24:34 -06:00
Brian Paul 39183ea971 mesa: add proxy texture targets in _mesa_next_mipmap_level_size()
So we can use it for computing size of proxy textures.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-07-15 14:24:34 -06:00
Brian Paul 0ac9f25032 mesa: add numLevels, numSamples to Driver.TestProxyTexImage()
So that the function can work properly with glTexStorage(), where we know
how many mipmap levels there are.  And so we can compute storage for MSAA
textures.

Also, remove the obsolete texture border parameter.

A subsequent patch will update _mesa_test_proxy_teximage() to use these
new parameters.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-07-15 14:24:34 -06:00
Brian Paul e477d92c94 mesa: use _mesa_clear_texture_image() in clear_texture_fields()
This avoids a failed assert(img->_BaseFormat != -1) in
init_teximage_fields_ms() because the internalFormat argument is GL_NONE.
This was hit when using glTexStorage() to do a proxy texture test.

Fixes a failure with the updated Piglit tex3d-maxsize test.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-07-15 14:24:34 -06:00
Charmaine Lee 6b7923ee46 svga: avoid ubinding render targets that have already been unbound
Fixed the remaining redundant SetRenderTargets command emission.

Tested with lightsMark2008, Heaven, mtt piglit, glretrace, conform.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-07-15 14:24:34 -06:00
Neha Bhende 4f633d110a svga: dump code for GenMips.
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-07-15 14:24:33 -06:00
Yaakov Selkowitz 5d303867f5 Use correct names for dlopen()ed files on Cygwin
Signed-off-by: Yaakov Selkowitz <yselkowi@redhat.com>
Reviewed-by: Jon Turney <jon.turney@dronecode.org.uk>
2016-07-15 19:46:54 +01:00
Nanley Chery 1fc739d28e Revert "isl: Don't filter tiling flags if a specific tiling bit is set"
This reverts commit 091f1da902 .

Although a user may specify a specfic tiling bit, ISL should still
prevent incompatible tiling/surface combinations.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-15 10:35:40 -07:00
Nanley Chery e179fee049 anv/blit2d: Copy with stencil sources when needed
In the next patch, ISL will unconditionally perform verification of a
surface's tiling and usage. Since it will require that w-tiled images
be stencil buffers, create a stencil surface to copy from a
w-tiled/stencil surface.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-15 10:35:40 -07:00
Nanley Chery 1ef80b26d7 anv/image: Fix initialization of the ISL tiling
If an internal user creates an image with Vulkan tiling VK_IMAGE_TILING_OPTIMAL
and an ISL tiling that isn't set, ISL will fail to create the image as
anv_image_create_info::isl_tiling_flags will be an invalid value.

Correct this by making anv_image_create_info::isl_tiling_flags an opt-in,
filtering bitmask, that allows the caller to specify which ISL tilings are
acceptable, but not contradictory to the Vulkan tiling.

Opt-out of filtering for vkCreateImage.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-15 10:35:40 -07:00
Nanley Chery 00caba4152 isl: Fix isl_tiling_is_any_y()
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-15 10:35:40 -07:00
Nanley Chery a5748cb920 anv/device: Fix max buffer range limits
Set limits that are consistent with ISL's assertions in
isl_genX(buffer_fill_state_s)() and Anvil's format-DescriptorType
mapping in anv_isl_format_for_descriptor_type().

Fixes the following new crucible tests:
* stress.limits.buffer-update.range.uniform
* stress.limits.buffer-update.range.storage

These tests are in this patch: https://patchwork.freedesktop.org/patch/98726/

Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-15 10:35:40 -07:00
Nanley Chery 028f6d8317 isl: Fix assert on raw buffer surface state size
See inline PRM reference.

Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-15 10:35:40 -07:00
Nanley Chery 96c664cd03 anv/cmd_buffer: Simplify range member assignment
A ternary is clearer because the range member is assigned one of two values
dependant on one condition.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-15 10:35:40 -07:00
Nanley Chery 1a7344531f anv/cmd_buffer: Remove unused variable
This became unused due to commit 612e35b2c6 .

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-15 10:35:40 -07:00
Nanley Chery fd16e64321 anv/descriptor_set: Fix binding partly undefined descriptor sets
Section 13.2.3. of the Vulkan spec requires that implementations be able to
bind sparsely-defined Descriptor Sets without any errors or exceptions.

When binding a descriptor set that contains a dynamic buffer binding/descriptor,
the driver attempts to dereference the descriptor's buffer_view field if it is
non-NULL. It currently segfaults on undefined descriptors as this field is never
zero-initialized. Zero undefined descriptors to avoid segfaulting. This
solution was suggested by Jason Ekstrand.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96850
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-15 10:35:40 -07:00
Brian Paul 50a669de4e svga: handle mismatched number of samplers, sampler views
in svga_init_shader_key_common().  Since the CSO module only tracks
sampler views for fragment shaders, the number of samplers and sampler
views can be mismatched for other types of shaders.  This situation
triggered an assertion in Chrome with maps.google.com

This patch adds defensive code to handle that situation.

Fixes VMware bug 1694027
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2016-07-15 11:05:18 -06:00
Leo Liu b9d10e79c8 st/omx/enc: check uninitialized list from task release
The uninitialized list should be checked and returned.

Thank Julien for the notification and suggested fix.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-07-15 09:17:36 -04:00
Samuel Pitoiset ea6b236ab1 nv50/ir: add missing string for SV_WORK_DIM
Fixes: 2aa1197 ("nouveau: Add support for SV_WORK_DIM")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2016-07-14 22:28:39 +02:00
Marek Olšák f84e9d749f Revert "radeon/llvm: Use alloca instructions for larger arrays"
This reverts commit 513fccdfb6.

Bioshock Infinite hangs with that.
2016-07-14 22:15:08 +02:00
Jan Vesely 489bb5473b r600,compute: Reserve vtx 3 for kernel arguments
Using vtx 0 does not work for dynamic offsets.

v2: add explanatory comment

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2016-07-14 16:04:50 -04:00
Marek Olšák 33eddde4a7 radeon/uvd: fail to create a decoder if RUVD_MSG_CREATE submission fails
This is the bare minimum for reporting the error to the user.

Reviewed-by: Christian König <christian.koenig@amd.com>
2016-07-14 22:00:54 +02:00
Marek Olšák 85388652f9 winsys/amdgpu: return an error on IB submission failures
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-07-14 22:00:54 +02:00
Marek Olšák a7d84f7731 gallium/radeon: add a return value to cs_flush
Required by our UVD code.

Reviewed-by: Christian König <christian.koenig@amd.com>
2016-07-14 22:00:54 +02:00
Jason Ekstrand b919100d61 glsl/types: Use _mesa_hash_data for hashing function types
This is way better than the stupid string approach especially since you
could overflow the string.  Again, I thought I had something better at one
point but it obviously got lost.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-07-14 10:48:25 -07:00
Jason Ekstrand 11ac1c4dbb glsl/types: Fix function type comparison function
It was returning true if the function types have different lengths rather
than false.  This was new with the SPIR-V to NIR pass and I thought I'd
fixed it a while ago but it may have gotten lost in rebasing somewhere.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-07-14 10:48:11 -07:00
francians@gmail.com 3db7f3458f freedreno/a4xx: Fix sign compare warnings
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-14 09:55:02 -04:00
francians@gmail.com 948822018f freedreno/a3xx: Fix sign compare warnings
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-14 09:55:02 -04:00
francians@gmail.com cf2f345356 freedreno/a2xx: Fix sign compare warnings
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-14 09:55:02 -04:00
Boyuan Zhang 23c5e8bc58 radeon/vce: handle newly added parameters
Replace the previous hardcoded value with newly defined parameters

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-07-14 09:49:21 +02:00
Boyuan Zhang 5490068fb1 st/omx: assign previous values to new structure
Assign previously hardcoded values for OMX to newly defined
structure. As a result, OMX behaviour will not change at all.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-07-14 09:49:14 +02:00
Boyuan Zhang b86bf4b568 vl: add parameters for VAAPI encode
Allow to specify more parameters in the encoding interface
which previously just hardcoded in the encoder

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-07-14 09:49:07 +02:00
Christian König 9ce52baf7f st/mesa: fix reference counting bug in st_vdpau
Otherwise we leak the resources created for the DMA-buf descriptors.

Signed-off-by: Christian König <christian.koenig@amd.com>
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Tested-and-Reviewed by: Leo Liu <leo.liu@amd.com>
Ack-by: Tom St Denis <tom.stdenis@amd.com>
2016-07-14 09:33:44 +02:00
Eric Anholt 9194473dd2 vc4: Emit resets of the uniform stream at the starts of blocks.
If a block might be entered from multiple locations, then the uniform
stream will (probably) be at different points, and we need to make sure
that it's pointing where we expect it to be.  The kernel also enforces
that any block reading a uniform resets uniforms, to prevent reading
outside of the uniform stream by using looping.
2016-07-13 23:54:15 -07:00
Eric Anholt 44df061aaa vc4: Add support for scheduling of branch instructions.
For now we don't fill the delay slots, and instead just drop in NOPs.
2016-07-13 23:54:15 -07:00
Eric Anholt a59da513d3 vc4: Move the QPU instructions to schedule into each block.
We'll want to schedule them individually, to handle delay slots.
2016-07-13 23:54:15 -07:00
Eric Anholt 37ecc61662 vc4: Disable vc4_opt_vpm in the presence of control flow.
It's a really valuable pass currently, but it will be a mess to rewrite
for control flow.  For now, just disable it if we have multiple blocks
present.
2016-07-13 23:54:15 -07:00
Eric Anholt ee69cfd11d vc4: Convert vc4_opt_dead_code to work in the presence of control flow.
With control flow, we can't be sure that we'll see the uses of a variable
before its def as we walk backwards.  Given that NIR is eliminating our
long chains of dead code, a simple solution for now seems fine.

This slightly changes the order of some optimizations, and so an opt_vpm
happens before opt_dce, causing 3 dead MOVs to be turned into dead FMAXes
in Minecraft:

instructions in affected programs:     52 -> 54 (3.85%)
2016-07-13 23:54:15 -07:00