Commit Graph

106786 Commits

Author SHA1 Message Date
Samuel Pitoiset 929df7afaf ac/nir: set cache policy when loading/storing buffer images
This was missing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-01-14 17:59:51 +01:00
Samuel Pitoiset af2a85df74 ac/nir: add get_cache_policy() helper and use it
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-01-14 17:59:49 +01:00
Jason Ekstrand 5e4f9ea363 anv: Implement VK_KHR_depth_stencil_resolve 2019-01-14 10:16:52 -06:00
Jason Ekstrand 9f44088468 anv: Move resolve_subpass to genX_cmd_buffer.c
We may have to do transitions around certain kinds of resolves so it
helps to have it genX code.
2019-01-14 10:16:52 -06:00
Jason Ekstrand 930b17161f anv/blorp: Refactor MSAA resolves into an exportable helper function
This function is modeled after the aux_op functions except that it has a
lot more parameters because it deals with two images as well as source
and destination regions.
2019-01-14 10:16:52 -06:00
Jason Ekstrand c92c449361 anv: Rename has_resolve to has_color_resolve 2019-01-14 10:16:52 -06:00
Jason Ekstrand 4bd976e3b8 intel/blorp: Add two more filter modes 2019-01-14 10:16:52 -06:00
Andres Gomez 3ec9ab80b8 bin/get-pick-list.sh: fix redirection in sh
"&>" is bash specific.

Fixes: e0dbfc9953 ("bin/get-pick-list.sh: warn when commit lists invalid sha")
Cc: Juan A. Suarez <jasuarez@igalia.com>
Cc: Eric Engestrom <eric.engestrom@intel.com>
Cc: Dylan Baker <dylan@pnwbakers.com>
Cc: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
2019-01-14 17:40:15 +02:00
Andres Gomez 716ed41a36 bin/get-pick-list.sh: fix the oneline printing
"--summary" will also print extended header information such as
creations, renames and mode changes.

Let's just use "--no-patch", which suppresses the diff output.

v2: Use "--no-patch" instead of the "-s" abbreviation (Eric).

Fixes: 559c32d241 ("bin/get-pick-list.sh: simplify git oneline printing")
Cc: Juan A. Suarez <jasuarez@igalia.com>
Cc: Eric Engestrom <eric.engestrom@intel.com>
Cc: Dylan Baker <dylan@pnwbakers.com>
Cc: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
2019-01-14 17:36:56 +02:00
Michel Dänzer 1a20b56798 amd/common: Restore v4i32 suffix for llvm.SI.load.const intrinsic
It was accidentally dropped in commit e4803ab7d2 "amd/common: use
llvm.amdgcn.s.buffer.load for LLVM 8.0", breaking the universe with LLVM
7.

Trivial.
2019-01-14 12:52:52 +01:00
Nicolai Hähnle 7fbd48fdc0 amd/common/vi+: enable SMEM loads with GLC=1
Only on LLVM 8.0+, which supports the new intrinsic.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-01-14 08:30:15 +01:00
Nicolai Hähnle e4803ab7d2 amd/common: use llvm.amdgcn.s.buffer.load for LLVM 8.0
llvm.SI.load.const is deprecated.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-01-14 08:30:12 +01:00
Iago Toral Quiroga 1c1ae6376c anv/pipeline_cache: free NIR shader cache
Fixes: f6aa9f7185 'anv/pipeline_cache: Add support for caching NIR'
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-01-14 07:59:27 +01:00
Danylo Piliaiev 0862929bf6 glsl: Fix copying function's out to temp if dereferenced by array
Function's out variable could be an array dereferenced by an array:
 func(v[w[i]]);
or something more complicated.

Copy index in any case.

Fixes: 76c27e47b9 ("glsl: Copy function out to temp if we don't directly ref a variable")

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-01-14 12:04:07 +11:00
Kenneth Graunke 04c2f12ab2 i965: Drop mark_surface_used mechanism.
The original idea was that the backend compiler could eliminate
surfaces, so we would have it mark which ones are actually used,
then shrink the binding table accordingly.  Unfortunately, it's a
pretty blunt mechanism - it can only prune things from the end,
not the middle - since we decide the layout before we even start
the backend compiler, and only limit the size.  It also basically
gives up if it sees indirect array access.

Besides, we do the vast majority of our surface elimination in NIR
anyway, not the backend - and I don't see that trend changing any
time soon.  Vulkan abandoned this plan a long time ago, and I don't
use it in Iris, but it's still been kicking around in i965.

I hacked shader-db to print the binding table size in bytes, and
observed no changes with this patch.  So, this code appears to do
nothing useful.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2019-01-13 09:35:32 -08:00
Eric Engestrom bdf6a5c1d2 egl: fix python lib deprecation warning
DeprecationWarning: the imp module is deprecated in favour of importlib

Instead of complicated logic, just import the file directly.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2019-01-13 13:59:08 +00:00
Jason Ekstrand b938d5fbef spirv: Emit switch conditions on-the-fly
Instead of emitting all of the conditions for the cases of a switch
statement up-front, emit them on-the-fly as we emit the code for each
case.  The original justification for this was that we were going to
have to build a default case anyway which would need them all.  However,
we can just trust CSE to clean up the mess in that case.  Emitting each
condition right before the if statement that uses it reduces register
pressure and, in one customer benchmark, reduces spilling and improves
performance by about 2x.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-01-12 17:55:49 -06:00
Jason Ekstrand 821b6861ec nir/gcm: Support deref instructions
Even though no one's been brave enough to ever use this pass, I like to
keep it functionally working.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-01-12 17:55:49 -06:00
Jason Ekstrand 24c8108ea6 intel/nir: Call nir_opt_deref in brw_nir_optimize
It's an optimization so we should probably be calling it in the
optimization loop.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-01-12 17:55:49 -06:00
Jason Ekstrand e57e26121a spirv: Contain the GLSLang issue #179 workaround to old GLSLang
Instead of applying the workaround universally, detect semi-old GLSLang
via the generator ID and only enable the workaround on old GLSLang.
This isn't nearly as precise as one would like it to be because the
first GLSLang generator id version bump was on October 7, 2017 which is
about 1.5 years after the bug was fixed.  However, it at least lets us
disable it for non-GLSLang and for more modern versions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-01-12 17:55:49 -06:00
Jason Ekstrand b57c1ec421 spirv: Whack sampler/image pointers to uniform
A long time in a galaxy far far away, there was a GLSLang bug with how
it handled samplers passed in as function parameters.  (The bug can be
found here: https://github.com/KhronosGroup/glslang/issues/179.)
Unfortunately, that version was shipped in several apps and has been
causing heartburn for our SPIR-V parser ever since.

Recent changes to NIR uncovered a moderately old bug in how we work
around this issue.  In particular, we ended up with a deref_cast from
uniform to local which is not a no-op cast so nir_opt_deref wasn't
getting rid of the cast.  The only reason why it worked before was
because someone just happened to call nir_fixup_deref_modes which
"fixed" the cast (that shouldn't be happening) and then a later round of
copy-prop would get rid of it.  The fact that the deref_cast survived
that long without causing trouble for other parts of NIR is a bit
surprising.

Just whacking the mode of the pointer seems to fix it fairly
unobtrusively.  Currently, only apps with this bug will have a local
variable containing an image or sampler.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109304
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-01-12 17:55:49 -06:00
Kenneth Graunke 2b876bc922 st/nir: Lower TES gl_PatchVerticesIn to a constant if linked with a TCS.
If the TCS and TES are linked together, we can simply replace the TES's
gl_PatchVerticesIn system value with a constant, possibly allowing extra
optimization or letting the driver avoid uploading a special value.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-01-11 13:07:54 -08:00
Jonathan Marek 3d182601bb glsl/nir: keep bool types when native_integers=false
With the new handling of bool types, the conversion to float in glsl_to_nir
should not apply to bool types anymore.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-01-11 19:16:11 +00:00
Jonathan Marek b27ad17115 glsl/nir: ftrunc for native_integers=false float to int cast
out_type in the default cast case is always GLSL_TYPE_FLOAT, so we get a
mov otherwise.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-01-11 19:16:11 +00:00
Jonathan Marek d3b47e073e glsl/nir: int constants as float for native_integers=false
All alu instructions emitted with native_integers=false expect float
(or bool in some cases) constants, so this change is necessary.

This will cause changes with some intrinsics which had integer sources,
such as nir_intrinsic_load_uniform. Apparently it might cause issues with
some opt passes, but perhaps those don't apply in OpenGL ES 2.0 cases?

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-01-11 19:16:11 +00:00
Jason Ekstrand 1ede463b6e intel/peephole_ffma: Fix swizzle propagation
The num_components value passed into get_mul_for_src is used to only
compose the parts of the swizzle that we know will be used so we don't
compose invalid swizzle components.  However, we had a bug where we
passed the number of components of the add all the way through.  For the
given source, we need the number of components read from that source.
In the case where we have a narrow add, say 2 components, that is
sourced from a chain of wider instructions, we may not compose all the
swizzles.  All we really need to do is pass through the right number of
components at each level.

Fixes: 2231cf0ba3 "nir: Fix output swizzle in get_mul_for_src"
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2019-01-11 10:44:08 -06:00
Kenneth Graunke ae683ed3bc nir: Allow a non-existent sampler deref in nir_lower_samplers_as_deref
GL_ARB_gl_spirv does not provide a sampler deref for e.g. texelFetch(),
so we can't assume that both are present and identical.  Simply lower
each if it is present.

Fixes regressions in GL_ARB_gl_spirv tests since I switched everyone to
using this pass.  Thanks to Alejandro Piñeiro for catching these.

Fixes: f003859f97 nir: Make gl_nir_lower_samplers use gl_nir_lower_samplers_as_deref

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Alejandro Piñeiro <apinheiro@igalia.com>
2019-01-11 07:54:32 -08:00
Eric Engestrom e12b0b5c6d travis: avoid using unset llvm-config
Fixes the following errors:
  usage: which [-as] program ...
  /Users/travis/.travis/job_stages: line 110: --version: command not found

... caused by the use of an undefined $LLVM_CONFIG

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-01-11 14:38:35 +00:00
Eric Engestrom c8ae891035 egl: remove unused include
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
2019-01-11 14:37:47 +00:00
Eric Engestrom d75fbff667 egl: add missing includes
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
2019-01-11 14:37:47 +00:00
Iago Toral Quiroga 4b1e436bc9 anv/pipeline_cache: fix incorrect guards for NIR cache
Fixes: f6aa9f7185 'anv/pipeline_cache: Add support for caching NIR'
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-01-11 12:45:18 +01:00
Kenneth Graunke ad9832d17b blorp: Pass the batch to lookup/upload_shader instead of context
This will allow drivers to pin shader buffers if necessary.

i965 and anv do not need to do this today, but iris will.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-01-10 20:52:04 -08:00
Kenneth Graunke 084a1cdbb7 blorp: Add blorp_get_surface_address to the driver interface.
Currently, BLORP expects drivers to provide two functions for dealing
with buffers: blorp_emit_reloc and blorp_surface_reloc.  Both record a
relocation and combine the BO address and offset into a full 64-bit
address.  Traditionally, blorp_surface_reloc has written that combined
address to an implicitly-known buffer where surface states are stored.
(In contrast, blorp_emit_reloc returns the value.)

The upcoming Iris driver stores surface states in multiple buffers,
which makes it impossible for blorp_surface_reloc to write the combined
address - it only takes an offset, not the actual buffer to write to.

This commit adds a third function, blorp_get_surface_address, which
combines and returns an address, which is then passed to ISL's surface
state fill functions.  Softpin-only drivers can return a real address
here and skip writing it in blorp_surface_reloc.  Relocation-based
drivers are have options.  They can simply return 0 from the new
function, and continue writing the address from blorp_surface_reloc.
Or, they can return a presumed address from blorp_get_surface_address,
and have other relocation processing write the real value later.

For now, i965 and anv simply return 0.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-01-10 20:51:53 -08:00
Ilia Mirkin 2165636e9c docs: fix gallium screen cap docs
Make sure that the next line starts with spaces so that bullets are
maintained throughout, add `` around a few more special tokens, and fix
SAMPLE_COUNT_TEXTURE -> SAMPLE_COUNT.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-01-10 21:44:09 -05:00
Danylo Piliaiev a2db6b4254 glsl: Make invariant outputs in ES fragment shader not to cause error
In all GLSL ES versions output variables in fragment shader are allowed
to be invariant.

 From Section 4.6.1 ("The Invariant Qualifier") GLSL ES 1.00 spec:
 "Only the following variables may be declared as invariant:
   ...
   - Built-in special variables output from the fragment shader."

 From Section 4.6.1 ("The Invariant Qualifier") GLSL ES 3.00 spec:
 "Only variables output from a shader can be candidates for invariance."

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107842
2019-01-11 13:01:11 +11:00
Jason Ekstrand eb4b1477dc anv/pipeline: Cache the pre-lowered NIR
This adds a second level of caching for the pre-lowered NIR that's only
based off of the shader module, entrypoint and specialization constants.
This is enough for spirv_to_nir as well as our first round of lowering
and optimization.  Caching at this level should allow for faster shader
recompiles due to state changes.

The NIR caching does not get serialized to disk via either the
VkPipelineCache serialization mechanism or the transparent on-disk
cache.  We could but it's usually not that expensive to fall back to
SPIR-V for the odd cache miss especially if it only happens once for
several misses and it simplifies the cache.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-01-10 19:15:27 -06:00
Jason Ekstrand f6aa9f7185 anv/pipeline_cache: Add support for caching NIR
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-01-10 19:15:27 -06:00
Jason Ekstrand 8dfda5ebbe anv/pipeline: Hash shader modules and spec constants separately
The stuff hashed by anv_pipeline_hash_shader is exactly the inputs to
anv_shader_compile_to_nir so it can be used for NIR caching.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-01-10 19:15:27 -06:00
Jason Ekstrand b90e55a5d5 compiler/types: Serialize/deserialize subpass input types correctly
They have glsl_sampler_dim enum values of 8 and 9 which don't work when
you & them with 0x7.  Fortunately, we have plenty of bits.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-01-10 19:15:27 -06:00
Jason Ekstrand 73ddfbeb85 anv/pipeline: Move wpos and input attachment lowering to lower_nir
This lets us make anv_pipeline_compile_to_nir take a device instead of a
pipeline.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-01-10 19:15:27 -06:00
Matt Turner 32e266a9a5 i965: Compile fp64 funcs only if we do not have 64-bit hardware support
Brown bag fix...
2019-01-10 15:22:17 -08:00
Jason Ekstrand 8ea8727a87 anv/pipeline: Constant fold after apply_pipeline_layout
Thanks to the new NIR load_descriptor intrinsic added by the UBO/SSBO
lowering series, we weren't getting UBO pushing because the UBO range
detection pass couldn't see the constants it needed.  This fixes that
problem with a quick round of constant folding.  Because we're folding
we no longer need to go out of our way to generate constants when we
lower the vulkan_resource_index intrinsic and we can make it a bit
simpler.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-01-10 20:34:00 +00:00
Rob Clark 031e94dc72 freedreno/a6xx: fix 3d+tiled layout
The last round of fixing 3d layer+level layout skipped the tiled case,
since tiled texture support was not in place yet.  This finishes the
job.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-01-10 14:21:39 -05:00
Rob Clark c92c18c70c freedreno/a6xx: move tile_mode to sampler-view CSO
This is known when the CSO is created, so no need to patch it in later.

Also, it seems like smaller textures where the first level is small
enough to be linear, it seems like we should set linear tile mode.

See: dEQP-GLES3.functional.texture.format.unsized.rgb_unsigned_byte_3d_pot

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-01-10 14:21:39 -05:00
Rob Clark eb625d30b7 freedreno/a6xx: separate stencil restore/resolve fixes
Previously we'd use format/etc from the primary (z32) buffer for the
stencil (s8), due to confusion about rsc vs psurf.  Rework this to drop
extra arg and push down handling of separate stencil case (and make sure
we take the fmt from the right place).

This doesn't completely fix separate-stencil, but at least it avoids the
GPU scribbling over random other cmdstream buffers and causing a bunch
of bogus fails in dEQP.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-01-10 14:21:39 -05:00
Rob Clark 04aff7e42b freedreno: make cmdstream bo's read-only to GPU
If nothing else, this will make problems with cmdstream getting blit
over with pixels easier to track down (ie. faults when it first happens
rather than strange failures later from corrupted cmdstream when a
stateobj is later reused).

(NOTE this somewhat depends on the kernel supporting the flag, and the
iommu implementation.  But the worst case is just that the cmdstream
ends up writeable as before.)

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-01-10 14:21:39 -05:00
Guido Günther 286de96af8 etnaviv: fix typo in cflush_all description
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2019-01-10 18:46:10 +01:00
Eric Engestrom 53fbde4df3 radv: remove a few more unnecessary KHR suffixes
Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v1)
2019-01-10 16:53:44 +00:00
Rhys Perry 0210243923 nir: fix copy-paste error in nir_lower_constant_initializers
Fixes: 393b59e077
    ('nir: Rework nir_lower_constant_initializers() to handle functions')
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-01-10 10:51:52 -06:00
Andres Gomez 6c3164cd08 docs: complete the calendar and release schedule documentation
As suggested by Emil Velikov.

Cc: Dylan Baker <dylan.c.baker@intel.com>
Cc: Juan A. Suarez <jasuarez@igalia.com>
Cc: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-01-10 15:53:02 +02:00