Commit Graph

125942 Commits

Author SHA1 Message Date
Neil Roberts 121b82f638 nir: Add intrinsics for the line width
The first intrinsic is intended to expose the value set by glLineWidth
to shaders internally. The second intrinsic exposes the value actually
sent to the hardware. This may be wider than the first one in order to
implement anti-aliasing. These will be used in later patches to
implement a line smoothing lowering pass.

v2: Add a second intrinsic for the expanded line width for
    anti-aliasing.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5624>
2020-07-06 21:59:16 +00:00
Neil Roberts 2c4616368b v3d: Implement the line coord intrinsic
The line coord intrinsic is loaded from the implicit varying stored in
the same slot as the point coord when drawing lines.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5624>
2020-07-06 21:59:16 +00:00
Neil Roberts 14dd65bb5b compiler: Add a system value for the line coord
The line coord is a coordinate along the axis perpendicular to the line.
It is in the range [0,1] between the two edges of the line. It is
available at least on Broadcom hardware.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5624>
2020-07-06 21:59:15 +00:00
Marcin Ślusarz 3144bc1d33 intel/perf: move query_mask and location out of gen_perf_query_counter
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5399>
2020-07-06 21:43:59 +00:00
Marcin Ślusarz 9f19662550 iris: remove iris_monitor_config
perf_cfg is enough - it already contains almost all necessary
information and is constructed in a more optimal way (O(n) vs O(n^2)
- it uses hash table to build the unique counter list).

"Almost all", because it doesn't contain OA raw counters, but
we should have not exposed them anyway. Quoting Mark Janes:
"I see no reason to include the OA raw counters in the list that
are provided to the user. They are unusable.
The MDAPI library can be used to configure raw counters in a way
that provides esoteric metrics, but that library is written against
INTEL_performance_query."

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5399>
2020-07-06 21:43:59 +00:00
Ilia Mirkin bffee01bd9 a4xx: hook up centroid ij coords
This is necessary now that the compiler respects centroid interpolation,
even in non-MSAA mode. Otherwise the interpolation doesn't work. Fixes a
bunch of dEQP centroid transform feedback tests.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5778>
2020-07-06 20:20:11 +00:00
Jason Ekstrand a6ed1d7fa5 nir: Add docs to nir_lower[_explicit]_io
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand 0bc5a829dd nir: Remove shared support from lower_io
No drivers are using this anymore so we can delete it and not keep
maintaining this legacy code-path.  If any drivers want this in the
future, they should use nir_lower_varst_to_explicit_types followed by
nir_lower_explicit_io.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand be96b069ad nir: Assert that nir_lower_io is only called with allowed modes
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand b019b22c7a panfrost: Only call nir_lower_io on shader_in/out
Gallium drivers should never see nir_var_uniform because gallium lowers
regular uniforms to a UBO.  No GL driver should ever see either
nir_var_mem_shared because that's lowered in GLSL IR.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand 23b7094829 v3d: Only call nir_lower_io on shader_in/out
Gallium drivers should never see nir_var_uniform because gallium lowers
regular uniforms to a UBO.  No GL driver should ever see either
nir_var_mem_shared because that's lowered in GLSL IR.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand 96d99f2ecc vc4: Only call nir_lower_io on shader_in/out
Gallium drivers should never see nir_var_uniform because gallium lowers
regular uniforms to a UBO.  No GL driver should ever see either
nir_var_mem_shared because that's lowered in GLSL IR.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand 786325fdb0 nouveau: Only call nir_lower_io on shader_in/out
Gallium drivers should never see nir_var_uniform because gallium lowers
regular uniforms to a UBO.  No GL driver should ever see either
nir_var_mem_shared because that's lowered in GLSL IR.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand 4f521e596a lima: Only call nir_lower_io on shader_in/out
Gallium drivers should never see nir_var_uniform because gallium lowers
regular uniforms to a UBO.  No GL driver should ever see either
nir_var_mem_shared because that's lowered in GLSL IR.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand 36a9046848 freedreno: Only call nir_lower_io on shader_in/out
Gallium drivers should never see nir_var_uniform because gallium lowers
regular uniforms to a UBO.  No GL driver should ever see either
nir_var_mem_shared because that's lowered in GLSL IR.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Ilia Mirkin fc944428bf ir3: mark ucp_enables as allowed values on all keys
Both vertex and fragment shaders need to have the lowering.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5751>
2020-07-06 18:37:22 +00:00
Christian Gmeiner 01a1926fb9 etnaviv: replace prims-emitted query
As we do not support stream output buffers we only count the primitives
processed by the pipeline. Use the correct query type.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5754>
2020-07-06 18:22:19 +00:00
Ilia Mirkin 42c814158b a4xx: add polygon offset clamp, fix units
For some reason, in order to get all tests to pass, pretty much all
hardware (across vendors) has to program in offset_units * 2. This fixes
dEQP-GLES3.functional.polygon_offset.float32_displacement_with_units.

While we're at it, add polygon offset clamp support.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5763>
2020-07-06 18:01:31 +00:00
Ilia Mirkin 00f9d4b1fd a4xx: add noperspective interpolation support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5753>
2020-07-06 17:35:56 +00:00
Connor Abbott 12e18d9e7a nir: add vec2_index_32bit_offset address format
For turnip, we use the "bindless" model on a6xx. Loads and stores with
the bindless model require a bindless base, which is an immediate field
in the instruction that selects between 5 different 64-bit "bindless
base registers", a 32-bit descriptor index that's added to the base, and
the usual 32-bit offset. The bindless base usually, but not always,
corresponds to the Vulkan descriptor set.  We can handle the case where
the base is non-constant by using a bunch of if-statements, to make it a
little easier in core NIR, and this seems to be what Qualcomm's driver
does too. Therefore, the pointer format we need to use in NIR has a vec2
index, for the bindless base and descriptor index. Plumb this format
through core NIR.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5683>
2020-07-06 16:44:15 +00:00
Connor Abbott 7ab7316003 nir: Refactor load/store intrinsic helper
Add the possibility to specify the source components. This is necessary
to let the UBO/SSBO index have more than one component, and it also lets
us remove a few hand-rolled load intrinsic definitions.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5683>
2020-07-06 16:44:15 +00:00
Jonathan Marek 6d8e2cec81 freedreno/regs: document SS6_UBO state src
Document this new a6xx_state_src value seen in A640/A650 tess traces.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5760>
2020-07-06 15:46:48 +00:00
Rob Clark 0a7b1f9167 freedreno/fdperf: prefer render node
Avoid inadvertantly becoming master if fdperf happens to be the first
thing to open the device.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5762>
2020-07-06 15:08:15 +00:00
Rob Clark 385d036f58 freedreno/fdperf: better compatible string matching
Previously we would match the start of the compatible string, in
a couple of cases, in order to match compatible strings like
"qcom,adreno-630.2".  But these cases would always list a more
generic compatible (ie. "qcom,adreno") as a later choice.  So if
we parse all the compatible strings, we can do a more precise
exact match.

This avoids us accidentially matching on "qcom,adreno-smmu" and
the hilarity that ensues.

Fixes: 5a13507164 ("freedreno/perfcntrs: add fdperf")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5762>
2020-07-06 15:08:15 +00:00
Rob Clark 9c34a3322d freedreno/fdperf: fix print of base address
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5762>
2020-07-06 15:08:15 +00:00
Jason Ekstrand 85761e23ea wsi/x11: Log swapchain status changes
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5672>
2020-07-06 14:49:06 +00:00
Jason Ekstrand b0bbb62325 vulkan/wsi: Don't consider VK_SUBOPTIMAL_KHR to be an error condition
This was causing vkAcquireNextImageKHR to not signal the fences and
semaphores.  In the case where the semaphore was brand new, this could
cause an unsignalled syncobj to be passed into execbuffer2 which it will
reject with -EINVAL leading to VK_ERROR_DEVICE_LOST.  Thanks to Henrik
Rydgård who works on the PPSSPP project for helping me figure this out.

Fixes: ca3cfbf6f1 "vk: Add an initial implementation of the actual..."
Fixes: 778b51f491 "vulkan/wsi: Add a hooks for signaling semaphores..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5672>
2020-07-06 14:49:06 +00:00
Bas Nieuwenhuizen c5d8961b0b Revert "radv: add support for MRTs compaction to avoid holes"
This reverts commit 7a5e6fd25f.

Since we have two different users bisecting issues to this commit, let's
revert.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 7a5e6fd25f "radv: add support for MRTs compaction to avoid holes"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3202
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3228
(Other report in https://gitlab.freedesktop.org/mesa/mesa/-/issues/3151#note_558589)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5758>
2020-07-06 14:06:37 +00:00
Bas Nieuwenhuizen ad913a18b1 radv: Always enable PERFECT_ZPASS_COUNTS.
We have an issue with early depth testing and discard, where
non-perfect counts count the tile if the early depth test succeeds.

We could spend a lot of effort to set this conditionally based
on the presence of the two conditions, but in the presence of
inherited queries let's try this first.

Changing PERFECT_ZPASS_COUNTS since I'm pretty sure this has a lower
performance impact than always using late depth testing.

CC: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3218
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5757>
2020-07-06 13:54:38 +00:00
Bas Nieuwenhuizen ad15149958 radv: Set handle types in Android semaphore/fence import.
Seems like we forgot to set it all this time ...

Fixes: b1444c9ccb "radv: Implement VK_ANDROID_native_buffer."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5759>
2020-07-06 13:40:49 +00:00
Samuel Pitoiset 7b21ce401f radv: disable FMASK compression when drawing with GENERAL layout
Fixes: 96063100 "radv: enable shaderStorageImageMultisample feature on GFX8+"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3219
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/855
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3165>
2020-07-06 13:26:58 +00:00
Jonathan Marek 8453d2941a Revert "nir: Support sysval tess levels in SPIR-V to NIR"
This reverts commit d2d4677b56.

The option is not used by any driver.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5744>
2020-07-06 08:48:10 -04:00
Jonathan Marek 2044bdac4f Revert "nir: Add an option for lowering TessLevelInner/Outer to vecs"
This reverts commit d2df076120.

The option is not used by any driver.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5744>
2020-07-06 08:48:10 -04:00
Jonathan Marek b76c6dcbc5 freedreno/ir3: fix/rework tess levels
The previous version assumes tess level outputs will only be written once
in the shader, however its not possible to guarantee that.

It also assumes all invocations will write all the levels, which is also
not guaranteed.

This is required to fix the "tesselation" and "terraintessellation" demos
with turnip.

The comment about nir_lower_io_to_temporaries in lower_tess_ctrl_block is
removed because nir_lower_io_to_temporaries specifically skips TESS_CTRL
shaders so the comment doesn't make sense.

The split load for tess levels workaround is removed, the new version only
has scalar access unless if ever gets vectorized.

This sets NIR_COMPACT_ARRAYS cap to avoid the glsl tess vec lowering with
gallium. It seems this will also disable "LowerCombinedClipCullDistance",
which I'm not sure was needed or not.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5744>
2020-07-06 08:48:06 -04:00
Jonathan Marek 3c5512ce50 freedreno/layout: fix explicit layout offset not added to slice offset
Accidentally broke this when rebasing the offending commit.

My use case with non-zero explicit offset is UV plane of UBWC NV12, and
only the UBWC slice offset is used for the UBWC sampler, so I didn't catch
it immediately.

Fixes: d53dc6c376 ("freedreno/fdl6: rework layout code a bit (reduce linear align to 64 bytes)")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5761>
2020-07-06 11:24:59 +00:00
Bas Nieuwenhuizen 01986eaf05 amd/addrlib: fix another C++ one definition rule violation
Clashes with the SI definition.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3116
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5673>
2020-07-06 10:54:01 +00:00
Marcin Ślusarz 00d3b13837 iris: return max counter value for AMD_performance_monitor
glGetPerfMonitorCounterInfoAMD(..., ..., GL_COUNTER_RANGE_AMD, ...)
returned NAN (binary representation of uint64_t(-1) as float) as
a max value.

Fixes: 0fd4359733 ("iris/perf: implement routines to return counter info")

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5473>
2020-07-06 08:40:32 +00:00
Marcin Ślusarz 2f4a112ec4 st/mesa: fix reporting of float perf counters max value
Some Piglit tests (rightfully) fail because of min >= max when exposed
to perf counters that do not explicitly define their max value.

Failing tests:
spec/amd_performance_monitor/api/test_counter_info
spec/amd_performance_monitor/vc4/test_counter_info

u32/u64 changes are no-ops.

Fixes: 4cd1cfb983 ("st/mesa: implement GL_AMD_performance_monitor")

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5473>
2020-07-06 08:40:32 +00:00
Dave Airlie 2550531dd6 llvmpipe: enable GL 4.2
mostly just docs patch, features were all complete already

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5724>
2020-07-06 13:48:55 +10:00
Dave Airlie 28ebc8a212 llvmpipe: bump to GL support to GL 4.1
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5724>
2020-07-06 13:30:18 +10:00
Dave Airlie df6682d782 llvmpipe: bump texture/scene limits to enable GL 4.1
Do we need to make this more dynamic? or have some options for vmware
embedded?

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5724>
2020-07-06 13:29:43 +10:00
Dave Airlie 0ca266025a mesa/version: only enable GL4.1 with correct limits.
I haven't tested all the limits, but these two should be enough
for driver writers to realise.

I've also submitted a minmax test for piglit to test this.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5727>
2020-07-06 12:51:30 +10:00
Jonathan Marek 1a83279da5 turnip: enable 420_UNORM formats
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4600>
2020-07-05 15:25:17 +00:00
Jonathan Marek 7af2a0b9bc turnip: support multi-image layouts
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4600>
2020-07-05 15:25:17 +00:00
Jonathan Marek 37cd3c256a turnip: clear_blit: pass aspect mask to setup function
Avoids having to duplicate logic to figure out the write mask on D24S8

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4600>
2020-07-05 15:25:17 +00:00
Ilia Mirkin ef11d5fc8b st/mesa: allow R8 to not be exposed as renderable by driver
A3xx GPUs support RG8 and RGBA8, but not R8 for rendering. Add RG8 as
fallbacks for integer formats, and require a renderable format to be
picked for all R8 variants.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5748>
2020-07-05 00:24:04 -04:00
Eric Engestrom 9e2afe4f05 mesa/glformats: make _mesa_gles_error_check_format_and_type() more consistent
Let's consistently use the following code format instead of relying on
falling through to `default`:

    if (!req)
       return GL_INVALID_OPERATION;
    break;

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5729>
2020-07-04 09:14:42 +00:00
Benjamin Cheng a573c8cd47 drirc: Add picom to adaptive_sync exclusion list
The compton compositor is unmaintained, with a new fork named picom taking
its place. As with the other compositors (including compton), adaptive
sync should not be enabled.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5740>
2020-07-04 08:46:12 +00:00
Jonathan Marek 19f3c79c7e turnip: fix tess param bo size calculation
ir3 already calculates the stride in the tess param bo, so use that instead
of a incorrect calculation. The calculation of per_vertex_output_size /
per_patch_output_size is wrong because it counts dwords instead of bytes,
and what it counts for per_vertex_output_size is a per-patch size because
the glsl type is already an array of # vertex/patch elements.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5743>
2020-07-04 03:33:43 +00:00
Vinson Lee 395511d169 nir: Add nir_lower_clip_disable.c to SCons build.
Fixes: fb2fe802f6 ("nir: add lowering pass for clip plane enabling")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3217
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5741>
2020-07-04 01:04:54 +00:00