Commit Graph

140124 Commits

Author SHA1 Message Date
Yiwei Zhang 78b30a0696 venus: implement vn_GetMemoryAndroidHardwareBufferANDROID
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10960>
2021-05-26 20:26:19 +00:00
Yiwei Zhang 7370f33953 venus: implement AHB allocation and import (part 2/2)
TODO left to fix plane count > 1 case for external memory.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10960>
2021-05-26 20:26:19 +00:00
Yiwei Zhang 1743892f24 venus: implement AHB allocation and import (part 1/2)
This patch refactors the struct look up logic for memory allocation, and
it prepares the necessary info for ahb allocation and import.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10960>
2021-05-26 20:26:19 +00:00
Yiwei Zhang 4958ce582c venus: refactor device memory fd import
This patch wraps up fd import logic, which will be used later by ahb
import. This patch also removes a redundant check in need_bo.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10960>
2021-05-26 20:26:19 +00:00
Yiwei Zhang 910c0602c4 venus: implement image creation for ahb handle type
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10960>
2021-05-26 20:26:18 +00:00
Yiwei Zhang 19b7b09885 venus: prepare image creation helpers for AHB
Store image create info for deferred creation of AHB image.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10960>
2021-05-26 20:26:18 +00:00
Yiwei Zhang 53e35f716e venus: fix AHB image format properties query
1. bail early if there's no compatiable AHB format
2. check against the corresponding drm format modifier

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10960>
2021-05-26 20:26:18 +00:00
Yiwei Zhang 7f52544f6f venus: fix vn_GetAndroidHardwareBufferPropertiesANDROID
Append a VK_FORMAT_FEATURE_MIDPOINT_CHROMA_SAMPLES_BIT bit to pass cts.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10960>
2021-05-26 20:26:18 +00:00
Yiwei Zhang 8c06f018a4 venus: complete the format conversion between AHB and Vulkan
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10960>
2021-05-26 20:26:18 +00:00
Yiwei Zhang c82e836490 venus: tiny refactor of vn_android_get_gralloc_buffer_info
Return false if the queried drm format modifier is invalid.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10960>
2021-05-26 20:26:18 +00:00
Samuel Pitoiset b9ff51f750 radv: move all game workarounds to drirc
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10978>
2021-05-26 18:48:04 +00:00
Samuel Pitoiset 25a6c35bbc util/drirc: use application_name_match for the SotTR RADV workaround
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10978>
2021-05-26 18:48:04 +00:00
Samuel Pitoiset 8aa735e856 radv: add few new drirc options
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10978>
2021-05-26 18:48:04 +00:00
Samuel Pitoiset 34f5407b8e util/drirc: make engine_versions an optional field
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10978>
2021-05-26 18:48:04 +00:00
Tomeu Vizoso 81d132504b ci/freedreno: Add spec@arb_copy_buffer@dlist flake on a530
Crashes occasionally, probably due to the same cause as
spec@arb_copy_buffer@intra-buffer-copy.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7987>
2021-05-26 18:20:19 +00:00
Tomeu Vizoso 412d279fbc ci/freedreno: Add new flake after "ci: Configure DUTs for max performance"
Probably was made more probable since the cpufreq or devfreq changes. Or
maybe due to the lack of runtime PM?

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7987>
2021-05-26 18:20:19 +00:00
Tomeu Vizoso 1ccc6e7ce4 ci/freedreno: Fix name of flake
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7987>
2021-05-26 18:20:19 +00:00
Tomeu Vizoso e1f75d17da ci/zink: Add nearest_linear_mirror_l8_pot flake
Crashed once at https://gitlab.freedesktop.org/mesa/mesa/-/jobs/10116149

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7987>
2021-05-26 18:20:19 +00:00
Tomeu Vizoso 26079868a7 ci/freedreno: Add depth32f_stencil8 flakes
Started happening after disabling cpufreq, devfreq and runtime PM.

At least one of these fail in each run, so it's blocking MRs.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7987>
2021-05-26 18:20:19 +00:00
Tomeu Vizoso a15cf1ecab radeonsi/ci: Add new Piglit failures
These appeared after the execution order of tests changed after a Piglit
upgrade.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7987>
2021-05-26 18:20:19 +00:00
Antonio Caggiano 8e470457de ci: Add a manual job for tracking the performance of Freedreno
Use Piglit's replay profile to measure and store the time that frames
take to render in the GPU.

This job won't run automatically in regular pipelines, but will be
triggered automatically by a script for every successful pre-merge
pipeline.

This is because we want to generate performance data for every relevant
commit merged in main, but we don't want to keep a device busy during
the pre-merge run.

Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-By: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7987>
2021-05-26 18:20:19 +00:00
Tomeu Vizoso 93138ef122 ci: Uprev apitrace to 170424754bb4 "retrace: Get --loop to work without rewinding"
Needed to be able to replay traces for performance tracking.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-By: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7987>
2021-05-26 18:20:19 +00:00
Tomeu Vizoso cea379549e ci: Uprev piglit to eee7d89611cf "tests: Replay profile frame times"
So we can measure GPU times when replaying traces.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-By: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7987>
2021-05-26 18:20:19 +00:00
Tomeu Vizoso eef5409df4 ci: Configure DUTs for max performance
Lock CPU and GPU frequency scaling on devices so to speed up test
execution and lower the variation of frame times from performance replay
jobs.

Also disable autosuspend of the GPU device.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-By: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7987>
2021-05-26 18:20:19 +00:00
Alyssa Rosenzweig 8fc913fde2 panfrost: Expose PIPE_CAP_SHAREABLE_SHADERS
Now that the compile entrypoints don't touch the context, it's clear
that we can support this. Note, even though the pools for shaders and
descriptors are referenced from particular contexts, they are unowned
pools -- once uploaded, any thread can use the results.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10976>
2021-05-26 18:05:47 +00:00
Alyssa Rosenzweig 4b984c494c panfrost: Don't take ctx in panfrost_shader_compile
Complicates validation of PIPE_CAP_SHAREABLE_SHADERS.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10976>
2021-05-26 18:05:47 +00:00
Alyssa Rosenzweig 7b4a76f493 panfrost: Inline pan_prepare_shader_descriptor
Complicates the next patch.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10976>
2021-05-26 18:05:47 +00:00
Anuj Phogat 6bb66b78a9 intel/gfx12+: Add Wa_14013840143
Cc: mesa-stable
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10984>
2021-05-26 17:42:21 +00:00
Samuel Pitoiset 69ae02151d radv: remove DFSM
DFSM has never been enabled by default because it was slower.
RadeonSI is also dropping support for this because they discovered
that's actually not efficient in practice.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10968>
2021-05-26 17:22:14 +00:00
Mike Blumenkrantz f0f0a21f13 zink: ci updates
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11007>
2021-05-26 16:39:34 +00:00
Mike Blumenkrantz a9d3b00502 zink: remove weird lod hack for texturing
this breaks texturing in non-fragment stages and is unnecessary
due to using nir_lower_tex

Cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11007>
2021-05-26 16:39:34 +00:00
Erik Faye-Lund a545b6eda0 ci: downgrade sphinx to v3.x
Sphinx 4.0 was recently released, but sadly the theme we're using is not
yet compatible with Sphinx 4.0.

So let's limit the sphinx-version we're using to a version before Sphinx
4.0 for now.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4843
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11005>
2021-05-26 14:48:12 +00:00
Samuel Pitoiset f8f963f800 radv: stop reporting ACO from the device name
ACO is the default compiler for almost a year from now, so it should
be fine to replace RADV/ACO by just RADV. LLVM is still added
when RADV_DEBUG=llvm is used for convenience.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10972>
2021-05-26 15:58:54 +02:00
Rhys Perry b5f2af86cf radv: fix formatting of radv_dri_options
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10980>
2021-05-26 13:29:47 +00:00
Rhys Perry 4e4dd4f842 radv: workaround incorrect depthBiasConstantFactor by Path of Exile
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4677
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10980>
2021-05-26 13:29:47 +00:00
Rhys Perry 665f11e829 radv: add radv_absolute_depth_bias
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10980>
2021-05-26 13:29:47 +00:00
Mike Blumenkrantz ceb7225057 radv: set maxVertexInputAttributeOffset to UINT32_MAX
this is what amdvlk uses

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10827>
2021-05-26 12:24:39 +00:00
Mike Blumenkrantz 1e9dc0474e radv: make radv_pipeline::attrib_ends 32bit
this is needed to support larger vertex attribute offsets

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10827>
2021-05-26 12:24:39 +00:00
Rhys Perry 7d23ea20a0 radv: don't allocate DCC predicate if the image doesn't use DCC
Fixes replay of RenderDoc captures created before a7c0cf500b.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10983>
2021-05-26 12:06:33 +00:00
Samuel Pitoiset 729ebe4b17 aco: fix emitting discard when the program just ends
For fragment shaders that only contain a discard, the exec mask has
to be zero'd and everything discarded.

It seems unnecessary to emit an export here because if the FS has no
exports, the compiler already emits a null export at the end.

Fixes incorrect hair rendering in Detroit: Become Human.

fossil-db (Sienna Cichlid):
Totals from 3 (0.00% of 149839) affected shaders:
CodeSize: 2896 -> 2872 (-0.83%)
Instrs: 556 -> 553 (-0.54%)
Latency: 29266 -> 29214 (-0.18%)
InvThroughput: 3374 -> 3372 (-0.06%)

Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10955>
2021-05-26 10:32:59 +00:00
Iago Toral Quiroga 5283c6d47b v3dv: implement VK_KHR_bind_memory2
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11001>
2021-05-26 10:17:53 +00:00
Erik Faye-Lund ea003df98e v3d: use helper to simplify things
We can use the util_prim_restart_index_from_size helper to avoid
open-coding the implicit index size here.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10981>
2021-05-26 09:43:40 +00:00
Iago Toral Quiroga 6a847cbe1d v3dv: implement VK_KHR_maintenance3
We don't have any special restrictions associated with the number
of descriptors in a set other than maybe not exceeding what we can
put in a single memory allocation, so in practice, applications will
be limited by the per-stage contraints defined by other Vulkan limits.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10970>
2021-05-26 07:18:19 +00:00
Iago Toral Quiroga f7ce44b6e5 v3dv: define V3D_MAX_BUFFER_RANGE
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10970>
2021-05-26 07:18:19 +00:00
Samuel Pitoiset 9984ebf173 radv: use radv_dcc_enabled() for the FB mip flush workaround
This has no effects because radv_image_has_CB_metadata() still
accounts for DCC which is incorrect. This should be changed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10667>
2021-05-26 06:59:35 +00:00
Samuel Pitoiset 4631a52f8d radv: do not decompress DCC for partial resolves if stores are supported
It seems unnecessary.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10667>
2021-05-26 06:59:35 +00:00
Samuel Pitoiset 7af5a0c1b9 radv: only init DCC if compressed in the HW resolve path
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10667>
2021-05-26 06:59:35 +00:00
Samuel Pitoiset ff38e3aadd radv: only mark DCC as compressed when drawing if layout allows it
Just having DCC enabled on the base level doesn't mean we are
using compressed rendering.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10667>
2021-05-26 06:59:35 +00:00
Samuel Pitoiset 75d7c752af radv: remove redundant call to radv_dcc_enabled()
radv_layout_dcc_compressed() is now per level.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10667>
2021-05-26 06:59:35 +00:00
Samuel Pitoiset bdb9634151 radv: pass an image range to radv_layout_dcc_compressed()
With DCC and mipmaps, some mips can't be compressed and it makes
sense to check this here.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10667>
2021-05-26 06:59:35 +00:00