Commit Graph

105732 Commits

Author SHA1 Message Date
Emil Velikov 77ff0bfb5f bin/get-pick-list.sh: handle unofficial "broken by" tag
We have a number of cases were devs will use a tag "broken by".
While it's not something officially documented or recommended, checking
for it is trivial enough.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-11-15 15:55:47 +00:00
Emil Velikov 209525aafb bin/get-pick-list.sh: handle fixes tag with missing colon
Every so often, we forget to add the colon after "fixes". Trivially
tweak the script to catch it.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-11-15 15:55:44 +00:00
Emil Velikov b7418d1f3f bin/get-pick-list.sh: flesh out is_sha_nomination
Refactor is_fixes_nomination into a is_sha_nomination helper. This way
we can reuse it for more than the usual "Fixes:" tag.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-11-15 15:55:40 +00:00
Emil Velikov 533fead423 bin/get-pick-list.sh: tweak the commit sha matching pattern
Currently we match on:
 - any arbitrary length of,
 - any a-z A-Z and 0-9 characters

At the same time, a commit sha consists of lowercase hexadecimal
numbers. Any sha shorter than 8 characters is ambiguous - in some cases
even 11+ are required.

So change the pattern to a-f0-9 and adjust the length to 8-40.

As we're here we could use a single grep, instead of the grep/sed combo.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-11-15 15:55:36 +00:00
Emil Velikov 181203f3c5 bin/get-pick-list.sh: handle the fixes tag
Having a separate script to handle the fixes tag, brings a number of
issues, so let's fold it in get-pick-list.sh.

v2:
 - pass the sha as argument to the function
 - Keep original sed pattern

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-11-15 15:55:31 +00:00
Emil Velikov e6b3a3b201 bin/get-pick-list.sh: handle "typod" usecase.
As the comment in get-typod-pick-list.sh says, there's little point in
having a duplicate file.

Add the new pattern + tag to get-pick-list.sh and nuke this file.

v2:
 - pass the sha as argument to the function
 - grep -q instead of using a variable (Eric)

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-11-15 15:55:24 +00:00
Emil Velikov fac10169bb bin/get-pick-list.sh: prefix output with "[stable] "
With later commits we'll fold all the different scripts into one.
Add the explicit prefix, so that we know the origin of the nomination

v2:
 - pass the sha as argument to the function
 - swap $tag = none for an else statment (Juan)
 - grep -q instead of using a variable (Eric)
 - print the tag and commit oneline separately (Eric)

v3:
 - drop unused "tag=none" assignment (Juan)
 - typo nomination

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com> (v2)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-11-15 15:54:48 +00:00
Emil Velikov 559c32d241 bin/get-pick-list.sh: simplify git oneline printing
Currently we force disable the pager via "|cat" where --no-pager
exists. Additionally we could use git show instead of git log -n1.

Use those for a slightly more understandable code.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-11-15 15:51:24 +00:00
Emil Velikov 7d9556681d docs: document the staging branch and add reference to it
A while back we agreed that having a live/staging branch is beneficial.
Sadly we forgot to document that, so here is my first attempt.

Document the caveat that the branch history is not stable.

CC: Andres Gomez <agomez@igalia.com>
CC: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
2018-11-15 15:48:15 +00:00
Emil Velikov 4ae749acf1 docs/submittingpatches.html: correctly handle the <p> tag
As pointed out by the w3c validator.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
2018-11-15 15:48:13 +00:00
Emil Velikov 19a081473f docs/releasing.html: polish cherry-picking/testing text
Reword slightly and highlight the important parts of the text.

CC: Andres Gomez <agomez@igalia.com>
CC: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
2018-11-15 15:48:08 +00:00
Guido Günther ab5653680e etnaviv: Make sure rs alignment checks match
etna_resource_alloc and etna_resource_from_handle currently use different checks.
This leads to

   etna_resource_from_handle:492: target=2, format=PIPE_FORMAT_B8G8R8X8_UNORM, 1080x1920x1, array_size=1, last_level=0, nr_samples=0, usage=0, bind=8000a, flags=0
   etna_resource_from_handle:541: BO stride 4320 is too small for RS engine width padding (4352, format PIPE_FORMAT_B8G8R8X8_UNORM)

since etna_resource_from_handle wants to be aligned to a 16 byte
boundary while the etna_resource_alloc does not.

Adjust the two checks by using a common function.

Broken by baff59ebf0

Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2018-11-15 16:38:35 +01:00
Juan A. Suarez Romero 52368ef83a docs: update calendar, add news item and link release notes for 18.2.5
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-11-15 13:08:58 +00:00
Juan A. Suarez Romero aa7a419b8b docs: add sha256 checksums for 18.2.5
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 79be754f9a74a43b5748dc0934241e7701cb9581)
2018-11-15 13:06:12 +00:00
Juan A. Suarez Romero e53ec08931 docs: add release notes for 18.2.5
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit f34bddc325c414cb8ee21666bd307512577efdef)
2018-11-15 13:06:10 +00:00
Marek Olšák 9367514524 radeonsi: fix video APIs on Raven2
This was missed when I added the new enum.

Cc: 18.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2018-11-14 17:08:34 -05:00
Andrii Simiklit e13dd70581 i965: avoid 'unused variable' warnings
1. brw_pipe_control.c:311:34: warning:
    unused variable ‘devinfo’
2. brw_program_binary.c:209:19: warning:
    unused variable ‘gen_size’
3. brw_program_binary.c:216:19: warning:
    unused variable ‘nir_size’

v2: Changes for unreproducible issues were removed

Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-11-14 14:41:58 +00:00
Andrii Simiklit 7aca650122 compiler: avoid 'unused variable' warnings
1. nir/nir_lower_vars_to_ssa.c:691:21: warning:
       unused variable ‘var’
       nir_variable *var = path->path[0]->var;

v2: Changes for some part of 'may be used uninitialized'
    warnings were removed, seems like it is a compiler issue.
        ( Eric Engestrom <eric.engestrom@intel.com> )
    Possible like this one:
    https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46684
    This issue is flagged as duplicate but an
    original one is not closed yet.

Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-11-14 13:35:38 +00:00
Andrii Simiklit 69ee49ac46 intel/tools: avoid 'unused variable' warnings
1. tools/aub_read.c:271:31: warning: unused variable ‘end’
    const uint32_t *p = data, *end = data + data_len, *next;

2. tools/aub_mem.c:292:13: warning: unused variable ‘res’
       void *res = mmap((uint8_t *)bo.map + map_offset, 4096, PROT_READ,
   tools/aub_mem.c:357:13: warning: unused variable ‘res’
       void *res = mmap((uint8_t *)bo.map + (page - bo.addr), 4096, PROT_READ,

v2: The i965_disasm.c changes was moved into a separate patch
    The 'end' variable declared separately with MAYBE_UNUSED
    to avoid effect of it to other variables.
       ( Eric Engestrom <eric.engestrom@intel.com> )

Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-11-14 13:35:28 +00:00
Thomas Hellstrom 25b48e3df9 st/xa: Bump minor
Bump minor to signal support for new formats and higher precision
solid pictures.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2018-11-14 13:12:09 +01:00
Thomas Hellstrom c9085f6d3b st/xa: Support Component Alpha with trivial blending
Support Component Alpha for those composite operations that do not require
per-channel alpha blending.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2018-11-14 13:12:09 +01:00
Thomas Hellstrom 0477d17f51 st/xa: Minor renderer cleanups
constify function arguments to clean up the code a bit.

Reported-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2018-11-14 13:12:09 +01:00
Thomas Hellstrom 56aa23b146 st/xa: Fix transformations when we have both source and mask samplers
In the case when we had both source and mask samplers, transformations were
typically not applied correctly.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2018-11-14 13:12:09 +01:00
Thomas Hellstrom e1298def9f st/xa: Support a couple of new formats
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2018-11-14 13:12:09 +01:00
Thomas Hellstrom 258d20152a st/xa: Support higher color precision for solid pictures
The only solid fill picture type we supported only had 8 bit color
channels. Add a new solid picture type that supports float channels.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2018-11-14 13:11:51 +01:00
Thomas Hellstrom d86ad38205 st/xa: Render update. Better support for solid pictures
Remove unused and obsolete code for gradients and component-alpha
Support solid source- and mask pictures using a variable number
of samplers in the composite pipeline rather than the fixed number
we used before.

Tested using rendercheck for XA.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2018-11-14 13:07:00 +01:00
Gert Wollny 4bba280937 nir: Allow to skip integer ops in nir_lower_to_source_mods
Some hardware supports source mods only for float operations. Make it
possible to skip lowering to source mods in these cases.

v2: use option flags instead of a boolean (Jason Ekstrand)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-11-14 08:59:26 +01:00
Karol Herbst b4380cb070 nir/spirv: cast shift operand to u32
v2: fix for specialization constants as well

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Karol Herbst <kherbst@redhat.com>
2018-11-14 02:09:11 +01:00
Karol Herbst 099728b115 nir: replace nir_load_system_value calls with appropiate builder functions
this helps reduce the overall code changes when a bit_size parameter is
added to nir_load_system_value

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
2018-11-14 02:09:11 +01:00
Karol Herbst 80db331c2d nir: add const_index parameters to system value builder function
this allows to replace some nir_load_system_value calls with the specific
system value constructor

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
2018-11-14 02:09:11 +01:00
Timothy Arceri 95b513c937 radv: make use of nir_move_out_const_to_consumer()
vkpipeline-db results:

Totals from affected shaders:
SGPRS: 28400 -> 28576 (0.62 %)
VGPRS: 27916 -> 27692 (-0.80 %)
Spilled SGPRs: 140 -> 138 (-1.43 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 1534456 -> 1520560 (-0.91 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 3541 -> 3582 (1.16 %)
Wait states: 0 -> 0 (0.00 %)

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-11-14 09:41:50 +11:00
Lionel Landwerlin ea53f76d7b anv: move helper function internally
It's only used in anv_image.c

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-11-13 18:56:31 +00:00
Lionel Landwerlin 8b00d3d6eb anv: use image aspects rather than computed ones
This shouldn't make any difference but I feel uneasy to use the
expanded aspects that do not represent the image in its entirety. If
we ever change the implementation of the anv_image_aspect_to_plane()
helper, this is safer.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-11-13 18:56:27 +00:00
Lionel Landwerlin 465de47bad anv: associate vulkan formats with aspects
This will make it easier to associate an aspect with a plane number.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-11-13 18:56:24 +00:00
Lionel Landwerlin fe3b7fe982 anv/lower_ycbcr: make sure to set 0s on all components
To play around with debugging, we might want to disable one or the
other component. Having 0s as default values makes this work.
Otherwise we might have NULL components, leading to crashes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-11-13 18:56:21 +00:00
Lionel Landwerlin ee8d65c25a anv/image: remove unused parameter
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-11-13 18:56:13 +00:00
Lionel Landwerlin 352e297091 anv: simplify internal address offset
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-11-13 18:56:10 +00:00
Eric Engestrom 4fa2fb3524 meson: fix wayland-less builds
Those empty variables in the !wayland case are useless and running that
meson.build with them breaks the build:

  [287/850] Generating wayland-drm-client-protocol.h with a custom command.
  FAILED: src/egl/wayland/wayland-drm/wayland-drm-client-protocol.h
  client-header ../src/egl/wayland/wayland-drm/wayland-drm.xml src/egl/wayland/wayland-drm/wayland-drm-client-protocol.h
  /bin/sh: client-header: command not found
  ninja: build stopped: subcommand failed.

Fixes: d1992255bb "meson: Add build Intel "anv" vulkan driver"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-11-13 17:25:02 +00:00
Eric Engestrom 7df80de6e6 gbm: remove unnecessary meson include
`inc_wayland_drm` is only used if wayland is built, and it's already
added in that case a few lines below.

Fixes: a29869e872 "gbm: Don't traverse backwards for includes"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-11-13 17:25:02 +00:00
Eric Engestrom 3832db275e meson: only run vulkan's meson.build when building vulkan
Fixes: d1992255bb "meson: Add build Intel "anv" vulkan driver"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-11-13 17:25:02 +00:00
Eric Engestrom 4f1ae271e1 xmlpool: update translation po files
These files are close to 4 years out of date; a lot's changed since.
Let's just check in a recently-regenerated version.

Changes generated by running `ninja xmlpool-{pot,update-po,gmo}`.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
2018-11-13 17:25:02 +00:00
Eric Engestrom 1e918e5bef REVIEWERS: add Vulkan reviewer group
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
2018-11-13 17:25:02 +00:00
Eric Engestrom 59b3335496 REVIEWERS: add Emil as EGL reviewer
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
2018-11-13 17:25:02 +00:00
Eric Engestrom 923aca84b2 REVIEWERS: add include path for EGL
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
2018-11-13 17:25:02 +00:00
Toni Lönnberg 2af4e3345f intel/genxml: Add engine definition to render engine instructions (gen11)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.

v2: Divided into individual patches for each gen

v3: Added additional engine definitions.

v4: Added missing engine definition to MI_TOPOLOGY_FILTER.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-11-13 15:10:12 +00:00
Toni Lönnberg 1921982d3e intel/genxml: Add engine definition to render engine instructions (gen10)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.

v2: Divided into individual patches for each gen

v3: Added additional engine definitions.

v4: Added missing engine definition to MI_TOPOLOGY_FILTER.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-11-13 15:10:12 +00:00
Toni Lönnberg 030fe0f981 intel/genxml: Add engine definition to render engine instructions (gen9)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.

v2: Divided into individual patches for each gen

v3: Added additional engine definitions.

v4: Added more missing engine definitions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-11-13 15:10:12 +00:00
Toni Lönnberg 12e34fc7ba intel/genxml: Add engine definition to render engine instructions (gen8)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.

v2: Divided into individual patches for each gen

v3: Added additional engine definitions.

v4: Added missing engine tag for MI_TOPOLOGY_FILTER and MI_LOAD_URB_MEM.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-11-13 15:10:12 +00:00
Toni Lönnberg a883fd2277 intel/genxml: Add engine definition to render engine instructions (gen75)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.

v2: Divided into individual patches for each gen

v3: Added additional engine definitions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-11-13 15:10:12 +00:00
Toni Lönnberg 27cf6252d3 intel/genxml: Add engine definition to render engine instructions (gen7)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.

v2: Divided into individual patches for each gen

v3: Added additional engine definitions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-11-13 15:10:12 +00:00