Commit Graph

149908 Commits

Author SHA1 Message Date
Lionel Landwerlin 712d8fb043 intel/nir: document RT builder
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:25 +00:00
Lionel Landwerlin e06f9d49bc nir/lower_shader_calls: consider relocated constants as rematerializable
After all they're constants.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:25 +00:00
Lionel Landwerlin 0465714790 intel/nir/rt: add more helpers for ray queries
v2: Split stack_id helper in sync/async version (Caio)
    Fixup a few bit field mistake (Caio)
    Simplify some bitfield manipulations (Caio)

v3: Remove duplicated helper (Caio)
    Simplify brw_nir_rt_set_dword_bit_at (Caio)
    Comment brw_nir_rt_query_mark_init (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:25 +00:00
Lionel Landwerlin d5b994ec8a intel/nir/rt: make RT manipulation helpers helper invocations ready
Since we need to be able to perform ray queries in helper invocations,
we need to have all the helpers properly tag their load/store
operations so that they operate in helper lanes.

v2: Switch from macros to inline functions (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:25 +00:00
Lionel Landwerlin fb69fed65b intel/nir: document committed argument
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:25 +00:00
Lionel Landwerlin b0624e414f intel/fs: make trivial shader complete tracing operations with missing shaders
v2: Apply workaround only on < DG2-512-C0 & < DG2-128-B0

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:25 +00:00
Lionel Landwerlin 35bd19f53d intel/nir/rt: load bvh_level value off mem_hit structure
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:25 +00:00
Lionel Landwerlin 6d9ae6ec1e intel: add a new intrinsic to get the shader stage from bindless shaders
We'll use this to apply ray tracing operations in our trivial return
shader based on the stage we're in.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:25 +00:00
Lionel Landwerlin b8f087b0e6 nir/builder: add nir_ior_imm() helper
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:25 +00:00
Lionel Landwerlin bb40e999d1 intel/nir: use a single intel intrinsic to deal with ray traversal
In the future we'll want to reuse this intrinsic to deal with ray
queries. Ray queries will use a different global pointer and
programmatically change the control/level arguments of the trace send
instruction.

v2: Comment on barrier after sync trace instruction (Caio)
    Generalize lsc helper (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:25 +00:00
Lionel Landwerlin 39f6cd5d79 intel/nir: fix shader call lowering
We're replacing a generic instruction by an intel specific one, we
need to remove the previous instruction.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c5a42e4010 ("intel/fs: fix shader call lowering pass")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:25 +00:00
Lionel Landwerlin 2665595244 intel/fs: limit FS dispatch to SIMD16 when using ray queries
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:25 +00:00
Lionel Landwerlin 57eed6698b intel/compiler: tracker number of ray queries in prog_data
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:25 +00:00
Lionel Landwerlin 9b366243ed intel/fs: load more fields from BVH instance leafs
v2: Fixup mask (Caio)
    Drop old comment (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:24 +00:00
Lionel Landwerlin c89024e446 intel/fs: don't set allow_sample_mask for CS intrinsics
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 77486db867 ("intel/fs: Disable sample mask predication for scratch stores")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:24 +00:00
Lionel Landwerlin 9d22f8ed23 intel/fs: add support for ACCESS_ENABLE_HELPER
v2: Factor out fragment shader masking on send messages (Caio)
    Update comments (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:24 +00:00
Lionel Landwerlin c199f44d17 intel/fs: name sources for A64 opcodes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:24 +00:00
Lionel Landwerlin 23ce94ff7e intel/nir/rt: add a new number of SIMD lanes per DSS helper
v2: Add prefix brw_nir_rt (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:24 +00:00
Lionel Landwerlin 61c9b7a82e intel/fs: add support for Eu/Thread/Lane id
This index will be used for accessing ray query data in memory.

v2: Drop a MOV (Caio)

v3: Rework back code emission (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:24 +00:00
Lionel Landwerlin 3dabe93257 intel/fs: rework dss_id opcode into generic opcode
We'll want different types of IDs based on topology. Let's make this
more flexible and also move the bit shifting code a layer above where
it's easier to do bitshifting operations, especially if you need to
stash things into temporary registers.

v2: Keep previous comment.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:24 +00:00
Lionel Landwerlin 4deb8e86df nir: change intel dss_id intrinsic to topology_id
This will allow to reuse the same intrinsic for various topology based
ID.

v2: fix intrinsic comment (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:24 +00:00
Lionel Landwerlin fdb74a77d2 intel/ds: fix compilation with perfetto
Forgot to test with perfetto...

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9da3d714b8 ("anv: add dynamic rendering traces")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5992
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Tested-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14914>
2022-02-08 12:29:21 +00:00
Dylan Baker a52e4871fe meson: add radv to meson devenv
I either rebased this out of the original PR, just failed to commit it
and then reset it.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14879>
2022-02-07 21:22:12 -08:00
Mike Blumenkrantz 8335fdfeaf vk/sync: add asserts for timeline semaphore count matching
spec requires that the number of timeline waits/signals matches the
base number of waits/signals if there are any timeline semaphores
being processed by the submit, so asserting here is in line with what
validation will yield

failure to match these will also hang every driver I've tested, so asserting
here potentially saves some people their desktop session

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14741>
2022-02-08 04:09:13 +00:00
Mike Blumenkrantz 388f23eabe zink: min/max blit region in coverage functions
these regions might not have the coords in the correct order, which will
cause them to fail intersection tests, resulting in clears that are never
applied

cc: mesa-stable

fixes:
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_all_buffer_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_color_and_depth_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_color_and_stencil_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_linear_filter_color_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_magnifying_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_minifying_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_missing_buffers_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_nearest_filter_color_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_negative_dimensions_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_negative_height_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_negative_width_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_scissor_blit

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14867>
2022-02-08 03:42:01 +00:00
Mike Blumenkrantz b656ab75a6 zink: reject invalid draws
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14859>
2022-02-08 03:29:45 +00:00
Mike Blumenkrantz e38c13830f zink: fix PIPE_CAP_TGSI_BALLOT export conditional
this requires VK_EXT_shader_subgroup_ballot

cc: mesa-stable

fixes (lavapipe):
KHR-GL46.shader_ballot_tests.ShaderBallotAvailability
KHR-GL46.shader_ballot_tests.ShaderBallotFunctionRead

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14858>
2022-02-08 03:16:06 +00:00
Mike Blumenkrantz 8907964dcd zink: export PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
this is supported and has been for a while

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14858>
2022-02-08 03:16:06 +00:00
Pierre-Eric Pelloux-Prayer 413bf889e7 radeonsi/blit: relax conditions to use sdma copy for prime buffers
We don't need to check if it's imported: PIPE_BIND_DRI_PRIME is enough.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14615>
2022-02-08 00:13:07 +00:00
Pierre-Eric Pelloux-Prayer 3b27ad1504 radeonsi: create prime buffers as uncached
8791e831b1 marked imported prime buffers as uncached (useful when prime
buffer is allocated by the display GPU), but they should also be created
as uncached (useful when allocated by the render GPU).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14615>
2022-02-08 00:13:07 +00:00
Pierre-Eric Pelloux-Prayer 18c38bf78f gallium: rename PIPE_BIND_DRI_PRIME
The new name PIPE_BIND_PRIME_BLIT_DST is more precise.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14615>
2022-02-08 00:13:07 +00:00
Pierre-Eric Pelloux-Prayer 42c149e36b gallium/dri: add missing PIPE_BIND_DRI_PRIME handling
e9c3dbd046 added PIPE_BIND_DRI_PRIME but it was only set when
importing a prime buffer.

This commit adds handling of this flag in the other codepath = the
one where the prime buffer is allocated by the render GPU.

With this change PIPE_BIND_DRI_PRIME is still only set for the
render GPU - the display GPU will never see this flag; a future
commit will rename it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14615>
2022-02-08 00:13:07 +00:00
Kenneth Graunke 3926be368e ci/iris: Mark qbo tests as flakes
These appear to have some kind of race condition and usually fail,
but sometimes pass.  We had already attempted to mark them as flakes
on amly, but need to mark them as flakes on KBL+ too.

See https://gitlab.freedesktop.org/mesa/mesa/-/jobs/18522605 and
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/18527737 where these
unexpectedly passed on KBL, and also where the top-level test not
being caught by the regex led to failures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14916>
2022-02-07 14:30:52 -08:00
Zoltán Böszörményi df1751a2bb crocus: Enable compat profile the same way as core profile
Signed-off-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11756>
2022-02-07 19:41:44 +00:00
Kenneth Graunke 604d97671b iris: Add support for flushing the blitter (hackily)
To flush the blitter, we need to use MI_FLUSH_DW rather than the usual
PIPE_CONTROL we use on the 3D engine.  Most of our code is set up to
suggest flushes via PIPE_CONTROL commands, however, so we hackily just
emit MI_FLUSH_DW when they ask for any kind of PIPE_CONTROL flush.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14912>
2022-02-07 09:50:01 -08:00
Kenneth Graunke 9c5dc4985b blorp: Assert that blorp_copy() on the blitter can handle it
Safeguards against callers that don't guarantee the necessary things.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14912>
2022-02-07 09:50:01 -08:00
Kenneth Graunke d2646e147b intel/genxml: Add missing MI_FLUSH_DW::Flush CCS field
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14912>
2022-02-07 09:50:01 -08:00
Rhys Perry 7ddad1b93a radv: fix R_02881C_PA_CL_VS_OUT_CNTL with mixed cull/clip distances
Matches radeonsi.

Seems Vulkan CTS doesn't really test cull distances. Removing
VARYING_SLOT_CULL_DIST0/VARYING_SLOT_CULL_DIST1 variables doesn't break
any of dEQP-VK.clipping.*, except for tests which read the variables in
the fragment shader.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5984
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14882>
2022-02-07 12:36:38 +00:00
Danylo Piliaiev 44bdac9849 tu: Implement VK_AMD_buffer_marker to support Graphics Flight Recorder
Graphics Flight Recorder is:
 "The Graphics Flight Recorder (GFR) is a Vulkan layer to help
  trackdown and identify the cause of GPU hangs and crashes.
  It works by instrumenting command buffers with completion tags."

This is a nice little tool which could help quickly identify the call
which hanged. Or if command buffer is executed for too long.

The tiling nature of our GPU shouldn't be a big issue aside from
lower performance.

For non-segfault case, if:
- Hang happens at the same place in cmdbuf and draw/dispatch is not
  finished at that point - it is likely that there is an infinite
  loop in some of the shaders in this draw.
- Hang happens always in different place - likely there is nothing
  wrong and command buffer just takes too long to execute and you
  should try increasing hangcheck_period_ms. If it doesn't help
  it is likely a synchronization issue.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13553>
2022-02-07 12:53:34 +02:00
Daniel Stone b561946497 egl/wayland: Don't replace existing backbuffer in get_buffers
If the surface already has a current backbuffer - say through a
buffer_age query - we do not want to replace it in get_buffers, because
it means the result we'd previously returned them is stale.

If we already have a backbuffer set on the surface, keep it locked in no
matter what until we hit SwapBuffers.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14873>
2022-02-07 09:57:41 +00:00
Daniel Stone 3da8300562 egl/wayland: Reset buffer age when destroying buffers
A buffer age of 0 means that the buffer is uninitialised or has unknown
content. We rely on the buffer age initially being 0 through zalloc when
the surface is first created; when they are first used for a swap, we
set their age to 1, and then we increment the age of every buffer in the
chain with a non-zero age when we swap.

Now that we can release buffers, both through dmabuf-feedback as well as
detecting when we're using a deeper swapchain than the compositor needs,
make sure to reset their age as they are released. Without doing this,
the age will stay as it was before it was released and be incremented,
returning the wrong age to the user the first time a previously-released
buffer slot has been reused.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5977
Fixes: 22d796feb8 ("egl/wayland: break double/tripple buffering feedback loops")
Fixes: b5848b2dac ("egl/wayland: use surface dma-buf feedback to allocate surface buffers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14873>
2022-02-07 09:57:41 +00:00
Emma Anholt fa4390f7bf ci/iris: Add skips and flakes notes for recent #intel-ci logs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14904>
2022-02-07 09:33:59 +00:00
Emma Anholt 0cf32b5079 ci/crocus: Add recent flakes from #intel-ci
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14904>
2022-02-07 09:33:59 +00:00
Emma Anholt 6423045957 ci/softpipe,llvmpipe: Disable Xvfb server reset on piglit runs.
The resets take time that we don't need to spend.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14904>
2022-02-07 09:33:59 +00:00
Samuel Pitoiset 9ea4029f9f Revert "radv: re-apply "Do not access set layout during vkCmdBindDescriptorSets.""
The most famous RADV revert over the past months. This was an issue
in RADV and not an use-after-free (descriptor set layouts can be
destroyed almost at any time).

This reverts commit b775aaff1e.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14621>
2022-02-07 08:24:36 +01:00
Samuel Pitoiset 66f7289d56 radv: add reference counting for descriptor set layouts
The spec states that descriptor set layouts can be destroyed almost
at any time:

   "VkDescriptorSetLayout objects may be accessed by commands that
    operate on descriptor sets allocated using that layout, and those
    descriptor sets must not be updated with vkUpdateDescriptorSets
    after the descriptor set layout has been destroyed. Otherwise,
    descriptor set layouts can be destroyed any time they are not in
    use by an API command."

Based on ANV.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5893
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14621>
2022-02-07 08:24:36 +01:00
Dave Airlie 37c3be6947 crocus: find correct relocation target for the bo.
If we have batch a + b, and writing to batch b, causes batch a
to flush, all the bo->index get reset, and we try to submit a -1
to the kernel.

Look the bo index up when creating relocations.

Fixes crash seen in KHR-GL46.compute_shader.pipeline-post-fs
and a trace from Wasteland 3

Fixes: f3630548f1 ("crocus: initial gallium driver for Intel gfx 4-7")

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14905>
2022-02-07 18:01:36 +10:00
Zoltán Böszörményi d774059a0c crocus: enable GL46 tests for HSW in ci
Signed-off-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14889>
2022-02-06 23:46:28 +00:00
Alyssa Rosenzweig 0299600efb asahi: Fix memory unsafety in delete_sampler_state
The type is wrong, masked by a void*, meaning the free is completely
wrong. ASan is rightfully unhappy. Fixes crashes destroying the context.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14901>
2022-02-06 15:46:55 -05:00
Alyssa Rosenzweig 786871c87e agx: Don't kill helper threads in ld_var
Apparently this is yet another .kill bit. Fixes:

dEQP-GLES3.functional.shaders.derivate.dfdx.linear.*
dEQP-GLES3.functional.shaders.derivate.dfdy.linear.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899>
2022-02-06 15:02:39 +00:00