Commit Graph

89299 Commits

Author SHA1 Message Date
Eric Engestrom 66d5ec5f3f eglapi: add entrypoint for eglClientWaitSyncKHR
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-02-24 17:00:50 +00:00
Eric Engestrom b7f6f3b3e5 eglapi: add entrypoint for eglDestroySyncKHR
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-02-24 17:00:50 +00:00
Eric Engestrom df7fa30aec eglapi: add entrypoint for eglDestroyImageKHR
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-02-24 17:00:50 +00:00
Thomas Hellstrom 7b82efe4ee st/va: Fix up YV12 to NV12 putImage conversion
Use the utility u_copy_nv12_from_yv12 to implement this similarly to
how it's been done in the VPAU state tracker. The old code mixed up
planes and fields and didn't correctly handle video surfaces in
interlaced format.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2017-02-24 16:44:34 +01:00
Thomas Hellstrom 3a418322ec st/vdpau: Provide YV12 to NV12 putBits conversion v2
mplayer likes putting YV12 data, and if there is a buffer format mismatch,
the vdpau state tracker would try to reallocate the video surface as an
YV12 surface. A virtual driver doesn't like reallocating and doesn't like YV12
surfaces, so if we can't support YV12, try an YV12 to NV12 conversion
instead.

Also advertize that we actually can do the getBits and putBits conversion.

v2: A previous version of this patch prioritized conversion before
reallocating. This has been changed to prioritize reallocating in this version.

Cc: Christian König <christian.koenig@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2017-02-24 16:44:33 +01:00
Leo Liu 5398d006de configure.ac: check require_basic_egl only if egl enabled
Otherwise the configuration fails when building independant libs
like vdpau, vaapi or omx

Fixes: 1ac40173c2 ("configure.ac: simplify EGL requirements for
drivers dependent on EGL")

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
2017-02-24 09:48:47 -05:00
Eric Engestrom 3cc33e7640 glx: add GLXdispatchIndex sort check
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-02-24 14:44:58 +00:00
Lars Hamre caf4252a01 docs: update features.txt for GL_ARB_clear_texture with llvmpipe and softpipe
Signed-off-by: Lars Hamre <chemecse@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-02-24 15:41:26 +01:00
Lars Hamre a876b50b20 softpipe: enable clear_texture with util_clear_texture
Passes all corresponding piglit tests.

Signed-off-by: Lars Hamre <chemecse@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-02-24 15:41:13 +01:00
Lars Hamre 12f2058b47 llvmpipe: enable clear_texture with util_clear_texture
Passes all corresponding piglit tests.

Signed-off-by: Lars Hamre <chemecse@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-02-24 15:40:57 +01:00
Lars Hamre 3f9c5d6244 gallium: implement util_clear_texture
v3: have util_clear_texture mirror the pipe function (Roland Scheidegger)
v2: rework util clear functions such that they operate on a resource
    instead of a surface (Roland Scheidegger)

Creates a util_clear_texture function for implementing the GL_ARB_clear_texture
in softpipe and llvmpipe.

Signed-off-by: Lars Hamre <chemecse@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-02-24 15:40:11 +01:00
Jerome Duval 62e27170a7 haiku/winsys: fix dt prototype args 2017-02-24 14:10:57 +00:00
Jerome Duval 40b0c8666c haiku: build fixes around debug defines 2017-02-24 14:10:57 +00:00
Dave Airlie ccb70d6f53 radv: add sample mask output support
This adds support to write to sample mask from the fragment shader.

We can optimise this later like radeonsi.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-24 10:31:53 +10:00
Dave Airlie 8282c5c771 radv/ac: refactor our fmask sample index fixup.
This refactors out the sample index fixup between
txf and image load.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-24 10:31:49 +10:00
Dave Airlie 5e9ead0fa2 radv: fetch sample index via fmask for image coord as well.
This follows the txf_ms code, I can't figure out why amdgpu-pro
doesn't do this in their shaders, they must know someone we don't.

This fixes:
dEQP-VK.pipeline.multisample_shader_builtin.sample_id.*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-24 10:31:44 +10:00
Dave Airlie bdcbe7c76b radv: add sample mask input support
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-24 10:31:35 +10:00
Dave Airlie 58c97a0791 radv: enable location at sample when persample is forced.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-24 10:31:30 +10:00
Dave Airlie fc430c391b radv: fix interpolation at wrong place for offset interp
The code was interpolating at the offset from the sample,
not the offset from the center. Also fix for persample interpolation
modes we should force the pixel center to be at the sample.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-24 10:31:19 +10:00
George Kyriazis dcac48bfee swr: fix index buffers with non-zero indices
Fix issue with index buffers that do not contain a 0 index.  0 index
can be a non-valid index if the (copied) vertex buffers are a subset of the
user's (which happens because we only copy the range between min & max).
Core will use an index passed in from the driver to replace invalid indices.

Only do this for calls that contain non-zero indices, to minimize performance

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

cost.
2017-02-23 16:36:18 -06:00
George Kyriazis 669d8f626f swr: add fetch shader cache
For now, the cache key is all of FETCH_COMPILE_STATE.

Use new/delete for swr_vertex_element_state, since we have to call the
constructors/destructors of the struct elements.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-02-23 16:36:13 -06:00
Timothy Arceri 987d8037ca st/mesa: free shader cache buffer on fallback
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2017-02-24 09:01:59 +11:00
Timothy Arceri c24d0aaa9a st/mesa: fix crash in shader cache cased by race condition
If a thread doesn't load GLSL IR from cache but does load TGSI
from cache (that was created by another thread) than it will
crash due to expecting gl_program_parameter_list to have been
restored from the GLSL IR cache and not be null.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2017-02-24 09:01:59 +11:00
Jason Ekstrand 261092f7d4 anv: Enable MSAA compression
This just enables basic MSAA compression (no fast clears) for all
multisampled surfaces.  This improves the framerate of the Sascha
"multisampling" demo by 76% on my Sky Lake laptop.  Running Talos on
medium settings with 8x MSAA, this improves the framerate in the
benchmark by 80%.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2017-02-23 12:10:42 -08:00
Jason Ekstrand 42b10b175d anv/blorp/clear_subpass: Only set surface clear color for fast clears
Not all clear colors are valid.  In particular, on Broadwell and
earlier, only 0/1 colors are allowed in surface state.  No CTS tests are
affected outright by this because, apparently, the CTS coverage for
different clear colors is pretty terrible.  However, when multisample
compression is enabled, we do hit it with CTS tests and this commit
prevents regressions when enabling MCS on Broadwell and earlier.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
2017-02-23 12:10:42 -08:00
Pohjolainen, Topi 042cc201f2 intel/isl: Apply render target alignment constraints for MCS
v2: Instead of having the same block in isl_gen7,8,9.c add it
    once into isl.c::isl_choose_image_alignment_el() instead.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-02-23 12:10:42 -08:00
Lionel Landwerlin 34e29b2ebd intel/isl: add MCS width constraint 16 samples
v3 (Jason Ekstrand): Add a comment explaining why

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2017-02-23 12:10:42 -08:00
Jason Ekstrand 3885375195 intel/isl: Return surface creation success from aux helpers
The isl_surf_init call that each of these helpers make can, in theory,
fail.  We should propagate that up to the caller rather than just
silently ignoring it.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2017-02-23 12:10:42 -08:00
Kenneth Graunke e6e8475b0f glsl: Raise a link error for non-SSO ES programs with a TES but no TCS.
OpenGL allows the TCS to be missing and supplies an implicit passthrough
shader, but OpenGL ES does not (see section 7.3 of the ES 3.2 spec,
cited above in the code).

One open question is how to handle this for ARB_ES3_2_compatibility.
This patch raises the link error for all ES shading language programs,
but it might make sense to base it on the API.  The approach taken in
this patch is more restrictive, but should still allow any valid ES
programs to work in GL.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Andres Gomez <agomez@igalia.com>
2017-02-23 11:07:06 -08:00
Samuel Iglesias Gonsálvez a9c488f285 isl/state: fix assert on raw buffer surface state minimum size
From IVB PRM, SURFACE_STATE::Height:

"For typed buffer and structured buffer surfaces, the number of
 entries in the buffer ranges from 1 to 2^27 . For raw buffer
 surfaces, the number of entries in the buffer is the number of bytes
 which can range from 1 to 2^30."

The minimum value is 1, according to the spec. The spec quote
was already added into the code by 028f6d8317.

Fixes crashing tests under:

dEQP-VK.robustness.buffer_access.*

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-02-23 11:46:47 +01:00
Iago Toral Quiroga 42b9057447 glsl: enable early_fragment_tests implicitly with post_depth_coverage
From ARB_post_depth_coverage:

   "This extension allows the fragment shader to control whether values in
    gl_SampleMaskIn[] reflect the coverage after application of the early
    depth and stencil tests.  This feature can be enabled with the following
    layout qualifier in the fragment shader:

       layout(post_depth_coverage) in;

    Use of this feature implicitly enables early fragment tests."

And a bit later it also adds:

   "early_fragment_tests" requests that fragment tests be performed before
    fragment shader execution, as described in section 15.2.4 "Early Fragment
    Tests" of the OpenGL Specification. If neither this nor post_depth_coverage
    are declared, per-fragment tests will be performed after fragment shader
    execution."

Fixes:
GL45-CTS.post_depth_coverage_tests.PostDepthSampleMask

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-02-23 11:21:44 +01:00
Samuel Iglesias Gonsálvez 6ca4347c82 glsl: refactor get_variable_being_redeclared() to return always an ir_variable pointer
It will return the current variable ('var') or the earlier declaration ('earlier') in
case of redeclaration of that variable.

In order to distinguish between both, 'is_redeclaration' boolean will indicate in which
case we are.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-02-23 06:56:45 +01:00
Samuel Iglesias Gonsálvez a73a618933 glsl: fix heap-use-after-free in ast_declarator_list::hir()
The get_variable_being_redeclared() function can free 'var' because
a re-declaration of an unsized array variable can establish the size, so
we set the array type to the 'earlier' declaration and free 'var' as it is
not needed anymore.

However, the same 'var' is referenced later in ast_declarator_list::hir().

This patch fixes it by picking the ir_variable_mode from the proper
ir_variable.

This error was detected by Address Sanitizer.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Suggested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99677
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
2017-02-23 06:56:16 +01:00
Charmaine Lee 043883647a st/wgl: flush with ST_FLUSH_WAIT before releasing shared contexts
Before releasing a shared context, flush the context
with ST_FLUSH_WAIT to make sure all commands are executed.
This ensures that rendering to any shared resources is completed
before they will be referenced by another context.

Fixes an intermittent flickering with Photoshop. (VMware bug# 1779340)

Reviewed-by: Brian Paul <brianp@vmware.com>
2017-02-18 09:36:42 -08:00
Charmaine Lee d793b54c4e st: add ST_FLUSH_WAIT to st_context_flush()
When st_context_flush() is called with ST_FLUSH_WAIT,
the function will return after the fence is completed.

Reviewed-by: Brian Paul <brianp@vmware.com>
2017-02-18 09:36:42 -08:00
Dave Airlie b71e6538a8 radv/ac: handle gs->copy shader clip distances.
This fixes up the clip distance passing between the geometry
shader and the copy shader. It packs the clip and cull distances
into one or two consecutive slots, and avoids wasting space and
make sure the gs output and copy shader input agree on where
things are stored.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-23 15:31:41 +10:00
Dave Airlie bec584ec0e radv/ac: pass clips properly from vertex->geometry shader stages.
This works out the geometry shader clip/cull inputs separately
to the outputs, and uses that information to read from the ES->GS
ring buffer. It stores the clip/cull distances packed into one
or two slots. It fixes the es output emission and gs input
reading to match.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-23 15:31:37 +10:00
Dave Airlie c2cfb54f13 radv/ac: rename num clips/cull to output clips/culls
As geom shaders can have different ones on entry and exit.

also move to uint8_t as these are never that big.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-23 15:31:10 +10:00
Dave Airlie c2ed2685fd vulkan/wsi: move image count to shared structure.
For prime support I need to access this, so move it in advance.

[airlied: fix int->uint32_t]

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-23 15:30:32 +10:00
Timothy Arceri 4711e54336 radeon: fix r600 builds when old version of llvm is present
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-02-23 14:05:55 +11:00
Dylan Baker fb26e6c0d4 vulkan: Fix gen_enum_to_str in out of tree builds
In some configurations the util directory is created when building out
of tree, but not others. This patch ensures that it's created.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-and-Tested-by: Mike Lothian <mike@fireburn.co.uk>
2017-02-22 17:08:52 -08:00
Jason Ekstrand 1bd0e9ca33 anv/Makefile: Gather all the genX files into one place
While we're here, we also fix the alphabetization of the list of
genx_* files.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-02-22 15:07:18 -08:00
Timothy Arceri 2f3290ac28 r600/radeonsi: enable glsl/tgsi on-disk cache
For gpu generations that use LLVM we create a timestamp string
containing both the LLVM and Mesa build times, otherwise we just
use the Mesa build time.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-23 09:20:22 +11:00
Timothy Arceri 27cecafefd st/mesa: get on-disk shader cache
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-23 09:20:22 +11:00
Timothy Arceri 8239eef2f7 ddebug/rbug/trace: add get_disk_shader_cache() to pass-throughs
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-23 09:20:22 +11:00
Timothy Arceri 4be98ed5fd gallium: add get_disk_shader_cache() callback
V2: Provide more detail in callback description and add description to
    screen.rst

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-23 09:20:22 +11:00
Timothy Arceri 9f506d817e st/mesa: implement a tgsi on-disk shader cache
Implements a tgsi cache for the OpenGL state tracker.

V2: add support for compute shaders

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-23 09:20:22 +11:00
Timothy Arceri b9de1c2e02 st/mesa: add sha1 field to st program structs
This will be used to share the sha1 computed by the tgsi load
function with the tgsi write function.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-23 09:20:22 +11:00
Timothy Arceri 0d5130bdd0 st/mesa: move set_prog_affected_state_flags() to st_program.c
We want to use this in the new tgsi shader cache so we move it here
and make it available externally.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-23 09:20:22 +11:00
Timothy Arceri d258055c8b util/disk_cache: fix bug with deleting old cache dirs
If there was more than a single directory in the .cache/mesa dir
then it would only remove one (or none) of the directories.

Apparently Valgrind was also reporting:
Conditional jump or move depends on uninitialised value

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-02-23 09:20:22 +11:00