b1fe85e38c
freedreno, turnip: Set TPL1_DBG_ECO_CNTL better
...
Match the blob better here. Note that the value of 0x1000000 for a650
comes from the Vulkan blob, and it's required to fix cubic filtering
even though the GLES driver doesn't set it (and doesn't support cubic
filtering).
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5261
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12929 >
2021-09-21 09:08:20 +00:00
9ec0580095
freedreno/a6xx: Name TPL1_DBG_ECO_CNTL
...
This is a guess, but an informed guess, since every other block with a
known DBG_ECO_CNTL register has it at the very beginning immediately
followed by ADDR_MODE_CNTL.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12929 >
2021-09-21 09:08:20 +00:00
3c19ab4a7b
lima: Remove depth near/far workaround
...
because this is fixed now.
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12804 >
2021-09-21 08:54:53 +00:00
d1798ad1b5
lima: Expose GL_EXT_clip_control
...
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12804 >
2021-09-21 08:54:53 +00:00
7405b7fbcd
radeonsi/test: use -t for deqp tests
...
deqp-runner added support for this.
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12899 >
2021-09-21 08:37:57 +00:00
ac9ab028ce
radeonsi/test: don't require a folder name
...
Generate a temp one if the user didn't supply one.
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12899 >
2021-09-21 08:37:57 +00:00
9db70eb577
radeonsi/sqtt: add si_se_is_disabled
...
Based on radv_se_is_disabled.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12899 >
2021-09-21 08:37:57 +00:00
a25a6abbd7
radeonsi/sqtt: export wave size and scratch size
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12899 >
2021-09-21 08:37:57 +00:00
a574d0541a
radeonsi/test: update expected results
...
These tests were fixed in piglit.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12899 >
2021-09-21 08:37:57 +00:00
97663bac2e
radeonsi/test: fix typo in the test script
...
glcts results were copied over deqp results.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12899 >
2021-09-21 08:37:57 +00:00
b9cf327787
radv: remove useless assertions in the SQTT path
...
The driver aborts when the chip class is older than GFX8.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12854 >
2021-09-21 09:08:48 +02:00
8846f65c4f
radv: make the SQTT BO a resident buffer
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12854 >
2021-09-21 09:08:47 +02:00
c80ac276bf
radv: replicate THREAD_TRACE_CTRL config when stopping SQTT
...
This seems missed and it might be important.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12854 >
2021-09-21 09:08:45 +02:00
f1095260a4
radv: Experimentally enable RT extensions.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
ca2d96db51
radv: Add caching for RT pipelines.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
a22a4162d9
radv: Add support for setting a dynamic stack size.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
063d0c90c8
radv: Combine all the parts together with a main loop for an RT pipeline.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
85580faa4b
radv: Add ray traversal loop.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
c3d82a9622
radv: Add pass to lower anyhit shader into an intersection shader.
...
So we avoid having yet another shader calling loop. Such a thing
is not needed since neither shader types do recursion.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
ae5bea3125
radv: Add helper to parse raytracing stages.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
207ce6d658
radv: Add helper to inline shaders into the main shader.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
dcb02dbe73
radv: Add main loop variables.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
701803e340
radv: Add scaffolding for RT pipeline compilation incl libraries.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
f087b457e5
radv: Make some pipeline functions non-static.
...
Want to put the rt stuff in its own file. radv_pipeline.c is pretty
large already.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
8312b2232b
radv: Add raytracing pipeline properties.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
0f090a51b3
radv: Add group info to pipeline.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
080400e43c
radv: Add pipeline type.
...
I want to keep pointers that need to be freed in the union and need
to figure out the type a destruction time. This seems more reliable
than checking the shader array in case we destroy mid-creation (i.e.
on failure).
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
f5362742b9
radv: Add RT cache flushes.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
8ca54b4d38
radv: Support nir_intrinsic_load_global_constant.
...
SPIR-V parsing can result in some direct constant usage for shader
records. Lower this early to a global based intrinsic so that it
doesn't interfere with the later 32-bit offset based constants
for scratch usage.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
0d8bd8518d
nir: Support ray launch size in divergence analysis.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
c299968988
aco: Add support for ray launch size.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
1ca4fd31e6
radv: Add support for ray launch size.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
56b06c09b4
nir: Add AMD rt intrinsics.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
148ea4375c
radv: Implement NULL accel struct descriptor write.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
2070d36cf3
radv: Do more meta shader lowering.
...
Need this to clean up our generated RT pipeline.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
b1074fd51d
radv: Refactor some nir_channels usage to use nir_channel.
...
cleanup, nir_channels wasn't needed as these were only accessing a
single channel.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
817553c052
aco: Implement call scope.
...
Since we do no repacking yet, just use invocation.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
b6be96a2bd
radv: Modify load_sbt_amd intrinsic to get the descriptor.
...
That way we can get the address to the entry, which is needed for
some nir builtins because extra data in the entry can be used as
shader input.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
2abf44cf18
radv: Add bvh node definitions to a header.
...
So that we can avoid some magic numbers in the pipeline creation.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
a99ccd353b
radv: Add optimized CPU BVH builds.
...
This trivial sorting helps speed up bad cases (like in CTS significantly).
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
848d175c76
radv: Add more acceleration structure formats.
...
These are required ...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
506757ea86
radv: Add accel struct build support for the object-to-world matrix.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
3e059dc1e0
radv: Fix arrayOfPointers for instances in accel struct build.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
58ec4f3069
radv: Fix CPU AABB build.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592 >
2021-09-21 01:53:39 +00:00
4807d777c0
meson: introduce option vmware-mks-stats controlling the instrumentations of gallium svga driver
...
The new boolean option controls the instrumentations of gallium svga driver for mksGuestStats.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
(cherry picked from commit 57760b7fe4eeb80acc8d6cd8bf6ec609a11a11dc)
(cherry picked from commit 12aed00f08bd95afd605cab34c833e81a4957dbd)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12873 >
2021-09-21 00:07:40 +00:00
4feb9c3c47
svga: enable DRM mks-stats via hooking to the corresponding DRM ioctls
...
SVGA DRM stat calls were situated but did not actually register with the mks-stats
mechanism due to absence of corresponding ioctls. The employed new ioctls in vmwgfx
are DRM_VMW_MKSSTAT_ADD and DRM_VMW_MKSSTAT_REMOVE, subject to version check.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
(cherry picked from commit be47c077cc927c27a8c36342b47697aa81719677)
(cherry picked from commit 0388afc67b830f6ab916d0839c33eb1d91d6353f)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12873 >
2021-09-21 00:07:39 +00:00
b61e9345c1
build: fix nine compilation with only zink enabled as a gallium driver
...
fixes #5360
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12943 >
2021-09-20 22:47:38 +00:00
aff177a0ad
zink: fix regex syntax from previous ci commit
...
argh
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12948 >
2021-09-20 18:33:32 -04:00
49b5e5be5a
zink: disable miplevel tests in ci completely for now
...
I still can't repro, and I'm running these regularly on multiple platforms,
so they're not going to get any worse for the time being
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12947 >
2021-09-20 22:20:48 +00:00
b1b6d9e9a1
etnaviv: add mov for direct depth store output from load input
...
If the fragment shader writes fragment depth from an ALU instruction,
the register allocator makes sure that the instruction is pointed to the
correct register and write mask (t0.__z_).
If there is no instruction emitted because the source is an input
load intrinsic, or if the source instruction does not support swizzle
and write mask, we have to add a mov instruction for this to work.
Fixes piglit test spec@glsl-1.10@execution@glsl-1.10-fragdepth.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12891 >
2021-09-20 21:19:09 +00:00
Connor Abbott
Andreas Baierl
Pierre-Eric Pelloux-Prayer
Samuel Pitoiset
Bas Nieuwenhuizen
Martin Krastev
Mike Blumenkrantz
Philipp Zabel