Commit Graph

123210 Commits

Author SHA1 Message Date
Rob Clark 60912f1ebd freedreno: we don't need aligned vbo's
This gets rid of the last reason that mesa/st would use `u_vbuf` on
a6xx.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4812>
2020-05-01 02:05:00 +00:00
Rob Clark 9a7c179473 freedreno/a6xx: add some more formats
u_vbuf was translating these for us.. which isn't really necessary.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4812>
2020-05-01 02:05:00 +00:00
Alyssa Rosenzweig 6f7d94580e pan/decode: Don't crash on missing payload
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig bde19c0e7b panfrost: Fix tiled texture "stride"s on Bifrost
They're not real strides like linear textures but the hw does use them
so we do have to get it right annoyingly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig bbecbedb4c panfrost: Fix norm coords on bifrost sampler
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig 401409eff3 panfrost: Fix sampler wrap/filter field orders
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig 6148d1be4b panfrost: Fix size of bifrost sampler descriptor
Should be 32-bytes, it looks like.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig 884f869992 panfrost: Fix texture field size
I have to imagine this was UB.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig d04be375cc pan/bit: Add round tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig 6bbedf8359 pan/bit: Interpret ROUND
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig f1f4f1b816 pan/bit: Add framework forinterpreting double vs float
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig 130a3fba1c pan/bi: Pack round opcodes (FMA, either 16 or 32)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig 5f35cdaa8d pan/bi: Pipe multiple textures through
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig fc634dc3b2 pan/bi: Add texture indices to IR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Rob Clark f8424d3b99 freedreno/a6xx: fix LRZ hang
In detecting the case where we actually do need to re-emit LRZ state
(due to new batch), we were checking `ctx->last.dirty` to detect when
we cannot trust previous state.  But this is cleared before we check
it.

Move where it is cleared to the end of the draw_vbo() path.

Fixes: dfa702e94b ("freedreno/a6xx: limit LRZ state emit")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4842>
2020-05-01 00:02:28 +00:00
Eric Anholt 0e51082cfa freedreno/ir3: Leave bools as 1-bit, storing them in full regs.
If use NIR's 1-bit bool representation , we get exactly the bool behavior
the hardware provides: CMPS produces true or false, AND/OR/XOR work as
intended without extra absnegs, and we can pass those half values directly
to other CMPS.  We emit an absneg for b2b1 ("turn a memory load into a
1-bit NIR boolean"), but we would have done so for the ir3_n2b() on the
use of that value anyway.  The most awkward bit is that inot(a@1) is now a
sub(1, a), but we can encode the 1 as an immediate so it's fine.

No significant changes to GL_TIME_ELAPSED on my set of traces (n=21).

instructions in affected programs: 1570638 -> 1548702 (-1.40%)
nops in affected programs: 624053 -> 611381 (-2.03%)
non-nops in affected programs: 959061 -> 949797 (-0.97%)
mov in affected programs: 5258 -> 5252 (-0.11%)
cov in affected programs: 15099 -> 15902 (5.32%)
dwords in affected programs: 469600 -> 452768 (-3.58%)
last-baryf in affected programs: 162211 -> 154726 (-4.61%)
full in affected programs: 4881 -> 4797 (-1.72%)
sstall in affected programs: 173953 -> 174545 (0.34%)
(ss) in affected programs: 10922 -> 10934 (0.11%)
(sy) in affected programs: 728 -> 745 (2.34%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4518>
2020-04-30 23:36:09 +00:00
Eric Anholt 769adc9546 freedreno/ir3: Drop redundant IR3_REG_HALF setup in ALU ops.
It's set by ir3_put_dst() immediately after.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4518>
2020-04-30 23:36:09 +00:00
Marek Olšák bdd2f284d9 radeonsi: revert an accidental change in si_clear_buffer
The change was in: 7b0b085c94

Fixes: 7b0b085c94 ("radeonsi: drop the negation from fmask_is_not_identity")

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák 5afec9bc9f radeonsi: fix si_compute_clear_render_target with render condition enabled
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák 19db1a540c radeonsi: add a workaround to fix KHR-GL45.texture_view.view_classes on gfx9
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák d6acdbd935 radeonsi: implement and use compute-based DCC decompression on gfx9-10
DCC_DECOMPRESS doesn't work. Instead of trying to figure out why,
use a compute blit where the load is compressed and the store is
uncompressed.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák d3da73954a radeonsi: add SI_IMAGE_ACCESS_DCC_OFF to ignore DCC for shader images
A shader-based DCC decompress pass will use this.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák 93d5c86081 radeonsi: bind shader images after DCC is disabled for image stores
This prevents an infinite recursion with a compute-based DCC decompression
when it restores shader images.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák 44d27fd6fb radeonsi: clean up and deduplicate code around internal compute dispatches
In addition to the cleanup, there are these changes in behavior:
- clear_render_target waits for idle after the dispatch and then flushes
  L0-L1 caches (this was missing)
- sL0 is no longer invalidated before the dispatch, because src resources
  don't use it
- sL0 is no longer invalidated after the dispatch if dst is an image

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák e58dcc47c3 radeonsi: unify and align down the max SSBO/TBO/UBO buffer binding size
Rounding down the size fixes:
    KHR-GL45.enhanced_layouts.ssb_member_invalid_offset_alignment

Fixes: 03e2adc990

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák b7ffa1560c tgsi_to_nir: handle TGSI_OPCODE_BARRIER
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák d35c3dc80e tgsi_to_nir: handle TGSI_SEMANTIC_BLOCK_SIZE
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák 2840bc3065 glthread: upload non-VBO vertices and indices for non-Indirect non-IBM draws
This is basically the same thing u_vbuf does.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák 1485a3ff7b glthread: handle gl{Push,Pop}ClientAttrib{DefaultEXT} for glthread states
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák 57bf51a973 glthread: handle POS vs GENERIC0 aliasing
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák 09f94632e0 glthread: initialize VAOs properly
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák 47cf310a67 glthread: track primitive restart state
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák 9037005d60 glthread: track instance divisor changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák c9c9f57b02 glthread: track pointers and strides for Pointer & EXT_dsa attrib functions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák befbd54864 glthread: don't use atomics for refcounting to decrease overhead on AMD Zen
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák 7f22e0fd29 glthread: do glBufferSubData as unsynchronized upload + GPU copy
1. glthread has a private upload buffer (as struct gl_buffer_object *)
2. the new function glInternalBufferSubDataCopyMESA is used to execute the copy
   (the source buffer parameter type is struct gl_buffer_object * as GLintptr)

Now glthread can handle arbitrary glBufferSubData sizes without syncing.

This is a good exercise for uploading data outside of the driver thread.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák 70847eb0a9 mesa: add _mesa_InternalBind{ElementBuffer,VertexBuffers} for glthread
Uploaded non-VBO user data will be set via these functions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák a82889e537 mesa: add glInternalBufferSubDataCopyMESA for glthread
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák 3707cef4fb mesa: inline vbo_context inside gl_context to remove vbo_context dereferences
The number of lines in the disassembly of vbo_exec_api.c.o decreased
by 4.5%, which roughly corresponds to a decrease in instructions
for immediate mode thanks to the removal of ctx->vbo_context dereferences.

It increases performance in one Viewperf11 subtest by 2.8%.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák 42842306d3 mesa,st/mesa: add a fast path for non-static VAOs
Skip most of _mesa_update_vao_derived_arrays if the VAO is not static.
Drivers need a separate codepath for this.

This increases performance by 7% with glthread and the game "torcs".

The reason is that glthread uploads vertices and sets vertex buffers
every draw call, so the overhead is very noticable. glthread doesn't
hide the overhead, because the driver thread is the busiest thread.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák 2e3a9d7828 mesa: don't update shaders on fixed-func state changes if user shaders are bound
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák 256d5ca80a mesa: don't set unnecessary program flags in _mesa_update_state
_NEW_PROGRAM is already set.
_NEW_FRAG_CLAMP is not used by the fixed-func fragment shader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Mathias Fröhlich b2b4afdc17 mesa: set _NEW_FRAG_CLAMP only when needed
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák 21ff963c3a mesa: don't call _mesa_update_state for _mesa_get_clamp_fragment_color
It's not needed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Mathias Fröhlich f1538002b8 st/mesa: Move _NEW_FRAG_CLAMP to NewFragClamp driver flag.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák eb04db7344 mesa: optimize glPush/PopClientAttrib by removing malloc overhead
just declare all structures needed by the stack in gl_context.

This improves performance by 5.6% in the game "torcs". FPS: 101.01 -> 106.73

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Rob Clark beb02a781c freedreno/a6xx: don't set SP_FS_CTRL_REG0.VARYING for fragcoord
Similar change to 5785bcc8a0.  It appears
on a6xx and in fact this could cause varying corruption before the FS
had a chance to consume the varyings from varying storage.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2838
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4838>
2020-04-30 21:38:52 +00:00
Lionel Landwerlin 612e35c8d9 iris: don't assert on unfinished aux import in copy paths
After a resource is created the first command using it could be a copy
command.

In iris_state we finish the import on surface/view creation but we
don't do that for copies.

v2: Move finish call to gallium entrypoints (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2725
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4657>
2020-04-30 21:18:42 +00:00
Rob Clark d56b8c4554 freedreno: sync registers with envytools
Pull in the `SP_xS_BRANCH_COND` regs to keep the mesa and envytools
copies from getting out of sync.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark 200765457e freedreno/a6xx: more OUT_REG()
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00