321bd6c280
radeonsi: move r600_buffer_common.c and r600_texture.c into radeonsi
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
d58080b318
radeonsi: move r600_gpu_load.c to si_gpu_load.c
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
f7f4ba5306
radeonsi: move r600_query.c/h files to si_query.c/h
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
5777488406
radeonsi: move r600_cs.h contents into si_pipe.h, si_build_pm4.h
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
72e9e98076
radeonsi: move and rename R600_ERR out of r600_pipe_common.h
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
076afb4f0e
radeonsi: rename a few R600/r600_ -> SI_/si_
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
5f1cddde78
radeonsi: move definitions out of r600_pipe_common.h
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
a67ee02388
radeonsi: move functions out of and remove r600_pipe_common.c
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
90d12f1d77
radeonsi: rename r600 -> si in some places
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
50c7aa6756
radeonsi: use si_context instead of pipe_context in parameters pt3
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
e332ba61f4
radeonsi: use si_context instead of pipe_context in parameters pt2
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
c424f86180
radeonsi: use si_context instead of pipe_context in parameters pt1
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
4c5efc40f4
radeonsi: update copyrights
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
3069cb8b78
radeonsi: use r600_common_context less pt2
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
71d9028b7a
radeonsi: use r600_common_context less pt1
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
c0987d8adf
radeonsi: move saved_cs functions from r600_pipe_common.c to si_debug.c
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
37ef4765ff
radeonsi: move DMA CS functions from r600_pipe_common.c to si_dma_cs.c
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
19f550f1d2
radeonsi: move EOP event code from r600_pipe_common.c to si_fence.c
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
fc6a44e169
radeonsi: rename si_hw_context.c -> si_gfx_cs.c
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
42500d1dab
radeonsi: move si_destroy_saved_cs to si_debug.c
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
02a61e71a2
radeonsi: rename si_begin_new_cs -> si_begin_new_gfx_cs
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
fa09388704
radeonsi: rename si_need_cs_space -> si_need_gfx_cs_space
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
85e75b2da5
radeonsi: remove r600_pipe_common::blit_decompress_depth
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
e04389cc2a
radeonsi: remove r600_pipe_common::decompress_dcc
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
17e8f1608e
radeonsi: call CS flush functions directly whenever possible
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Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
0669dca9c0
radeonsi: skip DCC render feedback checking if color writes are disabled
2018-04-05 15:34:58 -04:00
2be6143032
radeonsi: implement GL_KHR_blend_equation_advanced
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MSAA is supported using sample shading. Layered rendering and all texture
targets are also supported.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-04-02 13:55:25 -04:00
eb77961292
radeonsi: add R600_DEBUG=nofmask to disable MSAA compression
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For testing.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-04-02 13:55:20 -04:00
8d6e6b1d7c
radeonsi: don't use struct si_descriptors for vertex buffer descriptors
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VBO descriptor code will change a lot one day.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-02-26 12:01:00 +01:00
fca7dee9c6
radeonsi: put both tessellation rings into 1 buffer
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-02-24 23:08:28 +01:00
d2963d8b5f
radeonsi: move tessellation ring info into si_screen
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-02-24 23:08:28 +01:00
3e1287caef
radeonsi/gfx9: make shader binaries use read-only memory
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Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-06 15:19:02 +01:00
950221f923
radeonsi: remove r600_common_screen
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Most files in gallium/radeon now include si_pipe.h.
chip_class and family are now here:
sscreen->info.family
sscreen->info.chip_class
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-29 18:21:30 +01:00
2208b760f3
radeonsi: move shader debug helpers out of r600_pipe_common.c
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-29 18:21:30 +01:00
03e2adc990
radeonsi: move all get functions to si_get.c; disk_cache_create to si_pipe.c
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-29 18:21:30 +01:00
1823bbbb1a
radeonsi: remove R600_CONTEXT_* flags
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-29 18:21:30 +01:00
c63e225bff
radeonsi: remove some definitions and helpers from r600_pipe_common.h
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-29 18:21:30 +01:00
b191e2d79d
radeonsi: move r600_test_dma.c into si_test_dma.c
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-29 18:21:30 +01:00
7aa2366b70
radeonsi: move all clear() code into si_clear.c
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-29 18:21:30 +01:00
1a6d9e087a
radeonsi: record and dump time of flush
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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-11-09 14:01:04 +01:00
609a230375
gallium/u_threaded: implement asynchronous flushes
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This requires out-of-band creation of fences, and will be signaled to
the pipe_context::flush implementation by a special TC_FLUSH_ASYNC flag.
v2:
- remove an incorrect assertion
- handle fence_server_sync for unsubmitted fences by
relying on the improved cs_add_fence_dependency
- only implement asynchronous flushes on amdgpu
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-11-09 14:00:42 +01:00
78a4750d91
radeonsi: move fence functions to si_fence.c
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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-11-09 14:00:42 +01:00
dd7c273e87
radeonsi: move pipe debug callback to si_context
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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-11-09 11:53:19 +01:00
33000e7c43
radeonsi: add si_screen::has_ls_vgpr_init_bug
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:58:40 +01:00
529cdce799
radeonsi: remove 'Authors:' comments
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It's inaccurate. Instead, see the copyright and use "git log" and
"git blame" to know the authorship.
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-02 18:19:03 +01:00
dd79aa4ad3
radeonsi: update hack for HTILE corruption in ARK: Survival Evolved
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It appears that flushing the DB metadata is actually not sufficient
since the driver uses the new VS blit shaders. This looks quite
strange though, but it seems like we need to flush DB for fixing
the corruption.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102955
Fixes: 69ccb9dae7
2017-10-27 10:47:30 +02:00
0ecf9b90ef
radeonsi: import cayman_msaa.c from drivers/radeon
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-09 16:27:04 +02:00
65f2e33500
radeonsi: import r600_streamout from drivers/radeon
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-09 16:26:55 +02:00
13b6c1c031
radeonsi: minor cleanup of si_update_vs_writes_viewport_index
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-07 18:26:35 +02:00
69ccb9dae7
radeonsi: use new VS blit shaders (VS inputs in SGPRs)
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-07 18:26:35 +02:00
Marek Olšák
Nicolai Hähnle
Samuel Pitoiset